Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / ce86572981f5d859a8d0375404ed899077b1e32a / . / configs / ls2081ardb_defconfig
blob: 0380bc012faeb709f72c617579a65b9e3124f7fd [file] [log] [blame]
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=25000000
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]3CONFIG_GIC_V3_ITS=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]4CONFIG_TARGET_LS2081ARDB=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x20100000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x202000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=3
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_SIZE=0x2000
11CONFIG_ENV_OFFSET=0x300000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]12CONFIG_ENV_SECT_SIZE=0x40000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb"
Tom Rini6bef4ef2022-07-07 14:12:07 -0400[diff] [blame]14CONFIG_FSL_LS_PPA=y
15CONFIG_QSPI_AHB_INIT=y
16CONFIG_AHCI=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]17CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rini89cdcab2021-12-12 22:12:31 -0500[diff] [blame]18CONFIG_VID=y
19CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv"
20CONFIG_VOL_MONITOR_IR36021_READ=y
21CONFIG_VOL_MONITOR_IR36021_SET=y
Tom Rinie24547a2022-03-30 18:07:32 -0400[diff] [blame]22CONFIG_FSL_QIXIS=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]23# CONFIG_SYS_MALLOC_F is not set
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]24CONFIG_REMAKE_ELF=y
Tom Rini7f184322022-10-28 20:27:07 -0400[diff] [blame]25CONFIG_SYS_MONITOR_LEN=1048576
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]26CONFIG_MP=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]27CONFIG_FIT_VERBOSE=y
28CONFIG_OF_BOARD_SETUP=y
29CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini8c70baa2021-12-14 13:36:40 -0500[diff] [blame]30CONFIG_DYNAMIC_SYS_CLK_FREQ=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]31CONFIG_QSPI_BOOT=y
32CONFIG_BOOTDELAY=10
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]33CONFIG_USE_BOOTARGS=y
34CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]35CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;"
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]36CONFIG_MISC_INIT_R=y
Tom Rini356c6742022-03-18 08:38:20 -0400[diff] [blame]37CONFIG_RESET_PHY_R=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]38CONFIG_SYS_MAXARGS=64
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]39CONFIG_SYS_PBSIZE=532
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]40CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]41CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]42CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]43CONFIG_CMD_I2C=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]44CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]45CONFIG_CMD_PCI=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]46CONFIG_CMD_USB=y
47# CONFIG_CMD_SETEXPR is not set
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]48CONFIG_CMD_CACHE=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]49CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]50CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]51CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]52CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]53CONFIG_USE_ETHPRIME=y
54CONFIG_ETHPRIME="DPMAC1@xgmii"
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]55CONFIG_NET_RANDOM_ETHADDR=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]56CONFIG_SATA=y
Tom Rinif4e64b92022-02-08 23:50:55 +0000[diff] [blame]57CONFIG_SCSI_AHCI=y
Peng Ma1c4bf2f2019-01-30 19:17:44 +0800[diff] [blame]58CONFIG_SATA_CEVA=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]59CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]60CONFIG_DDR_CLK_FREQ=133333333
Tom Rini3210bdc2022-03-30 18:07:31 -0400[diff] [blame]61CONFIG_DIMM_SLOTS_PER_CTLR=2
Tom Rinif839dd02022-07-31 21:08:22 -0400[diff] [blame]62CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]63CONFIG_DDR_ECC=y
64CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rinic934e5e2022-07-23 13:05:12 -0400[diff] [blame]65CONFIG_SYS_FSL_DDR_INTLV_256B=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]66CONFIG_SYS_I2C_LEGACY=y
Tom Rini714482a2021-08-18 23:12:25 -0400[diff] [blame]67CONFIG_SYS_I2C_EARLY_INIT=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]68CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]69CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]70CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]71CONFIG_DM_SPI_FLASH=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]72CONFIG_SPI_FLASH_STMICRO=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]73CONFIG_PHYLIB=y
Jeremy Gebbenabe3edf2018-09-18 15:49:35 -0600[diff] [blame]74CONFIG_PHY_AQUANTIA=y
Tom Rini84e35db2019-11-26 17:32:42 -0500[diff] [blame]75CONFIG_PHY_CORTINA=y
Kuldeep Singh016965f2021-08-10 11:20:07 +0530[diff] [blame]76CONFIG_CORTINA_FW_ADDR=0x980000
Tom Rini33ae6a72022-07-23 13:05:10 -0400[diff] [blame]77CONFIG_FSL_MEMAC=y
78CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]79CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]80CONFIG_MII=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]81CONFIG_NVME_PCI=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]82CONFIG_PCI=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]83CONFIG_DM_PCI_COMPAT=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]84CONFIG_PCIE_LAYERSCAPE_RC=y
Heiko Schocherb1f9d2c2020-10-16 10:41:46 +0200[diff] [blame]85CONFIG_RTC_PCF8563=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]86CONFIG_SCSI=y
Peng Ma1c4bf2f2019-01-30 19:17:44 +0800[diff] [blame]87CONFIG_DM_SCSI=y
Tom Rinie69ba982018-03-06 19:02:27 -0500[diff] [blame]88CONFIG_CONS_INDEX=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]89CONFIG_SYS_NS16550_SERIAL=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]90CONFIG_SPI=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]91CONFIG_DM_SPI=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]92CONFIG_FSL_DSPI=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]93CONFIG_FSL_QSPI=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]94CONFIG_USB=y
Priyanka Jain75cd67f2017-04-27 15:08:07 +0530[diff] [blame]95CONFIG_USB_XHCI_HCD=y
96CONFIG_USB_XHCI_DWC3=y