Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 2 | /* |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 3 | * (C) Copyright 2009 Industrie Dial Face S.p.A. |
| 4 | * Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> |
| 5 | * |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 6 | * (C) Copyright 2001 |
| 7 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * This provides a bit-banged interface to the ethernet MII management |
| 12 | * channel. |
| 13 | */ |
| 14 | |
| 15 | #include <common.h> |
| 16 | #include <ioports.h> |
| 17 | #include <ppc_asm.tmpl> |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 18 | #include <miiphy.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 19 | #include <asm/global_data.h> |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 20 | |
| 21 | #define BB_MII_RELOCATE(v,off) (v += (v?off:0)) |
| 22 | |
| 23 | DECLARE_GLOBAL_DATA_PTR; |
| 24 | |
| 25 | #ifndef CONFIG_BITBANGMII_MULTI |
| 26 | |
| 27 | /* |
| 28 | * If CONFIG_BITBANGMII_MULTI is not defined we use a |
| 29 | * compatibility layer with the previous miiphybb implementation |
| 30 | * based on macros usage. |
| 31 | * |
| 32 | */ |
| 33 | static int bb_mii_init_wrap(struct bb_miiphy_bus *bus) |
| 34 | { |
| 35 | #ifdef MII_INIT |
| 36 | MII_INIT; |
| 37 | #endif |
| 38 | return 0; |
| 39 | } |
| 40 | |
| 41 | static int bb_mdio_active_wrap(struct bb_miiphy_bus *bus) |
| 42 | { |
| 43 | #ifdef MDIO_DECLARE |
| 44 | MDIO_DECLARE; |
| 45 | #endif |
| 46 | MDIO_ACTIVE; |
| 47 | return 0; |
| 48 | } |
| 49 | |
| 50 | static int bb_mdio_tristate_wrap(struct bb_miiphy_bus *bus) |
| 51 | { |
| 52 | #ifdef MDIO_DECLARE |
| 53 | MDIO_DECLARE; |
| 54 | #endif |
| 55 | MDIO_TRISTATE; |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | static int bb_set_mdio_wrap(struct bb_miiphy_bus *bus, int v) |
| 60 | { |
| 61 | #ifdef MDIO_DECLARE |
| 62 | MDIO_DECLARE; |
| 63 | #endif |
| 64 | MDIO(v); |
| 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | static int bb_get_mdio_wrap(struct bb_miiphy_bus *bus, int *v) |
| 69 | { |
| 70 | #ifdef MDIO_DECLARE |
| 71 | MDIO_DECLARE; |
| 72 | #endif |
| 73 | *v = MDIO_READ; |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | static int bb_set_mdc_wrap(struct bb_miiphy_bus *bus, int v) |
| 78 | { |
| 79 | #ifdef MDC_DECLARE |
| 80 | MDC_DECLARE; |
| 81 | #endif |
| 82 | MDC(v); |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static int bb_delay_wrap(struct bb_miiphy_bus *bus) |
| 87 | { |
| 88 | MIIDELAY; |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | struct bb_miiphy_bus bb_miiphy_buses[] = { |
| 93 | { |
| 94 | .name = BB_MII_DEVNAME, |
| 95 | .init = bb_mii_init_wrap, |
| 96 | .mdio_active = bb_mdio_active_wrap, |
| 97 | .mdio_tristate = bb_mdio_tristate_wrap, |
| 98 | .set_mdio = bb_set_mdio_wrap, |
| 99 | .get_mdio = bb_get_mdio_wrap, |
| 100 | .set_mdc = bb_set_mdc_wrap, |
| 101 | .delay = bb_delay_wrap, |
| 102 | } |
| 103 | }; |
| 104 | |
| 105 | int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / |
Wolfgang Denk | d61fbcc | 2009-10-28 00:49:47 +0100 | [diff] [blame] | 106 | sizeof(bb_miiphy_buses[0]); |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 107 | #endif |
| 108 | |
Ovidiu Panait | 69d1ddb | 2020-11-28 10:43:17 +0200 | [diff] [blame] | 109 | int bb_miiphy_init(void) |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 110 | { |
| 111 | int i; |
| 112 | |
| 113 | for (i = 0; i < bb_miiphy_buses_num; i++) { |
Wolfgang Denk | d0813e5 | 2010-10-28 20:00:11 +0200 | [diff] [blame] | 114 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 115 | /* Relocate the hook pointers*/ |
| 116 | BB_MII_RELOCATE(bb_miiphy_buses[i].init, gd->reloc_off); |
| 117 | BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_active, gd->reloc_off); |
| 118 | BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_tristate, gd->reloc_off); |
| 119 | BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdio, gd->reloc_off); |
| 120 | BB_MII_RELOCATE(bb_miiphy_buses[i].get_mdio, gd->reloc_off); |
| 121 | BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdc, gd->reloc_off); |
| 122 | BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); |
| 123 | #endif |
| 124 | if (bb_miiphy_buses[i].init != NULL) { |
| 125 | bb_miiphy_buses[i].init(&bb_miiphy_buses[i]); |
| 126 | } |
| 127 | } |
Ovidiu Panait | 69d1ddb | 2020-11-28 10:43:17 +0200 | [diff] [blame] | 128 | |
| 129 | return 0; |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 130 | } |
| 131 | |
Ben Warren | 97824d6 | 2010-07-29 12:56:11 -0700 | [diff] [blame] | 132 | static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname) |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 133 | { |
| 134 | #ifdef CONFIG_BITBANGMII_MULTI |
| 135 | int i; |
| 136 | |
| 137 | /* Search the correct bus */ |
| 138 | for (i = 0; i < bb_miiphy_buses_num; i++) { |
| 139 | if (!strcmp(bb_miiphy_buses[i].name, devname)) { |
| 140 | return &bb_miiphy_buses[i]; |
| 141 | } |
| 142 | } |
| 143 | return NULL; |
| 144 | #else |
| 145 | /* We have just one bitbanging bus */ |
| 146 | return &bb_miiphy_buses[0]; |
| 147 | #endif |
| 148 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 149 | |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 150 | /***************************************************************************** |
| 151 | * |
| 152 | * Utility to send the preamble, address, and register (common to read |
| 153 | * and write). |
| 154 | */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 155 | static void miiphy_pre(struct bb_miiphy_bus *bus, char read, |
Wolfgang Denk | d61fbcc | 2009-10-28 00:49:47 +0100 | [diff] [blame] | 156 | unsigned char addr, unsigned char reg) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 157 | { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 158 | int j; |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 159 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 160 | /* |
| 161 | * Send a 32 bit preamble ('1's) with an extra '1' bit for good measure. |
| 162 | * The IEEE spec says this is a PHY optional requirement. The AMD |
| 163 | * 79C874 requires one after power up and one after a MII communications |
| 164 | * error. This means that we are doing more preambles than we need, |
| 165 | * but it is safer and will be much more robust. |
| 166 | */ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 167 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 168 | bus->mdio_active(bus); |
| 169 | bus->set_mdio(bus, 1); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 170 | for (j = 0; j < 32; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 171 | bus->set_mdc(bus, 0); |
| 172 | bus->delay(bus); |
| 173 | bus->set_mdc(bus, 1); |
| 174 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 175 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 176 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 177 | /* send the start bit (01) and the read opcode (10) or write (10) */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 178 | bus->set_mdc(bus, 0); |
| 179 | bus->set_mdio(bus, 0); |
| 180 | bus->delay(bus); |
| 181 | bus->set_mdc(bus, 1); |
| 182 | bus->delay(bus); |
| 183 | bus->set_mdc(bus, 0); |
| 184 | bus->set_mdio(bus, 1); |
| 185 | bus->delay(bus); |
| 186 | bus->set_mdc(bus, 1); |
| 187 | bus->delay(bus); |
| 188 | bus->set_mdc(bus, 0); |
| 189 | bus->set_mdio(bus, read); |
| 190 | bus->delay(bus); |
| 191 | bus->set_mdc(bus, 1); |
| 192 | bus->delay(bus); |
| 193 | bus->set_mdc(bus, 0); |
| 194 | bus->set_mdio(bus, !read); |
| 195 | bus->delay(bus); |
| 196 | bus->set_mdc(bus, 1); |
| 197 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 198 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 199 | /* send the PHY address */ |
| 200 | for (j = 0; j < 5; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 201 | bus->set_mdc(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 202 | if ((addr & 0x10) == 0) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 203 | bus->set_mdio(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 204 | } else { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 205 | bus->set_mdio(bus, 1); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 206 | } |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 207 | bus->delay(bus); |
| 208 | bus->set_mdc(bus, 1); |
| 209 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 210 | addr <<= 1; |
| 211 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 212 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 213 | /* send the register address */ |
| 214 | for (j = 0; j < 5; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 215 | bus->set_mdc(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 216 | if ((reg & 0x10) == 0) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 217 | bus->set_mdio(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 218 | } else { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 219 | bus->set_mdio(bus, 1); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 220 | } |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 221 | bus->delay(bus); |
| 222 | bus->set_mdc(bus, 1); |
| 223 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 224 | reg <<= 1; |
| 225 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 226 | } |
| 227 | |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 228 | /***************************************************************************** |
| 229 | * |
| 230 | * Read a MII PHY register. |
| 231 | * |
| 232 | * Returns: |
| 233 | * 0 on success |
| 234 | */ |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 235 | int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 236 | { |
Chris Brandt | 7e4d4d1 | 2017-11-03 08:30:13 -0500 | [diff] [blame] | 237 | unsigned short rdreg; /* register working value */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 238 | int v; |
| 239 | int j; /* counter */ |
| 240 | struct bb_miiphy_bus *bus; |
| 241 | |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 242 | bus = bb_miiphy_getbus(miidev->name); |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 243 | if (bus == NULL) { |
| 244 | return -1; |
| 245 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 246 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 247 | miiphy_pre (bus, 1, addr, reg); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 248 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 249 | /* tri-state our MDIO I/O pin so we can read */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 250 | bus->set_mdc(bus, 0); |
| 251 | bus->mdio_tristate(bus); |
| 252 | bus->delay(bus); |
| 253 | bus->set_mdc(bus, 1); |
| 254 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 255 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 256 | /* check the turnaround bit: the PHY should be driving it to zero */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 257 | bus->get_mdio(bus, &v); |
| 258 | if (v != 0) { |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 259 | /* puts ("PHY didn't drive TA low\n"); */ |
| 260 | for (j = 0; j < 32; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 261 | bus->set_mdc(bus, 0); |
| 262 | bus->delay(bus); |
| 263 | bus->set_mdc(bus, 1); |
| 264 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 265 | } |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 266 | /* There is no PHY, return */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 267 | return -1; |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 268 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 269 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 270 | bus->set_mdc(bus, 0); |
| 271 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 272 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 273 | /* read 16 bits of register data, MSB first */ |
| 274 | rdreg = 0; |
| 275 | for (j = 0; j < 16; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 276 | bus->set_mdc(bus, 1); |
| 277 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 278 | rdreg <<= 1; |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 279 | bus->get_mdio(bus, &v); |
| 280 | rdreg |= (v & 0x1); |
| 281 | bus->set_mdc(bus, 0); |
| 282 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 283 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 284 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 285 | bus->set_mdc(bus, 1); |
| 286 | bus->delay(bus); |
| 287 | bus->set_mdc(bus, 0); |
| 288 | bus->delay(bus); |
| 289 | bus->set_mdc(bus, 1); |
| 290 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 291 | |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 292 | #ifdef DEBUG |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 293 | printf("miiphy_read(0x%x) @ 0x%x = 0x%04x\n", reg, addr, rdreg); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 294 | #endif |
| 295 | |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 296 | return rdreg; |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 297 | } |
| 298 | |
| 299 | |
| 300 | /***************************************************************************** |
| 301 | * |
| 302 | * Write a MII PHY register. |
| 303 | * |
| 304 | * Returns: |
| 305 | * 0 on success |
| 306 | */ |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 307 | int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, |
| 308 | u16 value) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 309 | { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 310 | struct bb_miiphy_bus *bus; |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 311 | int j; /* counter */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 312 | |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 313 | bus = bb_miiphy_getbus(miidev->name); |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 314 | if (bus == NULL) { |
| 315 | /* Bus not found! */ |
| 316 | return -1; |
| 317 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 318 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 319 | miiphy_pre (bus, 0, addr, reg); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 320 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 321 | /* send the turnaround (10) */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 322 | bus->set_mdc(bus, 0); |
| 323 | bus->set_mdio(bus, 1); |
| 324 | bus->delay(bus); |
| 325 | bus->set_mdc(bus, 1); |
| 326 | bus->delay(bus); |
| 327 | bus->set_mdc(bus, 0); |
| 328 | bus->set_mdio(bus, 0); |
| 329 | bus->delay(bus); |
| 330 | bus->set_mdc(bus, 1); |
| 331 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 332 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 333 | /* write 16 bits of register data, MSB first */ |
| 334 | for (j = 0; j < 16; j++) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 335 | bus->set_mdc(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 336 | if ((value & 0x00008000) == 0) { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 337 | bus->set_mdio(bus, 0); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 338 | } else { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 339 | bus->set_mdio(bus, 1); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 340 | } |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 341 | bus->delay(bus); |
| 342 | bus->set_mdc(bus, 1); |
| 343 | bus->delay(bus); |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 344 | value <<= 1; |
| 345 | } |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 346 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 347 | /* |
| 348 | * Tri-state the MDIO line. |
| 349 | */ |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 350 | bus->mdio_tristate(bus); |
| 351 | bus->set_mdc(bus, 0); |
| 352 | bus->delay(bus); |
| 353 | bus->set_mdc(bus, 1); |
| 354 | bus->delay(bus); |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 355 | |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 356 | return 0; |
Wolfgang Denk | 9235e0c | 2009-10-25 23:00:09 +0100 | [diff] [blame] | 357 | } |