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Akshay Saraswatfdd9df32014-06-18 17:53:58 +05301/*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_PEACH_PIT_H
10#define __CONFIG_PEACH_PIT_H
11
Simon Glass50dfd2c2014-10-07 22:01:48 -060012#define CONFIG_ENV_IS_IN_SPI_FLASH
13#define CONFIG_SPI_FLASH
14#define CONFIG_ENV_SPI_BASE 0x12D30000
15#define FLASH_SIZE (0x4 << 20)
16#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
Hyungwon Hwangaa6bd5d2014-12-12 14:45:44 +090017#define CONFIG_SPI_BOOTING
Simon Glass50dfd2c2014-10-07 22:01:48 -060018
Sjoerd Simonsb2d517b2015-03-12 22:33:29 +010019#define MEM_LAYOUT_ENV_SETTINGS \
20 "bootm_size=0x10000000\0" \
21 "kernel_addr_r=0x22000000\0" \
22 "fdt_addr_r=0x23000000\0" \
23 "ramdisk_addr_r=0x23300000\0" \
24 "scriptaddr=0x30000000\0" \
25 "pxefile_addr_r=0x31000000\0"
26
Simon Glass252747a2014-10-07 22:01:46 -060027#include <configs/exynos5420-common.h>
Simon Glassfbff18d2014-10-07 22:01:47 -060028#include <configs/exynos5-dt-common.h>
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053029
Simon Glass50dfd2c2014-10-07 22:01:48 -060030#define CONFIG_BOARD_COMMON
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053031
Hyungwon Hwangaa6bd5d2014-12-12 14:45:44 +090032#define CONFIG_SYS_SDRAM_BASE 0x20000000
33#define CONFIG_SYS_TEXT_BASE 0x23E00000
34#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
35
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053036/* select serial console configuration */
37#define CONFIG_SERIAL3 /* use SERIAL 3 */
Hyungwon Hwangaa6bd5d2014-12-12 14:45:44 +090038#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053039
Akshay Saraswat62c2f9f2014-11-13 22:38:17 +053040#define CONFIG_SYS_PROMPT "Peach-Pit # "
41#define CONFIG_IDENT_STRING " for Peach-Pit"
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053042
Ajay Kumar88e36872014-09-05 16:53:38 +053043#define CONFIG_VIDEO_PARADE
44
45/* Display */
46#define CONFIG_LCD
47#ifdef CONFIG_LCD
48#define CONFIG_EXYNOS_FB
49#define CONFIG_EXYNOS_DP
50#define LCD_BPP LCD_COLOR16
51#endif
52
Simon Glass7a5a79f2014-10-07 22:01:41 -060053#define CONFIG_POWER_TPS65090_EC
54
Simon Glass50dfd2c2014-10-07 22:01:48 -060055#define CONFIG_USB_XHCI
56#define CONFIG_USB_XHCI_EXYNOS
57
Akshay Saraswat926aa812014-11-13 22:38:19 +053058/* DRAM Memory Banks */
59#define CONFIG_NR_DRAM_BANKS 4
60#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
61
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053062#endif /* __CONFIG_PEACH_PIT_H */