Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | # CONFIG_ARM64_SUPPORT_AARCH32 is not set |
| 3 | CONFIG_ARCH_OCTEONTX2=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x04000000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 5 | CONFIG_SYS_MALLOC_LEN=0x4008000 |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 6 | CONFIG_SYS_MALLOC_F_LEN=0x4000 |
| 7 | CONFIG_NR_DRAM_BANKS=1 |
| 8 | CONFIG_ENV_SIZE=0x8000 |
| 9 | CONFIG_ENV_OFFSET=0xF00000 |
| 10 | CONFIG_ENV_SECT_SIZE=0x10000 |
| 11 | CONFIG_TARGET_OCTEONTX2_96XX=y |
| 12 | CONFIG_DM_GPIO=y |
Simon Glass | 28ab212 | 2021-12-16 20:59:16 -0700 | [diff] [blame] | 13 | CONFIG_DEFAULT_DEVICE_TREE="octeontx" |
Tom Rini | ce53ec8 | 2022-08-23 15:24:14 -0400 | [diff] [blame^] | 14 | CONFIG_SYS_PROMPT="Marvell> " |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 15 | CONFIG_DEBUG_UART_BASE=0x87e028000000 |
| 16 | CONFIG_DEBUG_UART_CLOCK=24000000 |
Tom Rini | 4b2fcb3 | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 17 | CONFIG_SYS_LOAD_ADDR=0x4000000 |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 18 | CONFIG_DEBUG_UART=y |
| 19 | CONFIG_AHCI=y |
Tom Rini | 4ddbade | 2022-05-25 12:16:03 -0400 | [diff] [blame] | 20 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 21 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 22 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 23 | CONFIG_FIT=y |
| 24 | CONFIG_FIT_SIGNATURE=y |
Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 25 | CONFIG_SUPPORT_RAW_INITRD=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 26 | CONFIG_OF_BOARD_SETUP=y |
| 27 | CONFIG_BOOTDELAY=5 |
Tom Rini | a45a3ef | 2022-03-11 09:12:04 -0500 | [diff] [blame] | 28 | CONFIG_BOOT_RETRY=y |
| 29 | CONFIG_BOOT_RETRY_TIME=-1 |
| 30 | CONFIG_BOOT_RETRY_MIN=30 |
| 31 | CONFIG_RESET_TO_RETRY=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 32 | CONFIG_USE_BOOTARGS=y |
| 33 | CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M" |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 34 | # CONFIG_DISPLAY_CPUINFO is not set |
| 35 | CONFIG_BOARD_EARLY_INIT_R=y |
Tom Rini | 6e92361 | 2021-11-07 22:59:51 -0500 | [diff] [blame] | 36 | CONFIG_LAST_STAGE_INIT=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 37 | CONFIG_HUSH_PARSER=y |
Tom Rini | ba5c2b0 | 2022-05-11 16:21:06 -0400 | [diff] [blame] | 38 | CONFIG_SYS_MAXARGS=64 |
Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 39 | CONFIG_SYS_PBSIZE=1050 |
Tom Rini | f3c2f99 | 2022-06-25 19:29:46 -0400 | [diff] [blame] | 40 | CONFIG_SYS_BOOTM_LEN=0x10000000 |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 41 | # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set |
| 42 | CONFIG_CMD_MD5SUM=y |
| 43 | CONFIG_MD5SUM_VERIFY=y |
| 44 | CONFIG_CMD_MX_CYCLIC=y |
| 45 | CONFIG_CMD_MEMTEST=y |
| 46 | CONFIG_CMD_SHA1SUM=y |
| 47 | CONFIG_SHA1SUM_VERIFY=y |
| 48 | CONFIG_CMD_DM=y |
| 49 | # CONFIG_CMD_FLASH is not set |
| 50 | CONFIG_CMD_GPIO=y |
| 51 | CONFIG_CMD_I2C=y |
| 52 | CONFIG_CMD_MMC=y |
Tom Rini | 94694f5 | 2020-08-25 10:24:40 -0400 | [diff] [blame] | 53 | CONFIG_CMD_BKOPS_ENABLE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 54 | CONFIG_CMD_PART=y |
| 55 | CONFIG_CMD_PCI=y |
| 56 | CONFIG_CMD_SF_TEST=y |
| 57 | CONFIG_CMD_USB=y |
Stefan Roese | 74532e5 | 2020-09-23 11:01:32 +0200 | [diff] [blame] | 58 | CONFIG_CMD_WDT=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 59 | CONFIG_CMD_DHCP=y |
Tom Rini | 1c47c4a | 2022-02-25 11:19:50 -0500 | [diff] [blame] | 60 | CONFIG_BOOTP_BOOTFILESIZE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 61 | CONFIG_CMD_TFTPPUT=y |
| 62 | CONFIG_CMD_TFTPSRV=y |
| 63 | CONFIG_CMD_RARP=y |
Tom Rini | 065d661 | 2022-06-13 22:57:35 -0400 | [diff] [blame] | 64 | CONFIG_SYS_DISABLE_AUTOLOAD=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 65 | CONFIG_CMD_MII=y |
| 66 | CONFIG_CMD_PING=y |
| 67 | CONFIG_CMD_CDP=y |
| 68 | CONFIG_CMD_SNTP=y |
| 69 | CONFIG_CMD_DNS=y |
| 70 | CONFIG_CMD_LINK_LOCAL=y |
| 71 | CONFIG_CMD_PXE=y |
| 72 | CONFIG_CMD_TIME=y |
| 73 | CONFIG_CMD_EXT2=y |
| 74 | CONFIG_CMD_EXT4=y |
| 75 | CONFIG_CMD_EXT4_WRITE=y |
| 76 | CONFIG_CMD_FAT=y |
| 77 | CONFIG_CMD_FS_GENERIC=y |
| 78 | CONFIG_EFI_PARTITION=y |
| 79 | CONFIG_PARTITION_TYPE_GUID=y |
Tom Rini | 6fe8422 | 2021-11-07 22:59:38 -0500 | [diff] [blame] | 80 | CONFIG_ENV_OVERWRITE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 81 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 82 | CONFIG_VERSION_VARIABLE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 83 | CONFIG_NET_RANDOM_ETHADDR=y |
Tero Kristo | 0624c81 | 2021-05-12 11:03:04 +0300 | [diff] [blame] | 84 | CONFIG_TFTP_TSIZE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 85 | CONFIG_SCSI_AHCI=y |
| 86 | CONFIG_AHCI_PCI=y |
| 87 | CONFIG_DM_I2C=y |
| 88 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 89 | CONFIG_I2C_MUX=y |
| 90 | CONFIG_I2C_MUX_PCA954x=y |
| 91 | CONFIG_MISC=y |
Tom Rini | 5df873f | 2021-12-11 14:55:53 -0500 | [diff] [blame] | 92 | CONFIG_SUPPORT_EMMC_RPMB=y |
Tom Rini | a34469d | 2021-10-30 23:03:51 -0400 | [diff] [blame] | 93 | CONFIG_SUPPORT_EMMC_BOOT=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 94 | CONFIG_MMC_HS400_SUPPORT=y |
| 95 | CONFIG_MMC_OCTEONTX=y |
| 96 | CONFIG_MTD=y |
| 97 | CONFIG_DM_SPI_FLASH=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 98 | CONFIG_SF_DEFAULT_SPEED=125000000 |
| 99 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 100 | CONFIG_SPI_FLASH_MACRONIX=y |
| 101 | CONFIG_SPI_FLASH_SPANSION=y |
| 102 | CONFIG_SPI_FLASH_STMICRO=y |
| 103 | CONFIG_SPI_FLASH_WINBOND=y |
| 104 | CONFIG_PHYLIB=y |
| 105 | CONFIG_PHY_MARVELL=y |
| 106 | CONFIG_PHY_VITESSE=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 107 | CONFIG_E1000=y |
| 108 | CONFIG_E1000_SPI=y |
| 109 | CONFIG_CMD_E1000=y |
Stefan Roese | 444caf1 | 2020-10-19 08:02:12 +0200 | [diff] [blame] | 110 | CONFIG_NET_OCTEONTX2=y |
| 111 | CONFIG_OCTEONTX_SMI=y |
Mark Kettenis | f8463d6 | 2022-01-22 20:38:11 +0100 | [diff] [blame] | 112 | CONFIG_NVME_PCI=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 113 | CONFIG_PCI=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 114 | CONFIG_PCI_REGION_MULTI_ENTRY=y |
| 115 | CONFIG_PCI_SRIOV=y |
| 116 | CONFIG_PCI_ARID=y |
| 117 | CONFIG_PCI_OCTEONTX=y |
| 118 | CONFIG_DM_REGULATOR=y |
| 119 | CONFIG_DM_REGULATOR_FIXED=y |
| 120 | CONFIG_DM_REGULATOR_GPIO=y |
| 121 | CONFIG_DM_RTC=y |
| 122 | CONFIG_SCSI=y |
| 123 | CONFIG_DM_SCSI=y |
| 124 | CONFIG_DM_SERIAL=y |
| 125 | CONFIG_DEBUG_UART_SKIP_INIT=y |
| 126 | CONFIG_PL01X_SERIAL=y |
| 127 | CONFIG_SPI=y |
| 128 | CONFIG_DM_SPI=y |
| 129 | CONFIG_OCTEON_SPI=y |
| 130 | CONFIG_USB=y |
Suneel Garapati | d9e7246 | 2019-10-19 18:47:37 -0700 | [diff] [blame] | 131 | CONFIG_USB_XHCI_HCD=y |
| 132 | CONFIG_USB_XHCI_PCI=y |
| 133 | CONFIG_USB_STORAGE=y |
| 134 | CONFIG_USB_HOST_ETHER=y |
| 135 | CONFIG_USB_ETHER_ASIX=y |
| 136 | CONFIG_USB_ETHER_ASIX88179=y |
| 137 | CONFIG_USB_ETHER_RTL8152=y |
| 138 | CONFIG_WDT=y |
| 139 | CONFIG_ERRNO_STR=y |