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git01.mediatek.com / filogic / uboot / ce51ffaa0e1c7bd6c2ae4f2cf971bf0ef14e6d34 / . / configs / db-88f6820-amc_defconfig
blob: dcf2a25395e22714e83106beb9f3acda27aaa961 [file] [log] [blame]
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00800000
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
Chris Packham7d0fc8e2019-03-01 14:30:03 +1300[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x2000
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]7CONFIG_TARGET_DB_88F6820_AMC=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]8CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_SPL=y
10CONFIG_DEBUG_UART_BASE=0xd0012000
11CONFIG_DEBUG_UART_CLOCK=200000000
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]12CONFIG_SPL_SPI_FLASH_SUPPORT=y
13CONFIG_SPL_SPI_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]15CONFIG_NR_DRAM_BANKS=2
Chris Packhamc96aac22016-10-25 11:40:55 +1300[diff] [blame]16CONFIG_FIT=y
17CONFIG_FIT_VERBOSE=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]18CONFIG_BOOTDELAY=3
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]19CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]20# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]21CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]22CONFIG_SPL_I2C_SUPPORT=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]23CONFIG_SPL_SPI_LOAD=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]24# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]25CONFIG_CMD_I2C=y
26CONFIG_CMD_PCI=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]27CONFIG_CMD_SF=y
28CONFIG_CMD_SPI=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]29CONFIG_CMD_USB=y
30# CONFIG_CMD_SETEXPR is not set
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]31CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]32CONFIG_CMD_TFTPPUT=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]33CONFIG_CMD_MII=y
34CONFIG_CMD_PING=y
35CONFIG_CMD_CACHE=y
36CONFIG_CMD_TIME=y
37CONFIG_CMD_EXT2=y
38CONFIG_CMD_EXT4=y
39CONFIG_CMD_FAT=y
40CONFIG_CMD_FS_GENERIC=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]41CONFIG_EFI_PARTITION=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]42# CONFIG_PARTITION_UUIDS is not set
43# CONFIG_SPL_PARTITION_UUIDS is not set
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]44CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]45CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]46CONFIG_USE_ENV_SPI_MAX_HZ=y
47CONFIG_ENV_SPI_MAX_HZ=50000000
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]48CONFIG_SPL_OF_TRANSLATE=y
Chris Packhamf1370052018-12-07 16:19:42 +1300[diff] [blame]49CONFIG_BLK=y
50# CONFIG_SPL_BLK is not set
51# CONFIG_BLOCK_CACHE is not set
Chris Packham5bb30bc2017-05-02 20:35:25 +1200[diff] [blame]52CONFIG_DM_I2C=y
53CONFIG_SYS_I2C_MVTWSI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]54# CONFIG_MMC is not set
Adam Ford42efb612017-08-07 17:37:18 -0400[diff] [blame]55CONFIG_NAND=y
Chris Packham228efd02016-09-22 12:56:15 +1200[diff] [blame]56CONFIG_NAND_PXA3XX=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]57CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]58CONFIG_SF_DEFAULT_BUS=1
Chris Packhamb3a7ee52019-03-02 20:45:35 +1300[diff] [blame]59CONFIG_SPI_FLASH_BAR=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]60CONFIG_SPI_FLASH_MACRONIX=y
61CONFIG_SPI_FLASH_STMICRO=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]62CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]63CONFIG_PHY_GIGE=y
Chris Packham919041c2017-08-21 20:17:03 +1200[diff] [blame]64CONFIG_MVNETA=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]65CONFIG_MII=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]66CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]67CONFIG_PCI_MVEBU=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]68CONFIG_DEBUG_UART_SHIFT=2
69CONFIG_SYS_NS16550=y
Tuomas Tynkkynen13b5cb82018-02-07 02:42:22 +0200[diff] [blame]70CONFIG_KIRKWOOD_SPI=y
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]71CONFIG_USB=y
72CONFIG_DM_USB=y
73CONFIG_USB_EHCI_HCD=y
74CONFIG_USB_STORAGE=y