Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2019 - All Rights Reserved |
| 4 | * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. |
| 5 | */ |
| 6 | |
| 7 | #include <dt-bindings/gpio/gpio.h> |
| 8 | #include <dt-bindings/mfd/st,stpmic1.h> |
| 9 | |
| 10 | / { |
Patrick Delaunay | 4597d26 | 2023-07-10 10:38:45 +0200 | [diff] [blame] | 11 | aliases { |
| 12 | serial0 = &uart4; |
| 13 | serial1 = &usart3; |
| 14 | serial2 = &uart7; |
| 15 | }; |
| 16 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 17 | memory@c0000000 { |
| 18 | device_type = "memory"; |
| 19 | reg = <0xc0000000 0x20000000>; |
| 20 | }; |
| 21 | |
| 22 | reserved-memory { |
| 23 | #address-cells = <1>; |
| 24 | #size-cells = <1>; |
| 25 | ranges; |
| 26 | |
| 27 | mcuram2: mcuram2@10000000 { |
| 28 | compatible = "shared-dma-pool"; |
| 29 | reg = <0x10000000 0x40000>; |
| 30 | no-map; |
| 31 | }; |
| 32 | |
| 33 | vdev0vring0: vdev0vring0@10040000 { |
| 34 | compatible = "shared-dma-pool"; |
| 35 | reg = <0x10040000 0x1000>; |
| 36 | no-map; |
| 37 | }; |
| 38 | |
| 39 | vdev0vring1: vdev0vring1@10041000 { |
| 40 | compatible = "shared-dma-pool"; |
| 41 | reg = <0x10041000 0x1000>; |
| 42 | no-map; |
| 43 | }; |
| 44 | |
| 45 | vdev0buffer: vdev0buffer@10042000 { |
| 46 | compatible = "shared-dma-pool"; |
| 47 | reg = <0x10042000 0x4000>; |
| 48 | no-map; |
| 49 | }; |
| 50 | |
| 51 | mcuram: mcuram@30000000 { |
| 52 | compatible = "shared-dma-pool"; |
| 53 | reg = <0x30000000 0x40000>; |
| 54 | no-map; |
| 55 | }; |
| 56 | |
| 57 | retram: retram@38000000 { |
| 58 | compatible = "shared-dma-pool"; |
| 59 | reg = <0x38000000 0x10000>; |
| 60 | no-map; |
| 61 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | led { |
| 65 | compatible = "gpio-leds"; |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 66 | led-blue { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 67 | label = "heartbeat"; |
| 68 | gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; |
| 69 | linux,default-trigger = "heartbeat"; |
| 70 | default-state = "off"; |
| 71 | }; |
| 72 | }; |
| 73 | |
| 74 | sound { |
| 75 | compatible = "audio-graph-card"; |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 76 | label = "STM32MP15-DK"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 77 | routing = |
| 78 | "Playback" , "MCLK", |
| 79 | "Capture" , "MCLK", |
| 80 | "MICL" , "Mic Bias"; |
| 81 | dais = <&sai2a_port &sai2b_port &i2s2_port>; |
| 82 | status = "okay"; |
| 83 | }; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 84 | |
| 85 | vin: vin { |
| 86 | compatible = "regulator-fixed"; |
| 87 | regulator-name = "vin"; |
| 88 | regulator-min-microvolt = <5000000>; |
| 89 | regulator-max-microvolt = <5000000>; |
| 90 | regulator-always-on; |
| 91 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 92 | }; |
| 93 | |
| 94 | &adc { |
| 95 | pinctrl-names = "default"; |
| 96 | pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; |
| 97 | vdd-supply = <&vdd>; |
| 98 | vdda-supply = <&vdd>; |
| 99 | vref-supply = <&vrefbuf>; |
| 100 | status = "disabled"; |
| 101 | adc1: adc@0 { |
| 102 | /* |
| 103 | * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19. |
| 104 | * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: |
| 105 | * 5 * (56 + 47kOhms) * 5pF => 2.5us. |
| 106 | * Use arbitrary margin here (e.g. 5us). |
| 107 | */ |
| 108 | st,min-sample-time-nsecs = <5000>; |
| 109 | /* AIN connector, USB Type-C CC1 & CC2 */ |
| 110 | st,adc-channels = <0 1 6 13 18 19>; |
| 111 | status = "okay"; |
| 112 | }; |
| 113 | adc2: adc@100 { |
| 114 | /* AIN connector, USB Type-C CC1 & CC2 */ |
| 115 | st,adc-channels = <0 1 2 6 18 19>; |
| 116 | st,min-sample-time-nsecs = <5000>; |
| 117 | status = "okay"; |
| 118 | }; |
| 119 | }; |
| 120 | |
| 121 | &cec { |
| 122 | pinctrl-names = "default", "sleep"; |
| 123 | pinctrl-0 = <&cec_pins_b>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 124 | pinctrl-1 = <&cec_sleep_pins_b>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 125 | status = "okay"; |
| 126 | }; |
| 127 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 128 | &crc1 { |
| 129 | status = "okay"; |
| 130 | }; |
| 131 | |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 132 | &dts { |
| 133 | status = "okay"; |
| 134 | }; |
| 135 | |
Patrick Delaunay | 0e20c1f | 2020-05-25 12:19:42 +0200 | [diff] [blame] | 136 | &cpu0{ |
| 137 | cpu-supply = <&vddcore>; |
| 138 | }; |
| 139 | |
| 140 | &cpu1{ |
| 141 | cpu-supply = <&vddcore>; |
| 142 | }; |
| 143 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 144 | ðernet0 { |
| 145 | status = "okay"; |
| 146 | pinctrl-0 = <ðernet0_rgmii_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 147 | pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 148 | pinctrl-names = "default", "sleep"; |
| 149 | phy-mode = "rgmii-id"; |
| 150 | max-speed = <1000>; |
| 151 | phy-handle = <&phy0>; |
| 152 | |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 153 | mdio { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | compatible = "snps,dwmac-mdio"; |
| 157 | phy0: ethernet-phy@0 { |
| 158 | reg = <0>; |
| 159 | }; |
| 160 | }; |
| 161 | }; |
| 162 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 163 | &hash1 { |
| 164 | status = "okay"; |
| 165 | }; |
| 166 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 167 | &i2c1 { |
| 168 | pinctrl-names = "default", "sleep"; |
| 169 | pinctrl-0 = <&i2c1_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 170 | pinctrl-1 = <&i2c1_sleep_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 171 | i2c-scl-rising-time-ns = <100>; |
| 172 | i2c-scl-falling-time-ns = <7>; |
| 173 | status = "okay"; |
| 174 | /delete-property/dmas; |
| 175 | /delete-property/dma-names; |
| 176 | |
| 177 | hdmi-transmitter@39 { |
| 178 | compatible = "sil,sii9022"; |
| 179 | reg = <0x39>; |
| 180 | iovcc-supply = <&v3v3_hdmi>; |
| 181 | cvcc12-supply = <&v1v2_hdmi>; |
| 182 | reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>; |
| 183 | interrupts = <1 IRQ_TYPE_EDGE_FALLING>; |
| 184 | interrupt-parent = <&gpiog>; |
| 185 | #sound-dai-cells = <0>; |
| 186 | status = "okay"; |
| 187 | |
| 188 | ports { |
| 189 | #address-cells = <1>; |
| 190 | #size-cells = <0>; |
| 191 | |
| 192 | port@0 { |
| 193 | reg = <0>; |
| 194 | sii9022_in: endpoint { |
| 195 | remote-endpoint = <<dc_ep0_out>; |
| 196 | }; |
| 197 | }; |
| 198 | |
| 199 | port@3 { |
| 200 | reg = <3>; |
| 201 | sii9022_tx_endpoint: endpoint { |
| 202 | remote-endpoint = <&i2s2_endpoint>; |
| 203 | }; |
| 204 | }; |
| 205 | }; |
| 206 | }; |
| 207 | |
| 208 | cs42l51: cs42l51@4a { |
| 209 | compatible = "cirrus,cs42l51"; |
| 210 | reg = <0x4a>; |
| 211 | #sound-dai-cells = <0>; |
| 212 | VL-supply = <&v3v3>; |
| 213 | VD-supply = <&v1v8_audio>; |
| 214 | VA-supply = <&v1v8_audio>; |
| 215 | VAHP-supply = <&v1v8_audio>; |
| 216 | reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; |
| 217 | clocks = <&sai2a>; |
| 218 | clock-names = "MCLK"; |
| 219 | status = "okay"; |
| 220 | |
| 221 | cs42l51_port: port { |
| 222 | #address-cells = <1>; |
| 223 | #size-cells = <0>; |
| 224 | |
| 225 | cs42l51_tx_endpoint: endpoint@0 { |
| 226 | reg = <0>; |
| 227 | remote-endpoint = <&sai2a_endpoint>; |
Patrick Delaunay | c4c5c5f | 2021-10-21 11:54:11 +0200 | [diff] [blame] | 228 | frame-master = <&cs42l51_tx_endpoint>; |
| 229 | bitclock-master = <&cs42l51_tx_endpoint>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 230 | }; |
| 231 | |
| 232 | cs42l51_rx_endpoint: endpoint@1 { |
| 233 | reg = <1>; |
| 234 | remote-endpoint = <&sai2b_endpoint>; |
Patrick Delaunay | c4c5c5f | 2021-10-21 11:54:11 +0200 | [diff] [blame] | 235 | frame-master = <&cs42l51_rx_endpoint>; |
| 236 | bitclock-master = <&cs42l51_rx_endpoint>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 237 | }; |
| 238 | }; |
| 239 | }; |
| 240 | }; |
| 241 | |
| 242 | &i2c4 { |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 243 | pinctrl-names = "default", "sleep"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 244 | pinctrl-0 = <&i2c4_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 245 | pinctrl-1 = <&i2c4_sleep_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 246 | i2c-scl-rising-time-ns = <185>; |
| 247 | i2c-scl-falling-time-ns = <20>; |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 248 | clock-frequency = <400000>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 249 | status = "okay"; |
| 250 | /* spare dmas for other usage */ |
| 251 | /delete-property/dmas; |
| 252 | /delete-property/dma-names; |
| 253 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 254 | stusb1600@28 { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 255 | compatible = "st,stusb1600"; |
| 256 | reg = <0x28>; |
Patrick Delaunay | 37868aa | 2021-12-17 16:30:22 +0100 | [diff] [blame] | 257 | interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 258 | interrupt-parent = <&gpioi>; |
| 259 | pinctrl-names = "default"; |
| 260 | pinctrl-0 = <&stusb1600_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 261 | status = "okay"; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 262 | vdd-supply = <&vin>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 263 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 264 | connector { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 265 | compatible = "usb-c-connector"; |
| 266 | label = "USB-C"; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 267 | power-role = "dual"; |
| 268 | typec-power-opmode = "default"; |
| 269 | |
| 270 | port { |
| 271 | con_usbotg_hs_ep: endpoint { |
| 272 | remote-endpoint = <&usbotg_hs_ep>; |
| 273 | }; |
| 274 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 275 | }; |
| 276 | }; |
| 277 | |
| 278 | pmic: stpmic@33 { |
| 279 | compatible = "st,stpmic1"; |
| 280 | reg = <0x33>; |
| 281 | interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; |
| 282 | interrupt-controller; |
| 283 | #interrupt-cells = <2>; |
| 284 | status = "okay"; |
| 285 | |
| 286 | regulators { |
| 287 | compatible = "st,stpmic1-regulators"; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 288 | buck1-supply = <&vin>; |
| 289 | buck2-supply = <&vin>; |
| 290 | buck3-supply = <&vin>; |
| 291 | buck4-supply = <&vin>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 292 | ldo1-supply = <&v3v3>; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 293 | ldo2-supply = <&vin>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 294 | ldo3-supply = <&vdd_ddr>; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 295 | ldo4-supply = <&vin>; |
| 296 | ldo5-supply = <&vin>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 297 | ldo6-supply = <&v3v3>; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 298 | vref_ddr-supply = <&vin>; |
| 299 | boost-supply = <&vin>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 300 | pwr_sw1-supply = <&bst_out>; |
| 301 | pwr_sw2-supply = <&bst_out>; |
| 302 | |
| 303 | vddcore: buck1 { |
| 304 | regulator-name = "vddcore"; |
| 305 | regulator-min-microvolt = <1200000>; |
| 306 | regulator-max-microvolt = <1350000>; |
| 307 | regulator-always-on; |
| 308 | regulator-initial-mode = <0>; |
| 309 | regulator-over-current-protection; |
| 310 | }; |
| 311 | |
| 312 | vdd_ddr: buck2 { |
| 313 | regulator-name = "vdd_ddr"; |
| 314 | regulator-min-microvolt = <1350000>; |
| 315 | regulator-max-microvolt = <1350000>; |
| 316 | regulator-always-on; |
| 317 | regulator-initial-mode = <0>; |
| 318 | regulator-over-current-protection; |
| 319 | }; |
| 320 | |
| 321 | vdd: buck3 { |
| 322 | regulator-name = "vdd"; |
| 323 | regulator-min-microvolt = <3300000>; |
| 324 | regulator-max-microvolt = <3300000>; |
| 325 | regulator-always-on; |
| 326 | st,mask-reset; |
| 327 | regulator-initial-mode = <0>; |
| 328 | regulator-over-current-protection; |
| 329 | }; |
| 330 | |
| 331 | v3v3: buck4 { |
| 332 | regulator-name = "v3v3"; |
| 333 | regulator-min-microvolt = <3300000>; |
| 334 | regulator-max-microvolt = <3300000>; |
| 335 | regulator-always-on; |
| 336 | regulator-over-current-protection; |
| 337 | regulator-initial-mode = <0>; |
| 338 | }; |
| 339 | |
| 340 | v1v8_audio: ldo1 { |
| 341 | regulator-name = "v1v8_audio"; |
| 342 | regulator-min-microvolt = <1800000>; |
| 343 | regulator-max-microvolt = <1800000>; |
| 344 | regulator-always-on; |
| 345 | interrupts = <IT_CURLIM_LDO1 0>; |
| 346 | }; |
| 347 | |
| 348 | v3v3_hdmi: ldo2 { |
| 349 | regulator-name = "v3v3_hdmi"; |
| 350 | regulator-min-microvolt = <3300000>; |
| 351 | regulator-max-microvolt = <3300000>; |
| 352 | regulator-always-on; |
| 353 | interrupts = <IT_CURLIM_LDO2 0>; |
| 354 | }; |
| 355 | |
| 356 | vtt_ddr: ldo3 { |
| 357 | regulator-name = "vtt_ddr"; |
| 358 | regulator-min-microvolt = <500000>; |
| 359 | regulator-max-microvolt = <750000>; |
| 360 | regulator-always-on; |
| 361 | regulator-over-current-protection; |
| 362 | }; |
| 363 | |
| 364 | vdd_usb: ldo4 { |
| 365 | regulator-name = "vdd_usb"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 366 | interrupts = <IT_CURLIM_LDO4 0>; |
| 367 | }; |
| 368 | |
| 369 | vdda: ldo5 { |
| 370 | regulator-name = "vdda"; |
| 371 | regulator-min-microvolt = <2900000>; |
| 372 | regulator-max-microvolt = <2900000>; |
| 373 | interrupts = <IT_CURLIM_LDO5 0>; |
| 374 | regulator-boot-on; |
| 375 | }; |
| 376 | |
| 377 | v1v2_hdmi: ldo6 { |
| 378 | regulator-name = "v1v2_hdmi"; |
| 379 | regulator-min-microvolt = <1200000>; |
| 380 | regulator-max-microvolt = <1200000>; |
| 381 | regulator-always-on; |
| 382 | interrupts = <IT_CURLIM_LDO6 0>; |
| 383 | }; |
| 384 | |
| 385 | vref_ddr: vref_ddr { |
| 386 | regulator-name = "vref_ddr"; |
| 387 | regulator-always-on; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 388 | }; |
| 389 | |
Patrick Delaunay | 5be6a7f | 2022-12-14 16:25:00 +0100 | [diff] [blame] | 390 | bst_out: boost { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 391 | regulator-name = "bst_out"; |
| 392 | interrupts = <IT_OCP_BOOST 0>; |
Patrick Delaunay | 5be6a7f | 2022-12-14 16:25:00 +0100 | [diff] [blame] | 393 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 394 | |
| 395 | vbus_otg: pwr_sw1 { |
| 396 | regulator-name = "vbus_otg"; |
| 397 | interrupts = <IT_OCP_OTG 0>; |
Patrick Delaunay | 5be6a7f | 2022-12-14 16:25:00 +0100 | [diff] [blame] | 398 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 399 | |
Patrick Delaunay | 5be6a7f | 2022-12-14 16:25:00 +0100 | [diff] [blame] | 400 | vbus_sw: pwr_sw2 { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 401 | regulator-name = "vbus_sw"; |
| 402 | interrupts = <IT_OCP_SWOUT 0>; |
| 403 | regulator-active-discharge = <1>; |
Patrick Delaunay | 5be6a7f | 2022-12-14 16:25:00 +0100 | [diff] [blame] | 404 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 405 | }; |
| 406 | |
| 407 | onkey { |
| 408 | compatible = "st,stpmic1-onkey"; |
| 409 | interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; |
| 410 | interrupt-names = "onkey-falling", "onkey-rising"; |
| 411 | power-off-time-sec = <10>; |
| 412 | status = "okay"; |
| 413 | }; |
| 414 | |
| 415 | watchdog { |
| 416 | compatible = "st,stpmic1-wdt"; |
| 417 | status = "disabled"; |
| 418 | }; |
| 419 | }; |
| 420 | }; |
| 421 | |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 422 | &i2c5 { |
| 423 | pinctrl-names = "default", "sleep"; |
| 424 | pinctrl-0 = <&i2c5_pins_a>; |
| 425 | pinctrl-1 = <&i2c5_sleep_pins_a>; |
| 426 | i2c-scl-rising-time-ns = <185>; |
| 427 | i2c-scl-falling-time-ns = <20>; |
| 428 | clock-frequency = <400000>; |
| 429 | /* spare dmas for other usage */ |
| 430 | /delete-property/dmas; |
| 431 | /delete-property/dma-names; |
| 432 | status = "disabled"; |
| 433 | }; |
| 434 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 435 | &i2s2 { |
| 436 | clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; |
| 437 | clock-names = "pclk", "i2sclk", "x8k", "x11k"; |
| 438 | pinctrl-names = "default", "sleep"; |
| 439 | pinctrl-0 = <&i2s2_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 440 | pinctrl-1 = <&i2s2_sleep_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 441 | status = "okay"; |
| 442 | |
| 443 | i2s2_port: port { |
| 444 | i2s2_endpoint: endpoint { |
| 445 | remote-endpoint = <&sii9022_tx_endpoint>; |
| 446 | format = "i2s"; |
| 447 | mclk-fs = <256>; |
| 448 | }; |
| 449 | }; |
| 450 | }; |
| 451 | |
| 452 | &ipcc { |
| 453 | status = "okay"; |
| 454 | }; |
| 455 | |
| 456 | &iwdg2 { |
| 457 | timeout-sec = <32>; |
| 458 | status = "okay"; |
| 459 | }; |
| 460 | |
| 461 | <dc { |
| 462 | pinctrl-names = "default", "sleep"; |
| 463 | pinctrl-0 = <<dc_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 464 | pinctrl-1 = <<dc_sleep_pins_a>; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 465 | status = "okay"; |
| 466 | |
| 467 | port { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 468 | ltdc_ep0_out: endpoint@0 { |
| 469 | reg = <0>; |
| 470 | remote-endpoint = <&sii9022_in>; |
| 471 | }; |
| 472 | }; |
| 473 | }; |
| 474 | |
| 475 | &m4_rproc { |
| 476 | memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, |
| 477 | <&vdev0vring1>, <&vdev0buffer>; |
Patrick Delaunay | c4c5c5f | 2021-10-21 11:54:11 +0200 | [diff] [blame] | 478 | mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; |
| 479 | mbox-names = "vq0", "vq1", "shutdown", "detach"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 480 | interrupt-parent = <&exti>; |
| 481 | interrupts = <68 1>; |
| 482 | status = "okay"; |
| 483 | }; |
| 484 | |
| 485 | &pwr_regulators { |
| 486 | vdd-supply = <&vdd>; |
| 487 | vdd_3v3_usbfs-supply = <&vdd_usb>; |
| 488 | }; |
| 489 | |
| 490 | &rng1 { |
| 491 | status = "okay"; |
| 492 | }; |
| 493 | |
| 494 | &rtc { |
| 495 | status = "okay"; |
| 496 | }; |
| 497 | |
| 498 | &sai2 { |
| 499 | clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>; |
| 500 | clock-names = "pclk", "x8k", "x11k"; |
| 501 | pinctrl-names = "default", "sleep"; |
| 502 | pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>; |
| 503 | pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>; |
| 504 | status = "okay"; |
| 505 | |
| 506 | sai2a: audio-controller@4400b004 { |
| 507 | #clock-cells = <0>; |
| 508 | dma-names = "tx"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 509 | status = "okay"; |
| 510 | |
| 511 | sai2a_port: port { |
| 512 | sai2a_endpoint: endpoint { |
| 513 | remote-endpoint = <&cs42l51_tx_endpoint>; |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 514 | dai-format = "i2s"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 515 | mclk-fs = <256>; |
| 516 | dai-tdm-slot-num = <2>; |
| 517 | dai-tdm-slot-width = <32>; |
| 518 | }; |
| 519 | }; |
| 520 | }; |
| 521 | |
| 522 | sai2b: audio-controller@4400b024 { |
| 523 | dma-names = "rx"; |
| 524 | st,sync = <&sai2a 2>; |
| 525 | clocks = <&rcc SAI2_K>, <&sai2a>; |
| 526 | clock-names = "sai_ck", "MCLK"; |
| 527 | status = "okay"; |
| 528 | |
| 529 | sai2b_port: port { |
| 530 | sai2b_endpoint: endpoint { |
| 531 | remote-endpoint = <&cs42l51_rx_endpoint>; |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 532 | dai-format = "i2s"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 533 | mclk-fs = <256>; |
| 534 | dai-tdm-slot-num = <2>; |
| 535 | dai-tdm-slot-width = <32>; |
| 536 | }; |
| 537 | }; |
| 538 | }; |
| 539 | }; |
| 540 | |
| 541 | &sdmmc1 { |
| 542 | pinctrl-names = "default", "opendrain", "sleep"; |
| 543 | pinctrl-0 = <&sdmmc1_b4_pins_a>; |
| 544 | pinctrl-1 = <&sdmmc1_b4_od_pins_a>; |
| 545 | pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 546 | cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; |
| 547 | disable-wp; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 548 | st,neg-edge; |
| 549 | bus-width = <4>; |
| 550 | vmmc-supply = <&v3v3>; |
| 551 | status = "okay"; |
| 552 | }; |
| 553 | |
| 554 | &sdmmc3 { |
| 555 | pinctrl-names = "default", "opendrain", "sleep"; |
| 556 | pinctrl-0 = <&sdmmc3_b4_pins_a>; |
| 557 | pinctrl-1 = <&sdmmc3_b4_od_pins_a>; |
| 558 | pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; |
| 559 | broken-cd; |
| 560 | st,neg-edge; |
| 561 | bus-width = <4>; |
| 562 | vmmc-supply = <&v3v3>; |
| 563 | status = "disabled"; |
| 564 | }; |
| 565 | |
| 566 | &timers1 { |
| 567 | /* spare dmas for other usage */ |
| 568 | /delete-property/dmas; |
| 569 | /delete-property/dma-names; |
| 570 | status = "disabled"; |
| 571 | pwm { |
| 572 | pinctrl-0 = <&pwm1_pins_a>; |
| 573 | pinctrl-1 = <&pwm1_sleep_pins_a>; |
| 574 | pinctrl-names = "default", "sleep"; |
| 575 | status = "okay"; |
| 576 | }; |
| 577 | timer@0 { |
| 578 | status = "okay"; |
| 579 | }; |
| 580 | }; |
| 581 | |
| 582 | &timers3 { |
| 583 | /delete-property/dmas; |
| 584 | /delete-property/dma-names; |
| 585 | status = "disabled"; |
| 586 | pwm { |
| 587 | pinctrl-0 = <&pwm3_pins_a>; |
| 588 | pinctrl-1 = <&pwm3_sleep_pins_a>; |
| 589 | pinctrl-names = "default", "sleep"; |
| 590 | status = "okay"; |
| 591 | }; |
| 592 | timer@2 { |
| 593 | status = "okay"; |
| 594 | }; |
| 595 | }; |
| 596 | |
| 597 | &timers4 { |
| 598 | /delete-property/dmas; |
| 599 | /delete-property/dma-names; |
| 600 | status = "disabled"; |
| 601 | pwm { |
| 602 | pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>; |
| 603 | pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>; |
| 604 | pinctrl-names = "default", "sleep"; |
| 605 | status = "okay"; |
| 606 | }; |
| 607 | timer@3 { |
| 608 | status = "okay"; |
| 609 | }; |
| 610 | }; |
| 611 | |
| 612 | &timers5 { |
| 613 | /delete-property/dmas; |
| 614 | /delete-property/dma-names; |
| 615 | status = "disabled"; |
| 616 | pwm { |
| 617 | pinctrl-0 = <&pwm5_pins_a>; |
| 618 | pinctrl-1 = <&pwm5_sleep_pins_a>; |
| 619 | pinctrl-names = "default", "sleep"; |
| 620 | status = "okay"; |
| 621 | }; |
| 622 | timer@4 { |
| 623 | status = "okay"; |
| 624 | }; |
| 625 | }; |
| 626 | |
| 627 | &timers6 { |
| 628 | /delete-property/dmas; |
| 629 | /delete-property/dma-names; |
| 630 | status = "disabled"; |
| 631 | timer@5 { |
| 632 | status = "okay"; |
| 633 | }; |
| 634 | }; |
| 635 | |
| 636 | &timers12 { |
| 637 | /delete-property/dmas; |
| 638 | /delete-property/dma-names; |
| 639 | status = "disabled"; |
| 640 | pwm { |
| 641 | pinctrl-0 = <&pwm12_pins_a>; |
| 642 | pinctrl-1 = <&pwm12_sleep_pins_a>; |
| 643 | pinctrl-names = "default", "sleep"; |
| 644 | status = "okay"; |
| 645 | }; |
| 646 | timer@11 { |
| 647 | status = "okay"; |
| 648 | }; |
| 649 | }; |
| 650 | |
| 651 | &uart4 { |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 652 | pinctrl-names = "default", "sleep", "idle"; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 653 | pinctrl-0 = <&uart4_pins_a>; |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 654 | pinctrl-1 = <&uart4_sleep_pins_a>; |
| 655 | pinctrl-2 = <&uart4_idle_pins_a>; |
Patrick Delaunay | 6f18219 | 2022-04-26 15:38:05 +0200 | [diff] [blame] | 656 | /delete-property/dmas; |
| 657 | /delete-property/dma-names; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 658 | status = "okay"; |
| 659 | }; |
| 660 | |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 661 | &uart7 { |
| 662 | pinctrl-names = "default", "sleep", "idle"; |
| 663 | pinctrl-0 = <&uart7_pins_c>; |
| 664 | pinctrl-1 = <&uart7_sleep_pins_c>; |
| 665 | pinctrl-2 = <&uart7_idle_pins_c>; |
Patrick Delaunay | 6f18219 | 2022-04-26 15:38:05 +0200 | [diff] [blame] | 666 | /delete-property/dmas; |
| 667 | /delete-property/dma-names; |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 668 | status = "disabled"; |
| 669 | }; |
| 670 | |
| 671 | &usart3 { |
| 672 | pinctrl-names = "default", "sleep", "idle"; |
| 673 | pinctrl-0 = <&usart3_pins_c>; |
| 674 | pinctrl-1 = <&usart3_sleep_pins_c>; |
| 675 | pinctrl-2 = <&usart3_idle_pins_c>; |
| 676 | uart-has-rtscts; |
| 677 | status = "disabled"; |
| 678 | }; |
| 679 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 680 | &usbh_ehci { |
| 681 | phys = <&usbphyc_port0>; |
| 682 | status = "okay"; |
Patrick Delaunay | 75785d4 | 2022-09-07 13:42:23 +0200 | [diff] [blame] | 683 | #address-cells = <1>; |
| 684 | #size-cells = <0>; |
| 685 | /* onboard HUB */ |
| 686 | hub@1 { |
| 687 | compatible = "usb424,2514"; |
| 688 | reg = <1>; |
| 689 | vdd-supply = <&v3v3>; |
| 690 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 691 | }; |
| 692 | |
| 693 | &usbotg_hs { |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 694 | phys = <&usbphyc_port1 0>; |
| 695 | phy-names = "usb2-phy"; |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 696 | usb-role-switch; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 697 | status = "okay"; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 698 | |
| 699 | port { |
| 700 | usbotg_hs_ep: endpoint { |
| 701 | remote-endpoint = <&con_usbotg_hs_ep>; |
| 702 | }; |
| 703 | }; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 704 | }; |
| 705 | |
| 706 | &usbphyc { |
| 707 | status = "okay"; |
| 708 | }; |
| 709 | |
| 710 | &usbphyc_port0 { |
| 711 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | b3f8d83 | 2022-01-31 16:07:54 +0100 | [diff] [blame] | 712 | st,tune-hs-dc-level = <2>; |
| 713 | st,enable-fs-rftime-tuning; |
| 714 | st,enable-hs-rftime-reduction; |
| 715 | st,trim-hs-current = <15>; |
| 716 | st,trim-hs-impedance = <1>; |
| 717 | st,tune-squelch-level = <3>; |
| 718 | st,tune-hs-rx-offset = <2>; |
| 719 | st,no-lsfs-sc; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 720 | }; |
| 721 | |
| 722 | &usbphyc_port1 { |
| 723 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | b3f8d83 | 2022-01-31 16:07:54 +0100 | [diff] [blame] | 724 | st,tune-hs-dc-level = <2>; |
| 725 | st,enable-fs-rftime-tuning; |
| 726 | st,enable-hs-rftime-reduction; |
| 727 | st,trim-hs-current = <15>; |
| 728 | st,trim-hs-impedance = <1>; |
| 729 | st,tune-squelch-level = <3>; |
| 730 | st,tune-hs-rx-offset = <2>; |
| 731 | st,no-lsfs-sc; |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 732 | }; |
| 733 | |
| 734 | &vrefbuf { |
| 735 | regulator-min-microvolt = <2500000>; |
| 736 | regulator-max-microvolt = <2500000>; |
| 737 | vdda-supply = <&vdd>; |
| 738 | status = "okay"; |
| 739 | }; |