Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 1 | /* |
| 2 | * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl_matrix.h] |
| 3 | * |
| 4 | * Copyright (C) 2007 Atmel Corporation |
| 5 | * |
| 6 | * Memory Controllers (MATRIX, EBI) - System peripherals registers. |
| 7 | * Based on AT91SAM9RL datasheet revision A. (Preliminary) |
| 8 | * |
| 9 | * This file is subject to the terms and conditions of the GNU General Public |
| 10 | * License. See the file COPYING in the main directory of this archive for |
| 11 | * more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef AT91SAM9RL_MATRIX_H |
| 15 | #define AT91SAM9RL_MATRIX_H |
| 16 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 17 | #ifndef __ASSEMBLY__ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 18 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 19 | struct at91_matrix { |
| 20 | u32 mcfg[16]; /* Master Configuration Registers */ |
| 21 | u32 scfg[16]; /* Slave Configuration Registers */ |
| 22 | u32 pras[16][2]; /* Priority Assignment Slave Registers */ |
| 23 | u32 mrcr; /* Master Remap Control Register */ |
| 24 | u32 filler[7]; |
| 25 | u32 ebicsa; /* EBI Chip Select Assignment Register */ |
| 26 | }; |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 27 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 28 | #endif /* __ASSEMBLY__ */ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 29 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 30 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) |
| 31 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) |
| 32 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) |
| 33 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) |
| 34 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 35 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 36 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
| 37 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) |
| 38 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) |
| 39 | #define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 |
| 40 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) |
| 41 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 42 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 43 | #define AT91_MATRIX_M0PR_SHIFT 0 |
| 44 | #define AT91_MATRIX_M1PR_SHIFT 4 |
| 45 | #define AT91_MATRIX_M2PR_SHIFT 8 |
| 46 | #define AT91_MATRIX_M3PR_SHIFT 12 |
| 47 | #define AT91_MATRIX_M4PR_SHIFT 16 |
| 48 | #define AT91_MATRIX_M5PR_SHIFT 20 |
| 49 | |
| 50 | #define AT91_MATRIX_RCB0 (1 << 0) |
| 51 | #define AT91_MATRIX_RCB1 (1 << 1) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 52 | |
Xu, Hong | 16c092b | 2011-08-01 03:56:32 +0000 | [diff] [blame] | 53 | #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) |
| 54 | #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) |
| 55 | #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) |
| 56 | #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) |
| 57 | #define AT91_MATRIX_DBPUC (1 << 8) |
| 58 | #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) |
| 59 | #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 60 | |
| 61 | #endif |