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git01.mediatek.com / filogic / uboot / cdf83fd264c5c230ea5434468abffce0350e76ed / . / board / renesas / gose / qos.c
blob: 29817e1841e6dc93a7655365d08982f8de542809 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]2/*
3 * board/renesas/gose/qos.c
4 * This file is gose QoS setting.
5 *
6 * Copyright (C) 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]7 */
8
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]9#include <asm/processor.h>
10#include <asm/mach-types.h>
11#include <asm/io.h>
Marek Vasut97a070b2024-02-27 17:05:54 +0100[diff] [blame]12#include <asm/arch/renesas.h>
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]13
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]14#if defined(CONFIG_RENESAS_EXTRAM_BOOT)
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]15/* QoS version 0.311 */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]16enum {
17 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
18 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
19 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
20 DBSC3_15,
21 DBSC3_NR,
22};
23
24static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
25 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
26 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
27 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
28 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
29 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
30 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
31 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
32 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
33 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
34 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
35 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
36 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
37 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
38 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
39 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
40 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
41};
42
43static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
44 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
45 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
46 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
47 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
48 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
49 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
50 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
51 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
52 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
53 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
54 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
55 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
56 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
57 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
58 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
59 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
60};
61
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]62#if defined(CONFIG_QOS_PRI_MEDIA)
63#define is_qos_pri_media() 1
64#else
65#define is_qos_pri_media() 0
66#endif
67
68#if defined(CONFIG_QOS_PRI_NORMAL)
69#define is_qos_pri_normal() 1
70#else
71#define is_qos_pri_normal() 0
72#endif
73
74#if defined(CONFIG_QOS_PRI_GFX)
75#define is_qos_pri_gfx() 1
76#else
77#define is_qos_pri_gfx() 0
78#endif
79
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]80void qos_init(void)
81{
82 int i;
83 struct rcar_s3c *s3c;
84 struct rcar_s3c_qos *s3c_qos;
85 struct rcar_dbsc3_qos *qos_addr;
86 struct rcar_mxi *mxi;
87 struct rcar_mxi_qos *mxi_qos;
88 struct rcar_axi_qos *axi_qos;
89
90 /* DBSC DBADJ2 */
91 writel(0x20042004, DBSC3_0_DBADJ2);
92
93 /* S3C -QoS */
94 s3c = (struct rcar_s3c *)S3C_BASE;
95 writel(0x00000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]96 if (is_qos_pri_media()) {
97 writel(0x1F0B0604, &s3c->s3crorr);
98 writel(0x1F0E0705, &s3c->s3cworr);
99 } else if (is_qos_pri_normal()) {
100 writel(0x1F0B0908, &s3c->s3crorr);
101 writel(0x1F0C0A08, &s3c->s3cworr);
102 } else if (is_qos_pri_gfx()) {
103 writel(0x1F0B0B0B, &s3c->s3crorr);
104 writel(0x1F0E0C0C, &s3c->s3cworr);
105 }
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]106 /* QoS Control Registers */
107 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
108 writel(0x00890089, &s3c_qos->s3cqos0);
109 writel(0x20960010, &s3c_qos->s3cqos1);
110 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]111 if (is_qos_pri_media())
112 writel(0x20AA2300, &s3c_qos->s3cqos3);
113 else if (is_qos_pri_normal())
114 writel(0x20AA2200, &s3c_qos->s3cqos3);
115 else if (is_qos_pri_gfx())
116 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]117 writel(0x00002032, &s3c_qos->s3cqos4);
118 writel(0x20960010, &s3c_qos->s3cqos5);
119 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]120 if (is_qos_pri_media())
121 writel(0x20AA2300, &s3c_qos->s3cqos7);
122 else if (is_qos_pri_normal())
123 writel(0x20AA2200, &s3c_qos->s3cqos7);
124 else if (is_qos_pri_gfx())
125 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]126 writel(0x00002032, &s3c_qos->s3cqos8);
127
128 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
129 writel(0x00890089, &s3c_qos->s3cqos0);
130 writel(0x20960010, &s3c_qos->s3cqos1);
131 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]132 if (is_qos_pri_media())
133 writel(0x20AA2300, &s3c_qos->s3cqos3);
134 else if (is_qos_pri_normal())
135 writel(0x20AA2200, &s3c_qos->s3cqos3);
136 else if (is_qos_pri_gfx())
137 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]138 writel(0x00002032, &s3c_qos->s3cqos4);
139 writel(0x20960010, &s3c_qos->s3cqos5);
140 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]141 if (is_qos_pri_media())
142 writel(0x20AA2300, &s3c_qos->s3cqos7);
143 else if (is_qos_pri_normal())
144 writel(0x20AA2200, &s3c_qos->s3cqos7);
145 else if (is_qos_pri_gfx())
146 writel(0x20AA2100, &s3c_qos->s3cqos7);
147 writel(0x00002032, &s3c_qos->s3cqos4);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]148 writel(0x00002032, &s3c_qos->s3cqos8);
149
150 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]151 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]152 writel(0x20960020, &s3c_qos->s3cqos1);
153 writel(0x20302030, &s3c_qos->s3cqos2);
154 writel(0x20AA20DC, &s3c_qos->s3cqos3);
155 writel(0x00002032, &s3c_qos->s3cqos4);
156 writel(0x20960020, &s3c_qos->s3cqos5);
157 writel(0x20302030, &s3c_qos->s3cqos6);
158 writel(0x20AA20DC, &s3c_qos->s3cqos7);
159 writel(0x00002032, &s3c_qos->s3cqos8);
160
161 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]162 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]163 writel(0x20960020, &s3c_qos->s3cqos1);
164 writel(0x20302030, &s3c_qos->s3cqos2);
165 writel(0x20AA20FA, &s3c_qos->s3cqos3);
166 writel(0x00002032, &s3c_qos->s3cqos4);
167 writel(0x20960020, &s3c_qos->s3cqos5);
168 writel(0x20302030, &s3c_qos->s3cqos6);
169 writel(0x20AA20FA, &s3c_qos->s3cqos7);
170 writel(0x00002032, &s3c_qos->s3cqos8);
171
172 /* DBSC -QoS */
173 /* DBSC0 - Read */
174 for (i = DBSC3_00; i < DBSC3_NR; i++) {
175 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
176 writel(0x00000002, &qos_addr->dblgcnt);
177 writel(0x00002096, &qos_addr->dbtmval0);
178 writel(0x00002064, &qos_addr->dbtmval1);
179 writel(0x00002032, &qos_addr->dbtmval2);
180 writel(0x00001FB0, &qos_addr->dbtmval3);
181 writel(0x00000001, &qos_addr->dbrqctr);
182 writel(0x00002078, &qos_addr->dbthres0);
183 writel(0x0000204B, &qos_addr->dbthres1);
184 writel(0x0000201E, &qos_addr->dbthres2);
185 writel(0x00000001, &qos_addr->dblgqon);
186 }
187
188 /* DBSC0 - Write */
189 for (i = DBSC3_00; i < DBSC3_NR; i++) {
190 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
191 writel(0x00000002, &qos_addr->dblgcnt);
192 writel(0x00002096, &qos_addr->dbtmval0);
193 writel(0x00002064, &qos_addr->dbtmval1);
194 writel(0x00002050, &qos_addr->dbtmval2);
195 writel(0x0000203A, &qos_addr->dbtmval3);
196 writel(0x00000001, &qos_addr->dbrqctr);
197 writel(0x00002078, &qos_addr->dbthres0);
198 writel(0x0000204B, &qos_addr->dbthres1);
199 writel(0x0000203C, &qos_addr->dbthres2);
200 writel(0x00000001, &qos_addr->dblgqon);
201 }
202
203 /* CCI-400 -QoS */
204 writel(0x20001000, CCI_400_MAXOT_1);
205 writel(0x20001000, CCI_400_MAXOT_2);
206 writel(0x0000000C, CCI_400_QOSCNTL_1);
207 writel(0x0000000C, CCI_400_QOSCNTL_2);
208
209 /* MXI -QoS */
210 /* Transaction Control (MXI) */
211 mxi = (struct rcar_mxi *)MXI_BASE;
212 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]213 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]214 writel(0x00200000, &mxi->mxs3cracr);
215 writel(0x00200000, &mxi->mxs3cwacr);
216 writel(0x00200000, &mxi->mxaxiracr);
217 writel(0x00200000, &mxi->mxaxiwacr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]218 writel(0x00780080, &mxi->mxsaar0);
219 writel(0x02000800, &mxi->mxsaar1);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]220
221 /* QoS Control (MXI) */
222 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
223 writel(0x0000000C, &mxi_qos->vspdu0);
224 writel(0x0000000C, &mxi_qos->vspdu1);
225 writel(0x0000000E, &mxi_qos->du0);
226
227 /* AXI -QoS */
228 /* Transaction Control (MXI) */
229 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
230 writel(0x00000002, &axi_qos->qosconf);
231 writel(0x00002245, &axi_qos->qosctset0);
232 writel(0x00002096, &axi_qos->qosctset1);
233 writel(0x00002030, &axi_qos->qosctset2);
234 writel(0x00002030, &axi_qos->qosctset3);
235 writel(0x00000001, &axi_qos->qosreqctr);
236 writel(0x00002064, &axi_qos->qosthres0);
237 writel(0x00002004, &axi_qos->qosthres1);
238 writel(0x00000000, &axi_qos->qosthres2);
239 writel(0x00000001, &axi_qos->qosqon);
240
241 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
242 writel(0x00000000, &axi_qos->qosconf);
243 writel(0x000020A6, &axi_qos->qosctset0);
244 writel(0x00000001, &axi_qos->qosreqctr);
245 writel(0x00002064, &axi_qos->qosthres0);
246 writel(0x00002004, &axi_qos->qosthres1);
247 writel(0x00000000, &axi_qos->qosthres2);
248 writel(0x00000001, &axi_qos->qosqon);
249
250 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
251 writel(0x00000000, &axi_qos->qosconf);
252 writel(0x000020A6, &axi_qos->qosctset0);
253 writel(0x00000001, &axi_qos->qosreqctr);
254 writel(0x00002064, &axi_qos->qosthres0);
255 writel(0x00002004, &axi_qos->qosthres1);
256 writel(0x00000000, &axi_qos->qosthres2);
257 writel(0x00000001, &axi_qos->qosqon);
258
259 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
260 writel(0x00000000, &axi_qos->qosconf);
261 writel(0x00002021, &axi_qos->qosctset0);
262 writel(0x00000001, &axi_qos->qosreqctr);
263 writel(0x00002064, &axi_qos->qosthres0);
264 writel(0x00002004, &axi_qos->qosthres1);
265 writel(0x00000000, &axi_qos->qosthres2);
266 writel(0x00000001, &axi_qos->qosqon);
267
268 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
269 writel(0x00000000, &axi_qos->qosconf);
270 writel(0x00002037, &axi_qos->qosctset0);
271 writel(0x00000001, &axi_qos->qosreqctr);
272 writel(0x00002064, &axi_qos->qosthres0);
273 writel(0x00002004, &axi_qos->qosthres1);
274 writel(0x00000000, &axi_qos->qosthres2);
275 writel(0x00000001, &axi_qos->qosqon);
276
277 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
278 writel(0x00000002, &axi_qos->qosconf);
279 writel(0x00002245, &axi_qos->qosctset0);
280 writel(0x00002096, &axi_qos->qosctset1);
281 writel(0x00002030, &axi_qos->qosctset2);
282 writel(0x00002030, &axi_qos->qosctset3);
283 writel(0x00000001, &axi_qos->qosreqctr);
284 writel(0x00002064, &axi_qos->qosthres0);
285 writel(0x00002004, &axi_qos->qosthres1);
286 writel(0x00000000, &axi_qos->qosthres2);
287 writel(0x00000001, &axi_qos->qosqon);
288
289 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
290 writel(0x00000002, &axi_qos->qosconf);
291 writel(0x00002245, &axi_qos->qosctset0);
292 writel(0x00002096, &axi_qos->qosctset1);
293 writel(0x00002030, &axi_qos->qosctset2);
294 writel(0x00002030, &axi_qos->qosctset3);
295 writel(0x00000001, &axi_qos->qosreqctr);
296 writel(0x00002064, &axi_qos->qosthres0);
297 writel(0x00002004, &axi_qos->qosthres1);
298 writel(0x00000000, &axi_qos->qosthres2);
299 writel(0x00000001, &axi_qos->qosqon);
300
301 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
302 writel(0x00000002, &axi_qos->qosconf);
303 writel(0x00002245, &axi_qos->qosctset0);
304 writel(0x00002096, &axi_qos->qosctset1);
305 writel(0x00002030, &axi_qos->qosctset2);
306 writel(0x00002030, &axi_qos->qosctset3);
307 writel(0x00000001, &axi_qos->qosreqctr);
308 writel(0x00002064, &axi_qos->qosthres0);
309 writel(0x00002004, &axi_qos->qosthres1);
310 writel(0x00000000, &axi_qos->qosthres2);
311 writel(0x00000001, &axi_qos->qosqon);
312
313 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
314 writel(0x00000000, &axi_qos->qosconf);
315 writel(0x0000214C, &axi_qos->qosctset0);
316 writel(0x00000001, &axi_qos->qosreqctr);
317 writel(0x00002064, &axi_qos->qosthres0);
318 writel(0x00002004, &axi_qos->qosthres1);
319 writel(0x00000000, &axi_qos->qosthres2);
320 writel(0x00000001, &axi_qos->qosqon);
321
322 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
323 writel(0x00000001, &axi_qos->qosconf);
324 writel(0x00002004, &axi_qos->qosctset0);
325 writel(0x00002096, &axi_qos->qosctset1);
326 writel(0x00002030, &axi_qos->qosctset2);
327 writel(0x00002030, &axi_qos->qosctset3);
328 writel(0x00000001, &axi_qos->qosreqctr);
329 writel(0x00002064, &axi_qos->qosthres0);
330 writel(0x00002004, &axi_qos->qosthres1);
331 writel(0x00000000, &axi_qos->qosthres2);
332 writel(0x00000001, &axi_qos->qosqon);
333
334 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
335 writel(0x00000001, &axi_qos->qosconf);
336 writel(0x00002004, &axi_qos->qosctset0);
337 writel(0x00002096, &axi_qos->qosctset1);
338 writel(0x00002030, &axi_qos->qosctset2);
339 writel(0x00002030, &axi_qos->qosctset3);
340 writel(0x00000001, &axi_qos->qosreqctr);
341 writel(0x00002064, &axi_qos->qosthres0);
342 writel(0x00002004, &axi_qos->qosthres1);
343 writel(0x00000000, &axi_qos->qosthres2);
344 writel(0x00000001, &axi_qos->qosqon);
345
346 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
347 writel(0x00000001, &axi_qos->qosconf);
348 writel(0x00002004, &axi_qos->qosctset0);
349 writel(0x00002096, &axi_qos->qosctset1);
350 writel(0x00002030, &axi_qos->qosctset2);
351 writel(0x00002030, &axi_qos->qosctset3);
352 writel(0x00000001, &axi_qos->qosreqctr);
353 writel(0x00002064, &axi_qos->qosthres0);
354 writel(0x00002004, &axi_qos->qosthres1);
355 writel(0x00000000, &axi_qos->qosthres2);
356 writel(0x00000001, &axi_qos->qosqon);
357
358 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
359 writel(0x00000001, &axi_qos->qosconf);
360 writel(0x00002004, &axi_qos->qosctset0);
361 writel(0x00002096, &axi_qos->qosctset1);
362 writel(0x00002030, &axi_qos->qosctset2);
363 writel(0x00002030, &axi_qos->qosctset3);
364 writel(0x00000001, &axi_qos->qosreqctr);
365 writel(0x00002064, &axi_qos->qosthres0);
366 writel(0x00002004, &axi_qos->qosthres1);
367 writel(0x00000000, &axi_qos->qosthres2);
368 writel(0x00000001, &axi_qos->qosqon);
369
370 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
371 writel(0x00000001, &axi_qos->qosconf);
372 writel(0x00002004, &axi_qos->qosctset0);
373 writel(0x00002096, &axi_qos->qosctset1);
374 writel(0x00002030, &axi_qos->qosctset2);
375 writel(0x00002030, &axi_qos->qosctset3);
376 writel(0x00000001, &axi_qos->qosreqctr);
377 writel(0x00002064, &axi_qos->qosthres0);
378 writel(0x00002004, &axi_qos->qosthres1);
379 writel(0x00000000, &axi_qos->qosthres2);
380 writel(0x00000001, &axi_qos->qosqon);
381
382 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
383 writel(0x00000000, &axi_qos->qosconf);
384 writel(0x00002021, &axi_qos->qosctset0);
385 writel(0x00000001, &axi_qos->qosreqctr);
386 writel(0x00002064, &axi_qos->qosthres0);
387 writel(0x00002004, &axi_qos->qosthres1);
388 writel(0x00000000, &axi_qos->qosthres2);
389 writel(0x00000001, &axi_qos->qosqon);
390
391 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
392 writel(0x00000000, &axi_qos->qosconf);
393 writel(0x00002021, &axi_qos->qosctset0);
394 writel(0x00000001, &axi_qos->qosreqctr);
395 writel(0x00002064, &axi_qos->qosthres0);
396 writel(0x00002004, &axi_qos->qosthres1);
397 writel(0x00000000, &axi_qos->qosthres2);
398 writel(0x00000001, &axi_qos->qosqon);
399
400 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
401 writel(0x00000000, &axi_qos->qosconf);
402 writel(0x0000214C, &axi_qos->qosctset0);
403 writel(0x00000001, &axi_qos->qosreqctr);
404 writel(0x00002064, &axi_qos->qosthres0);
405 writel(0x00002004, &axi_qos->qosthres1);
406 writel(0x00000000, &axi_qos->qosthres2);
407 writel(0x00000001, &axi_qos->qosqon);
408
409 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
410 writel(0x00000002, &axi_qos->qosconf);
411 writel(0x00002245, &axi_qos->qosctset0);
412 writel(0x00002096, &axi_qos->qosctset1);
413 writel(0x00002030, &axi_qos->qosctset2);
414 writel(0x00002030, &axi_qos->qosctset3);
415 writel(0x00000001, &axi_qos->qosreqctr);
416 writel(0x00002064, &axi_qos->qosthres0);
417 writel(0x00002004, &axi_qos->qosthres1);
418 writel(0x00000000, &axi_qos->qosthres2);
419 writel(0x00000001, &axi_qos->qosqon);
420
421 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
422 writel(0x00000000, &axi_qos->qosconf);
423 writel(0x000020A6, &axi_qos->qosctset0);
424 writel(0x00000001, &axi_qos->qosreqctr);
425 writel(0x00002064, &axi_qos->qosthres0);
426 writel(0x00002004, &axi_qos->qosthres1);
427 writel(0x00000000, &axi_qos->qosthres2);
428 writel(0x00000001, &axi_qos->qosqon);
429
430 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
431 writel(0x00000000, &axi_qos->qosconf);
432 writel(0x000020A6, &axi_qos->qosctset0);
433 writel(0x00000001, &axi_qos->qosreqctr);
434 writel(0x00002064, &axi_qos->qosthres0);
435 writel(0x00002004, &axi_qos->qosthres1);
436 writel(0x00000000, &axi_qos->qosthres2);
437 writel(0x00000001, &axi_qos->qosqon);
438
439 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
440 writel(0x00000000, &axi_qos->qosconf);
441 writel(0x00002053, &axi_qos->qosctset0);
442 writel(0x00000001, &axi_qos->qosreqctr);
443 writel(0x00002064, &axi_qos->qosthres0);
444 writel(0x00002004, &axi_qos->qosthres1);
445 writel(0x00000000, &axi_qos->qosthres2);
446 writel(0x00000001, &axi_qos->qosqon);
447
448 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
449 writel(0x00000000, &axi_qos->qosconf);
450 writel(0x00002053, &axi_qos->qosctset0);
451 writel(0x00000001, &axi_qos->qosreqctr);
452 writel(0x00002064, &axi_qos->qosthres0);
453 writel(0x00002004, &axi_qos->qosthres1);
454 writel(0x00000000, &axi_qos->qosthres2);
455 writel(0x00000001, &axi_qos->qosqon);
456
457 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
458 writel(0x00000000, &axi_qos->qosconf);
459 writel(0x00002053, &axi_qos->qosctset0);
460 writel(0x00000001, &axi_qos->qosreqctr);
461 writel(0x00002064, &axi_qos->qosthres0);
462 writel(0x00002004, &axi_qos->qosthres1);
463 writel(0x00000000, &axi_qos->qosthres2);
464 writel(0x00000001, &axi_qos->qosqon);
465
466 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
467 writel(0x00000000, &axi_qos->qosconf);
468 writel(0x0000214C, &axi_qos->qosctset0);
469 writel(0x00000001, &axi_qos->qosreqctr);
470 writel(0x00002064, &axi_qos->qosthres0);
471 writel(0x00002004, &axi_qos->qosthres1);
472 writel(0x00000000, &axi_qos->qosthres2);
473 writel(0x00000001, &axi_qos->qosqon);
474
475 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
476 writel(0x00000002, &axi_qos->qosconf);
477 writel(0x00002245, &axi_qos->qosctset0);
478 writel(0x00000001, &axi_qos->qosreqctr);
479 writel(0x00002064, &axi_qos->qosthres0);
480 writel(0x00002004, &axi_qos->qosthres1);
481 writel(0x00000000, &axi_qos->qosthres2);
482 writel(0x00000001, &axi_qos->qosqon);
483
484 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
485 writel(0x00000000, &axi_qos->qosconf);
486 writel(0x00002029, &axi_qos->qosctset0);
487 writel(0x00000001, &axi_qos->qosreqctr);
488 writel(0x00002064, &axi_qos->qosthres0);
489 writel(0x00002004, &axi_qos->qosthres1);
490 writel(0x00000000, &axi_qos->qosthres2);
491 writel(0x00000001, &axi_qos->qosqon);
492
493 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
494 writel(0x00000002, &axi_qos->qosconf);
495 writel(0x00002245, &axi_qos->qosctset0);
496 writel(0x00000001, &axi_qos->qosreqctr);
497 writel(0x00002064, &axi_qos->qosthres0);
498 writel(0x00002004, &axi_qos->qosthres1);
499 writel(0x00000000, &axi_qos->qosthres2);
500 writel(0x00000001, &axi_qos->qosqon);
501
502 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
503 writel(0x00000000, &axi_qos->qosconf);
504 writel(0x00002053, &axi_qos->qosctset0);
505 writel(0x00000001, &axi_qos->qosreqctr);
506 writel(0x00002064, &axi_qos->qosthres0);
507 writel(0x00002004, &axi_qos->qosthres1);
508 writel(0x00000000, &axi_qos->qosthres2);
509 writel(0x00000001, &axi_qos->qosqon);
510
511 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
512 writel(0x00000000, &axi_qos->qosconf);
513 writel(0x000020A6, &axi_qos->qosctset0);
514 writel(0x00000001, &axi_qos->qosreqctr);
515 writel(0x00002064, &axi_qos->qosthres0);
516 writel(0x00002004, &axi_qos->qosthres1);
517 writel(0x00000000, &axi_qos->qosthres2);
518 writel(0x00000001, &axi_qos->qosqon);
519
520 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
521 writel(0x00000000, &axi_qos->qosconf);
522 writel(0x00002053, &axi_qos->qosctset0);
523 writel(0x00000001, &axi_qos->qosreqctr);
524 writel(0x00002064, &axi_qos->qosthres0);
525 writel(0x00002004, &axi_qos->qosthres1);
526 writel(0x00000000, &axi_qos->qosthres2);
527 writel(0x00000001, &axi_qos->qosqon);
528
529 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
530 writel(0x00000002, &axi_qos->qosconf);
531 writel(0x00002245, &axi_qos->qosctset0);
532 writel(0x00000001, &axi_qos->qosreqctr);
533 writel(0x00002064, &axi_qos->qosthres0);
534 writel(0x00002004, &axi_qos->qosthres1);
535 writel(0x00000000, &axi_qos->qosthres2);
536 writel(0x00000001, &axi_qos->qosqon);
537
538 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
539 writel(0x00000000, &axi_qos->qosconf);
540 writel(0x00002053, &axi_qos->qosctset0);
541 writel(0x00000001, &axi_qos->qosreqctr);
542 writel(0x00002064, &axi_qos->qosthres0);
543 writel(0x00002004, &axi_qos->qosthres1);
544 writel(0x00000000, &axi_qos->qosthres2);
545 writel(0x00000001, &axi_qos->qosqon);
546
547 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
548 writel(0x00000000, &axi_qos->qosconf);
549 writel(0x00002053, &axi_qos->qosctset0);
550 writel(0x00000001, &axi_qos->qosreqctr);
551 writel(0x00002064, &axi_qos->qosthres0);
552 writel(0x00002004, &axi_qos->qosthres1);
553 writel(0x00000000, &axi_qos->qosthres2);
554 writel(0x00000001, &axi_qos->qosqon);
555
556 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
557 writel(0x00000000, &axi_qos->qosconf);
558 writel(0x0000214C, &axi_qos->qosctset0);
559 writel(0x00000001, &axi_qos->qosreqctr);
560 writel(0x00002064, &axi_qos->qosthres0);
561 writel(0x00002004, &axi_qos->qosthres1);
562 writel(0x00000000, &axi_qos->qosthres2);
563 writel(0x00000001, &axi_qos->qosqon);
564
565 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
566 writel(0x00000000, &axi_qos->qosconf);
567 writel(0x0000214C, &axi_qos->qosctset0);
568 writel(0x00000001, &axi_qos->qosreqctr);
569 writel(0x00002064, &axi_qos->qosthres0);
570 writel(0x00002004, &axi_qos->qosthres1);
571 writel(0x00000000, &axi_qos->qosthres2);
572 writel(0x00000001, &axi_qos->qosqon);
573
574 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
575 writel(0x00000000, &axi_qos->qosconf);
576 writel(0x000020A6, &axi_qos->qosctset0);
577 writel(0x00000001, &axi_qos->qosreqctr);
578 writel(0x00002064, &axi_qos->qosthres0);
579 writel(0x00002004, &axi_qos->qosthres1);
580 writel(0x00000000, &axi_qos->qosthres2);
581 writel(0x00000001, &axi_qos->qosqon);
582
583 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
584 writel(0x00000000, &axi_qos->qosconf);
585 writel(0x00002053, &axi_qos->qosctset0);
586 writel(0x00000001, &axi_qos->qosreqctr);
587 writel(0x00002064, &axi_qos->qosthres0);
588 writel(0x00002004, &axi_qos->qosthres1);
589 writel(0x00000000, &axi_qos->qosthres2);
590 writel(0x00000001, &axi_qos->qosqon);
591
592 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
593 writel(0x00000000, &axi_qos->qosconf);
594 writel(0x00002053, &axi_qos->qosctset0);
595 writel(0x00000001, &axi_qos->qosreqctr);
596 writel(0x00002064, &axi_qos->qosthres0);
597 writel(0x00002004, &axi_qos->qosthres1);
598 writel(0x00000000, &axi_qos->qosthres2);
599 writel(0x00000001, &axi_qos->qosqon);
600
601 /* QoS Register (RT-AXI) */
602 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]603 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]604 writel(0x00002053, &axi_qos->qosctset0);
605 writel(0x00002096, &axi_qos->qosctset1);
606 writel(0x00002030, &axi_qos->qosctset2);
607 writel(0x00002030, &axi_qos->qosctset3);
608 writel(0x00000001, &axi_qos->qosreqctr);
609 writel(0x00002064, &axi_qos->qosthres0);
610 writel(0x00002004, &axi_qos->qosthres1);
611 writel(0x00000000, &axi_qos->qosthres2);
612 writel(0x00000001, &axi_qos->qosqon);
613
614 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
615 writel(0x00000000, &axi_qos->qosconf);
616 writel(0x00002053, &axi_qos->qosctset0);
617 writel(0x00002096, &axi_qos->qosctset1);
618 writel(0x00002030, &axi_qos->qosctset2);
619 writel(0x00002030, &axi_qos->qosctset3);
620 writel(0x00000001, &axi_qos->qosreqctr);
621 writel(0x00002064, &axi_qos->qosthres0);
622 writel(0x00002004, &axi_qos->qosthres1);
623 writel(0x00000000, &axi_qos->qosthres2);
624 writel(0x00000001, &axi_qos->qosqon);
625
626 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
627 writel(0x00000000, &axi_qos->qosconf);
628 writel(0x00002299, &axi_qos->qosctset0);
629 writel(0x00000001, &axi_qos->qosreqctr);
630 writel(0x00002064, &axi_qos->qosthres0);
631 writel(0x00002004, &axi_qos->qosthres1);
632 writel(0x00000000, &axi_qos->qosthres2);
633 writel(0x00000001, &axi_qos->qosqon);
634
635 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
636 writel(0x00000000, &axi_qos->qosconf);
637 writel(0x00002029, &axi_qos->qosctset0);
638 writel(0x00000001, &axi_qos->qosreqctr);
639 writel(0x00002064, &axi_qos->qosthres0);
640 writel(0x00002004, &axi_qos->qosthres1);
641 writel(0x00000000, &axi_qos->qosthres2);
642 writel(0x00000001, &axi_qos->qosqon);
643
644 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
645 writel(0x00000002, &axi_qos->qosconf);
646 writel(0x00002245, &axi_qos->qosctset0);
647 writel(0x00002096, &axi_qos->qosctset1);
648 writel(0x00002030, &axi_qos->qosctset2);
649 writel(0x00002030, &axi_qos->qosctset3);
650 writel(0x00000001, &axi_qos->qosreqctr);
651 writel(0x00002064, &axi_qos->qosthres0);
652 writel(0x00002004, &axi_qos->qosthres1);
653 writel(0x00000000, &axi_qos->qosthres2);
654 writel(0x00000001, &axi_qos->qosqon);
655
656 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
657 writel(0x00000000, &axi_qos->qosconf);
658 writel(0x00002029, &axi_qos->qosctset0);
659 writel(0x00002096, &axi_qos->qosctset1);
660 writel(0x00002030, &axi_qos->qosctset2);
661 writel(0x00002030, &axi_qos->qosctset3);
662 writel(0x00000001, &axi_qos->qosreqctr);
663 writel(0x00002064, &axi_qos->qosthres0);
664 writel(0x00002004, &axi_qos->qosthres1);
665 writel(0x00000000, &axi_qos->qosthres2);
666 writel(0x00000001, &axi_qos->qosqon);
667
668 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
669 writel(0x00000002, &axi_qos->qosconf);
670 writel(0x00002245, &axi_qos->qosctset0);
671 writel(0x00000001, &axi_qos->qosreqctr);
672 writel(0x00002064, &axi_qos->qosthres0);
673 writel(0x00002004, &axi_qos->qosthres1);
674 writel(0x00000000, &axi_qos->qosthres2);
675 writel(0x00000001, &axi_qos->qosqon);
676
677 /* QoS Register (MP-AXI) */
678 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
679 writel(0x00000000, &axi_qos->qosconf);
680 writel(0x00002037, &axi_qos->qosctset0);
681 writel(0x00000001, &axi_qos->qosreqctr);
682 writel(0x00002064, &axi_qos->qosthres0);
683 writel(0x00002004, &axi_qos->qosthres1);
684 writel(0x00000000, &axi_qos->qosthres2);
685 writel(0x00000001, &axi_qos->qosqon);
686
687 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
688 writel(0x00000001, &axi_qos->qosconf);
689 writel(0x00002014, &axi_qos->qosctset0);
690 writel(0x00000040, &axi_qos->qosreqctr);
691 writel(0x00002064, &axi_qos->qosthres0);
692 writel(0x00002004, &axi_qos->qosthres1);
693 writel(0x00000000, &axi_qos->qosthres2);
694 writel(0x00000001, &axi_qos->qosqon);
695
696 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
697 writel(0x00000001, &axi_qos->qosconf);
698 writel(0x00002014, &axi_qos->qosctset0);
699 writel(0x00000040, &axi_qos->qosreqctr);
700 writel(0x00002064, &axi_qos->qosthres0);
701 writel(0x00002004, &axi_qos->qosthres1);
702 writel(0x00000000, &axi_qos->qosthres2);
703 writel(0x00000001, &axi_qos->qosqon);
704
705 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
706 writel(0x00000001, &axi_qos->qosconf);
707 writel(0x00001FF0, &axi_qos->qosctset0);
708 writel(0x00000020, &axi_qos->qosreqctr);
709 writel(0x00002064, &axi_qos->qosthres0);
710 writel(0x00002004, &axi_qos->qosthres1);
711 writel(0x00002001, &axi_qos->qosthres2);
712 writel(0x00000001, &axi_qos->qosqon);
713
714 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
715 writel(0x00000001, &axi_qos->qosconf);
716 writel(0x00002004, &axi_qos->qosctset0);
717 writel(0x00002096, &axi_qos->qosctset1);
718 writel(0x00002030, &axi_qos->qosctset2);
719 writel(0x00002030, &axi_qos->qosctset3);
720 writel(0x00000001, &axi_qos->qosreqctr);
721 writel(0x00002064, &axi_qos->qosthres0);
722 writel(0x00002004, &axi_qos->qosthres1);
723 writel(0x00000000, &axi_qos->qosthres2);
724 writel(0x00000001, &axi_qos->qosqon);
725
726 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
727 writel(0x00000000, &axi_qos->qosconf);
728 writel(0x00002053, &axi_qos->qosctset0);
729 writel(0x00000001, &axi_qos->qosreqctr);
730 writel(0x00002064, &axi_qos->qosthres0);
731 writel(0x00002004, &axi_qos->qosthres1);
732 writel(0x00000000, &axi_qos->qosthres2);
733 writel(0x00000001, &axi_qos->qosqon);
734
735 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
736 writel(0x00000000, &axi_qos->qosconf);
737 writel(0x0000206E, &axi_qos->qosctset0);
738 writel(0x00000001, &axi_qos->qosreqctr);
739 writel(0x00002064, &axi_qos->qosthres0);
740 writel(0x00002004, &axi_qos->qosthres1);
741 writel(0x00000000, &axi_qos->qosthres2);
742 writel(0x00000001, &axi_qos->qosqon);
743
744 /* QoS Register (SYS-AXI256) */
745 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
746 writel(0x00000002, &axi_qos->qosconf);
747 writel(0x000020EB, &axi_qos->qosctset0);
748 writel(0x00002096, &axi_qos->qosctset1);
749 writel(0x00002030, &axi_qos->qosctset2);
750 writel(0x00002030, &axi_qos->qosctset3);
751 writel(0x00000001, &axi_qos->qosreqctr);
752 writel(0x00002064, &axi_qos->qosthres0);
753 writel(0x00002004, &axi_qos->qosthres1);
754 writel(0x00000000, &axi_qos->qosthres2);
755 writel(0x00000001, &axi_qos->qosqon);
756
757 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
758 writel(0x00000002, &axi_qos->qosconf);
759 writel(0x000020EB, &axi_qos->qosctset0);
760 writel(0x00002096, &axi_qos->qosctset1);
761 writel(0x00002030, &axi_qos->qosctset2);
762 writel(0x00002030, &axi_qos->qosctset3);
763 writel(0x00000001, &axi_qos->qosreqctr);
764 writel(0x00002064, &axi_qos->qosthres0);
765 writel(0x00002004, &axi_qos->qosthres1);
766 writel(0x00000000, &axi_qos->qosthres2);
767 writel(0x00000001, &axi_qos->qosqon);
768
769 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
770 writel(0x00000002, &axi_qos->qosconf);
771 writel(0x000020EB, &axi_qos->qosctset0);
772 writel(0x00002096, &axi_qos->qosctset1);
773 writel(0x00002030, &axi_qos->qosctset2);
774 writel(0x00002030, &axi_qos->qosctset3);
775 writel(0x00000001, &axi_qos->qosreqctr);
776 writel(0x00002064, &axi_qos->qosthres0);
777 writel(0x00002004, &axi_qos->qosthres1);
778 writel(0x00000000, &axi_qos->qosthres2);
779 writel(0x00000001, &axi_qos->qosqon);
780
781 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
782 writel(0x00000002, &axi_qos->qosconf);
783 writel(0x000020EB, &axi_qos->qosctset0);
784 writel(0x00002096, &axi_qos->qosctset1);
785 writel(0x00002030, &axi_qos->qosctset2);
786 writel(0x00002030, &axi_qos->qosctset3);
787 writel(0x00000001, &axi_qos->qosreqctr);
788 writel(0x00002064, &axi_qos->qosthres0);
789 writel(0x00002004, &axi_qos->qosthres1);
790 writel(0x00000000, &axi_qos->qosthres2);
791 writel(0x00000001, &axi_qos->qosqon);
792
793 /* QoS Register (CCI-AXI) */
794 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
795 writel(0x00000001, &axi_qos->qosconf);
796 writel(0x00002004, &axi_qos->qosctset0);
797 writel(0x00002096, &axi_qos->qosctset1);
798 writel(0x00002030, &axi_qos->qosctset2);
799 writel(0x00002030, &axi_qos->qosctset3);
800 writel(0x00000001, &axi_qos->qosreqctr);
801 writel(0x00002064, &axi_qos->qosthres0);
802 writel(0x00002004, &axi_qos->qosthres1);
803 writel(0x00000000, &axi_qos->qosthres2);
804 writel(0x00000001, &axi_qos->qosqon);
805
806 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
807 writel(0x00000002, &axi_qos->qosconf);
808 writel(0x00002245, &axi_qos->qosctset0);
809 writel(0x00002096, &axi_qos->qosctset1);
810 writel(0x00002030, &axi_qos->qosctset2);
811 writel(0x00002030, &axi_qos->qosctset3);
812 writel(0x00000001, &axi_qos->qosreqctr);
813 writel(0x00002064, &axi_qos->qosthres0);
814 writel(0x00002004, &axi_qos->qosthres1);
815 writel(0x00000000, &axi_qos->qosthres2);
816 writel(0x00000001, &axi_qos->qosqon);
817
818 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
819 writel(0x00000001, &axi_qos->qosconf);
820 writel(0x00002004, &axi_qos->qosctset0);
821 writel(0x00002096, &axi_qos->qosctset1);
822 writel(0x00002030, &axi_qos->qosctset2);
823 writel(0x00002030, &axi_qos->qosctset3);
824 writel(0x00000001, &axi_qos->qosreqctr);
825 writel(0x00002064, &axi_qos->qosthres0);
826 writel(0x00002004, &axi_qos->qosthres1);
827 writel(0x00000000, &axi_qos->qosthres2);
828 writel(0x00000001, &axi_qos->qosqon);
829
830 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
831 writel(0x00000001, &axi_qos->qosconf);
832 writel(0x00002004, &axi_qos->qosctset0);
833 writel(0x00002096, &axi_qos->qosctset1);
834 writel(0x00002030, &axi_qos->qosctset2);
835 writel(0x00002030, &axi_qos->qosctset3);
836 writel(0x00000001, &axi_qos->qosreqctr);
837 writel(0x00002064, &axi_qos->qosthres0);
838 writel(0x00002004, &axi_qos->qosthres1);
839 writel(0x00000000, &axi_qos->qosthres2);
840 writel(0x00000001, &axi_qos->qosqon);
841
842 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
843 writel(0x00000001, &axi_qos->qosconf);
844 writel(0x00002004, &axi_qos->qosctset0);
845 writel(0x00002096, &axi_qos->qosctset1);
846 writel(0x00002030, &axi_qos->qosctset2);
847 writel(0x00002030, &axi_qos->qosctset3);
848 writel(0x00000001, &axi_qos->qosreqctr);
849 writel(0x00002064, &axi_qos->qosthres0);
850 writel(0x00002004, &axi_qos->qosthres1);
851 writel(0x00000000, &axi_qos->qosthres2);
852 writel(0x00000001, &axi_qos->qosqon);
853
854 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
855 writel(0x00000002, &axi_qos->qosconf);
856 writel(0x00002245, &axi_qos->qosctset0);
857 writel(0x00002096, &axi_qos->qosctset1);
858 writel(0x00002030, &axi_qos->qosctset2);
859 writel(0x00002030, &axi_qos->qosctset3);
860 writel(0x00000001, &axi_qos->qosreqctr);
861 writel(0x00002064, &axi_qos->qosthres0);
862 writel(0x00002004, &axi_qos->qosthres1);
863 writel(0x00000000, &axi_qos->qosthres2);
864 writel(0x00000001, &axi_qos->qosqon);
865
866 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
867 writel(0x00000001, &axi_qos->qosconf);
868 writel(0x00002004, &axi_qos->qosctset0);
869 writel(0x00002096, &axi_qos->qosctset1);
870 writel(0x00002030, &axi_qos->qosctset2);
871 writel(0x00002030, &axi_qos->qosctset3);
872 writel(0x00000001, &axi_qos->qosreqctr);
873 writel(0x00002064, &axi_qos->qosthres0);
874 writel(0x00002004, &axi_qos->qosthres1);
875 writel(0x00000000, &axi_qos->qosthres2);
876 writel(0x00000001, &axi_qos->qosqon);
877
878 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
879 writel(0x00000001, &axi_qos->qosconf);
880 writel(0x00002004, &axi_qos->qosctset0);
881 writel(0x00002096, &axi_qos->qosctset1);
882 writel(0x00002030, &axi_qos->qosctset2);
883 writel(0x00002030, &axi_qos->qosctset3);
884 writel(0x00000001, &axi_qos->qosreqctr);
885 writel(0x00002064, &axi_qos->qosthres0);
886 writel(0x00002004, &axi_qos->qosthres1);
887 writel(0x00000000, &axi_qos->qosthres2);
888 writel(0x00000001, &axi_qos->qosqon);
889
890 /* QoS Register (Media-AXI) */
891 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
892 writel(0x00000002, &axi_qos->qosconf);
893 writel(0x000020DC, &axi_qos->qosctset0);
894 writel(0x00002096, &axi_qos->qosctset1);
895 writel(0x00002030, &axi_qos->qosctset2);
896 writel(0x00002030, &axi_qos->qosctset3);
897 writel(0x00000020, &axi_qos->qosreqctr);
898 writel(0x000020AA, &axi_qos->qosthres0);
899 writel(0x00002032, &axi_qos->qosthres1);
900 writel(0x00000001, &axi_qos->qosthres2);
901
902 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
903 writel(0x00000002, &axi_qos->qosconf);
904 writel(0x000020DC, &axi_qos->qosctset0);
905 writel(0x00002096, &axi_qos->qosctset1);
906 writel(0x00002030, &axi_qos->qosctset2);
907 writel(0x00002030, &axi_qos->qosctset3);
908 writel(0x00000020, &axi_qos->qosreqctr);
909 writel(0x000020AA, &axi_qos->qosthres0);
910 writel(0x00002032, &axi_qos->qosthres1);
911 writel(0x00000001, &axi_qos->qosthres2);
912
913 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
914 writel(0x00000001, &axi_qos->qosconf);
915 writel(0x00002190, &axi_qos->qosctset0);
916 writel(0x00000020, &axi_qos->qosreqctr);
917 writel(0x00002064, &axi_qos->qosthres0);
918 writel(0x00002004, &axi_qos->qosthres1);
919 writel(0x00000001, &axi_qos->qosthres2);
920 writel(0x00000001, &axi_qos->qosqon);
921
922 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
923 writel(0x00000001, &axi_qos->qosconf);
924 writel(0x00002190, &axi_qos->qosctset0);
925 writel(0x00000020, &axi_qos->qosreqctr);
926 writel(0x00000001, &axi_qos->qosthres0);
927 writel(0x00000001, &axi_qos->qosthres1);
928 writel(0x00000001, &axi_qos->qosthres2);
929 writel(0x00000001, &axi_qos->qosqon);
930
931 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
932 writel(0x00000001, &axi_qos->qosconf);
933 writel(0x00002190, &axi_qos->qosctset0);
934 writel(0x00000020, &axi_qos->qosreqctr);
935 writel(0x00002064, &axi_qos->qosthres0);
936 writel(0x00002004, &axi_qos->qosthres1);
937 writel(0x00000001, &axi_qos->qosthres2);
938 writel(0x00000001, &axi_qos->qosqon);
939
940 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
941 writel(0x00000001, &axi_qos->qosconf);
942 writel(0x00002190, &axi_qos->qosctset0);
943 writel(0x00000020, &axi_qos->qosreqctr);
944 writel(0x00000001, &axi_qos->qosthres0);
945 writel(0x00000001, &axi_qos->qosthres1);
946 writel(0x00000001, &axi_qos->qosthres2);
947 writel(0x00000001, &axi_qos->qosqon);
948
949 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
950 writel(0x00000001, &axi_qos->qosconf);
951 writel(0x00002190, &axi_qos->qosctset0);
952 writel(0x00000020, &axi_qos->qosreqctr);
953 writel(0x00002064, &axi_qos->qosthres0);
954 writel(0x00002004, &axi_qos->qosthres1);
955 writel(0x00000001, &axi_qos->qosthres2);
956 writel(0x00000001, &axi_qos->qosqon);
957
958 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
959 writel(0x00000001, &axi_qos->qosconf);
960 writel(0x00002190, &axi_qos->qosctset0);
961 writel(0x00000020, &axi_qos->qosreqctr);
962 writel(0x00000001, &axi_qos->qosthres0);
963 writel(0x00000001, &axi_qos->qosthres1);
964 writel(0x00000001, &axi_qos->qosthres2);
965 writel(0x00000001, &axi_qos->qosqon);
966
967 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
968 writel(0x00000001, &axi_qos->qosconf);
969 writel(0x00002190, &axi_qos->qosctset0);
970 writel(0x00000020, &axi_qos->qosreqctr);
971 writel(0x00002064, &axi_qos->qosthres0);
972 writel(0x00002004, &axi_qos->qosthres1);
973 writel(0x00000001, &axi_qos->qosthres2);
974 writel(0x00000001, &axi_qos->qosqon);
975
976 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
977 writel(0x00000001, &axi_qos->qosconf);
978 writel(0x00002190, &axi_qos->qosctset0);
979 writel(0x00000020, &axi_qos->qosreqctr);
980 writel(0x00000001, &axi_qos->qosthres0);
981 writel(0x00000001, &axi_qos->qosthres1);
982 writel(0x00000001, &axi_qos->qosthres2);
983 writel(0x00000001, &axi_qos->qosqon);
984
985 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
986 writel(0x00000001, &axi_qos->qosconf);
987 writel(0x00002190, &axi_qos->qosctset0);
988 writel(0x00000020, &axi_qos->qosreqctr);
989 writel(0x00002064, &axi_qos->qosthres0);
990 writel(0x00002004, &axi_qos->qosthres1);
991 writel(0x00000001, &axi_qos->qosthres2);
992 writel(0x00000001, &axi_qos->qosqon);
993
994 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
995 writel(0x00000001, &axi_qos->qosconf);
996 writel(0x00002190, &axi_qos->qosctset0);
997 writel(0x00000020, &axi_qos->qosreqctr);
998 writel(0x00000001, &axi_qos->qosthres0);
999 writel(0x00000001, &axi_qos->qosthres1);
1000 writel(0x00000001, &axi_qos->qosthres2);
1001 writel(0x00000001, &axi_qos->qosqon);
1002
1003 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
1004 writel(0x00000001, &axi_qos->qosconf);
1005 writel(0x00001FF0, &axi_qos->qosctset0);
1006 writel(0x00000020, &axi_qos->qosreqctr);
1007 writel(0x00002064, &axi_qos->qosthres0);
1008 writel(0x00002004, &axi_qos->qosthres1);
1009 writel(0x00002001, &axi_qos->qosthres2);
1010 writel(0x00000001, &axi_qos->qosqon);
1011
1012 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
1013 writel(0x00000001, &axi_qos->qosconf);
1014 writel(0x000020C8, &axi_qos->qosctset0);
1015 writel(0x00000020, &axi_qos->qosreqctr);
1016 writel(0x00002064, &axi_qos->qosthres0);
1017 writel(0x00002004, &axi_qos->qosthres1);
1018 writel(0x00000001, &axi_qos->qosthres2);
1019 writel(0x00000001, &axi_qos->qosqon);
1020
1021 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
1022 writel(0x00000001, &axi_qos->qosconf);
1023 writel(0x000020C8, &axi_qos->qosctset0);
1024 writel(0x00000020, &axi_qos->qosreqctr);
1025 writel(0x00000001, &axi_qos->qosthres0);
1026 writel(0x00000001, &axi_qos->qosthres1);
1027 writel(0x00000001, &axi_qos->qosthres2);
1028 writel(0x00000001, &axi_qos->qosqon);
1029
1030 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
1031 writel(0x00000001, &axi_qos->qosconf);
1032 writel(0x000020C8, &axi_qos->qosctset0);
1033 writel(0x00000020, &axi_qos->qosreqctr);
1034 writel(0x00002064, &axi_qos->qosthres0);
1035 writel(0x00002004, &axi_qos->qosthres1);
1036 writel(0x00000001, &axi_qos->qosthres2);
1037 writel(0x00000001, &axi_qos->qosqon);
1038
1039 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
1040 writel(0x00000001, &axi_qos->qosconf);
1041 writel(0x000020C8, &axi_qos->qosctset0);
1042 writel(0x00000020, &axi_qos->qosreqctr);
1043 writel(0x00002064, &axi_qos->qosthres0);
1044 writel(0x00002004, &axi_qos->qosthres1);
1045 writel(0x00000001, &axi_qos->qosthres2);
1046 writel(0x00000001, &axi_qos->qosqon);
1047
1048 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
1049 writel(0x00000001, &axi_qos->qosconf);
1050 writel(0x000020C8, &axi_qos->qosctset0);
1051 writel(0x00000020, &axi_qos->qosreqctr);
1052 writel(0x00002064, &axi_qos->qosthres0);
1053 writel(0x00002004, &axi_qos->qosthres1);
1054 writel(0x00000001, &axi_qos->qosthres2);
1055 writel(0x00000001, &axi_qos->qosqon);
1056
1057 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
1058 writel(0x00000001, &axi_qos->qosconf);
1059 writel(0x000020C8, &axi_qos->qosctset0);
1060 writel(0x00000020, &axi_qos->qosreqctr);
1061 writel(0x00000001, &axi_qos->qosthres0);
1062 writel(0x00000001, &axi_qos->qosthres1);
1063 writel(0x00000001, &axi_qos->qosthres2);
1064 writel(0x00000001, &axi_qos->qosqon);
1065
1066 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
1067 writel(0x00000001, &axi_qos->qosconf);
1068 writel(0x000020C8, &axi_qos->qosctset0);
1069 writel(0x00000020, &axi_qos->qosreqctr);
1070 writel(0x00002064, &axi_qos->qosthres0);
1071 writel(0x00002004, &axi_qos->qosthres1);
1072 writel(0x00000001, &axi_qos->qosthres2);
1073 writel(0x00000001, &axi_qos->qosqon);
1074
1075 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
1076 writel(0x00000001, &axi_qos->qosconf);
1077 writel(0x000020C8, &axi_qos->qosctset0);
1078 writel(0x00000020, &axi_qos->qosreqctr);
1079 writel(0x00000001, &axi_qos->qosthres0);
1080 writel(0x00000001, &axi_qos->qosthres1);
1081 writel(0x00000001, &axi_qos->qosthres2);
1082 writel(0x00000001, &axi_qos->qosqon);
1083
1084 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
1085 writel(0x00000001, &axi_qos->qosconf);
1086 writel(0x000020C8, &axi_qos->qosctset0);
1087 writel(0x00000020, &axi_qos->qosreqctr);
1088 writel(0x00002064, &axi_qos->qosthres0);
1089 writel(0x00002004, &axi_qos->qosthres1);
1090 writel(0x00000001, &axi_qos->qosthres2);
1091 writel(0x00000001, &axi_qos->qosqon);
1092
1093 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
1094 writel(0x00000001, &axi_qos->qosconf);
1095 writel(0x000020C8, &axi_qos->qosctset0);
1096 writel(0x00000020, &axi_qos->qosreqctr);
1097 writel(0x00002064, &axi_qos->qosthres0);
1098 writel(0x00002004, &axi_qos->qosthres1);
1099 writel(0x00000001, &axi_qos->qosthres2);
1100 writel(0x00000001, &axi_qos->qosqon);
1101
1102 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
1103 writel(0x00000003, &axi_qos->qosconf);
1104 writel(0x000020C8, &axi_qos->qosctset0);
1105 writel(0x00002064, &axi_qos->qosthres0);
1106 writel(0x00002004, &axi_qos->qosthres1);
1107 writel(0x00000001, &axi_qos->qosthres2);
1108 writel(0x00000001, &axi_qos->qosqon);
1109
1110 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
1111 writel(0x00000003, &axi_qos->qosconf);
1112 writel(0x000020C8, &axi_qos->qosctset0);
1113 writel(0x00002064, &axi_qos->qosthres0);
1114 writel(0x00002004, &axi_qos->qosthres1);
1115 writel(0x00000001, &axi_qos->qosthres2);
1116 writel(0x00000001, &axi_qos->qosqon);
1117
1118 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
1119 writel(0x00000003, &axi_qos->qosconf);
1120 writel(0x000020C8, &axi_qos->qosctset0);
1121 writel(0x00002064, &axi_qos->qosthres0);
1122 writel(0x00002004, &axi_qos->qosthres1);
1123 writel(0x00000001, &axi_qos->qosthres2);
1124 writel(0x00000001, &axi_qos->qosqon);
1125
1126 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
1127 writel(0x00000003, &axi_qos->qosconf);
1128 writel(0x000020C8, &axi_qos->qosctset0);
1129 writel(0x00002064, &axi_qos->qosthres0);
1130 writel(0x00002004, &axi_qos->qosthres1);
1131 writel(0x00000001, &axi_qos->qosthres2);
1132 writel(0x00000001, &axi_qos->qosqon);
1133
1134 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
1135 writel(0x00000003, &axi_qos->qosconf);
1136 writel(0x00002063, &axi_qos->qosctset0);
1137 writel(0x00000001, &axi_qos->qosreqctr);
1138 writel(0x00002064, &axi_qos->qosthres0);
1139 writel(0x00002004, &axi_qos->qosthres1);
1140 writel(0x00000001, &axi_qos->qosthres2);
1141 writel(0x00000001, &axi_qos->qosqon);
1142
1143 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
1144 writel(0x00000003, &axi_qos->qosconf);
1145 writel(0x00002063, &axi_qos->qosctset0);
1146 writel(0x00000001, &axi_qos->qosreqctr);
1147 writel(0x00002064, &axi_qos->qosthres0);
1148 writel(0x00002004, &axi_qos->qosthres1);
1149 writel(0x00000001, &axi_qos->qosthres2);
1150 writel(0x00000001, &axi_qos->qosqon);
1151
1152 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
1153 writel(0x00000001, &axi_qos->qosconf);
1154 writel(0x00002073, &axi_qos->qosctset0);
1155 writel(0x00000020, &axi_qos->qosreqctr);
1156 writel(0x00002064, &axi_qos->qosthres0);
1157 writel(0x00002004, &axi_qos->qosthres1);
1158 writel(0x00000001, &axi_qos->qosthres2);
1159 writel(0x00000001, &axi_qos->qosqon);
1160
1161 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
1162 writel(0x00000001, &axi_qos->qosconf);
1163 writel(0x00002073, &axi_qos->qosctset0);
1164 writel(0x00000020, &axi_qos->qosreqctr);
1165 writel(0x00000001, &axi_qos->qosthres0);
1166 writel(0x00000001, &axi_qos->qosthres1);
1167 writel(0x00000001, &axi_qos->qosthres2);
1168 writel(0x00000001, &axi_qos->qosqon);
1169
1170 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
1171 writel(0x00000001, &axi_qos->qosconf);
1172 writel(0x00002073, &axi_qos->qosctset0);
1173 writel(0x00000020, &axi_qos->qosreqctr);
1174 writel(0x00002064, &axi_qos->qosthres0);
1175 writel(0x00002004, &axi_qos->qosthres1);
1176 writel(0x00000001, &axi_qos->qosthres2);
1177 writel(0x00000001, &axi_qos->qosqon);
1178
1179 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
1180 writel(0x00000001, &axi_qos->qosconf);
1181 writel(0x00002073, &axi_qos->qosctset0);
1182 writel(0x00000020, &axi_qos->qosreqctr);
1183 writel(0x00000001, &axi_qos->qosthres0);
1184 writel(0x00000001, &axi_qos->qosthres1);
1185 writel(0x00000001, &axi_qos->qosthres2);
1186 writel(0x00000001, &axi_qos->qosqon);
1187
1188 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
1189 writel(0x00000001, &axi_qos->qosconf);
1190 writel(0x00002073, &axi_qos->qosctset0);
1191 writel(0x00000020, &axi_qos->qosreqctr);
1192 writel(0x00002064, &axi_qos->qosthres0);
1193 writel(0x00002004, &axi_qos->qosthres1);
1194 writel(0x00000001, &axi_qos->qosthres2);
1195 writel(0x00000001, &axi_qos->qosqon);
1196}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]1197#else /* CONFIG_RENESAS_EXTRAM_BOOT */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]1198void qos_init(void)
1199{
1200}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]1201#endif /* CONFIG_RENESAS_EXTRAM_BOOT */