| developer | ee250ad | 2022-09-09 19:59:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (c) 2022 MediaTek Inc. |
| 4 | * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef _DT_BINDINGS_PINCTRL_MT65XX_H |
| 8 | #define _DT_BINDINGS_PINCTRL_MT65XX_H |
| 9 | |
| 10 | #define MTK_PIN_NO(x) ((x) << 8) |
| 11 | #define MTK_GET_PIN_NO(x) ((x) >> 8) |
| 12 | #define MTK_GET_PIN_FUNC(x) ((x) & 0xf) |
| 13 | |
| 14 | #define MTK_PUPD_SET_R1R0_00 100 |
| 15 | #define MTK_PUPD_SET_R1R0_01 101 |
| 16 | #define MTK_PUPD_SET_R1R0_10 102 |
| 17 | #define MTK_PUPD_SET_R1R0_11 103 |
| 18 | |
| 19 | #define MTK_PULL_SET_RSEL_000 200 |
| 20 | #define MTK_PULL_SET_RSEL_001 201 |
| 21 | #define MTK_PULL_SET_RSEL_010 202 |
| 22 | #define MTK_PULL_SET_RSEL_011 203 |
| 23 | #define MTK_PULL_SET_RSEL_100 204 |
| 24 | #define MTK_PULL_SET_RSEL_101 205 |
| 25 | #define MTK_PULL_SET_RSEL_110 206 |
| 26 | #define MTK_PULL_SET_RSEL_111 207 |
| 27 | |
| 28 | #define MTK_DRIVE_2mA 2 |
| 29 | #define MTK_DRIVE_4mA 4 |
| 30 | #define MTK_DRIVE_6mA 6 |
| 31 | #define MTK_DRIVE_8mA 8 |
| 32 | #define MTK_DRIVE_10mA 10 |
| 33 | #define MTK_DRIVE_12mA 12 |
| 34 | #define MTK_DRIVE_14mA 14 |
| 35 | #define MTK_DRIVE_16mA 16 |
| 36 | #define MTK_DRIVE_20mA 20 |
| 37 | #define MTK_DRIVE_24mA 24 |
| 38 | #define MTK_DRIVE_28mA 28 |
| 39 | #define MTK_DRIVE_32mA 32 |
| 40 | |
| 41 | #endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */ |