| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Samsung Electronics |
| 4 | * |
| Akshay Saraswat | fdd9df3 | 2014-06-18 17:53:58 +0530 | [diff] [blame] | 5 | * Configuration settings for the SAMSUNG SMDK5420 board. |
| Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 6 | */ |
| 7 | |
| Akshay Saraswat | fdd9df3 | 2014-06-18 17:53:58 +0530 | [diff] [blame] | 8 | #ifndef __CONFIG_SMDK5420_H |
| 9 | #define __CONFIG_SMDK5420_H |
| Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 10 | |
| Simon Glass | 252747a | 2014-10-07 22:01:46 -0600 | [diff] [blame] | 11 | #include <configs/exynos5420-common.h> |
| Simon Glass | 0b18b80 | 2015-08-03 08:19:29 -0600 | [diff] [blame] | 12 | #include <configs/exynos5-dt-common.h> |
| 13 | #include <configs/exynos5-common.h> |
| 14 | |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 15 | #define CFG_SYS_SDRAM_BASE 0x20000000 |
| Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 16 | |
| Akshay Saraswat | 926aa81 | 2014-11-13 22:38:19 +0530 | [diff] [blame] | 17 | /* DRAM Memory Banks */ |
| Akshay Saraswat | 926aa81 | 2014-11-13 22:38:19 +0530 | [diff] [blame] | 18 | #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ |
| 19 | |
| Akshay Saraswat | fdd9df3 | 2014-06-18 17:53:58 +0530 | [diff] [blame] | 20 | #endif /* __CONFIG_SMDK5420_H */ |