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Stefan Roese6edf27e2016-05-17 15:04:16 +02001/*
2 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +02007#ifndef _CONFIG_MVEBU_ARMADA_37XX_H
8#define _CONFIG_MVEBU_ARMADA_37XX_H
Stefan Roese6edf27e2016-05-17 15:04:16 +02009
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese6edf27e2016-05-17 15:04:16 +020013
Stefan Roese6edf27e2016-05-17 15:04:16 +020014/* additions for new ARM relocation support */
15#define CONFIG_SYS_SDRAM_BASE 0x00000000
16
17#define CONFIG_NR_DRAM_BANKS 1
18
19/* auto boot */
20#define CONFIG_PREBOOT
21
Stefan Roese6edf27e2016-05-17 15:04:16 +020022#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
23 115200, 230400, 460800, 921600 }
24
25/*
26 * For booting Linux, the board info and command line data
27 * have to be in the first 8 MB of memory, since this is
28 * the maximum mapped by the Linux kernel during initialization.
29 */
30#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31#define CONFIG_INITRD_TAG /* enable INITRD tag */
32#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
33
34#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
Stefan Roese6edf27e2016-05-17 15:04:16 +020035
36/*
37 * Size of malloc() pool
38 */
39#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
40
41/*
42 * Other required minimal configurations
43 */
Stefan Roese6edf27e2016-05-17 15:04:16 +020044#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
Stefan Roese6edf27e2016-05-17 15:04:16 +020045#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
46#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
47#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
48#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
49#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
50
Stefan Roese6edf27e2016-05-17 15:04:16 +020051/* End of 16M scrubbed by training in bootrom */
52#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
53
54/*
55 * I2C
56 */
57#define CONFIG_I2C_MV
58#define CONFIG_SYS_I2C_SLAVE 0x0
59
60/*
61 * SPI Flash configuration
62 */
63#define CONFIG_ENV_SPI_BUS 0
64#define CONFIG_ENV_SPI_CS 0
65
66/* SPI NOR flash default params, used by sf commands */
67#define CONFIG_SF_DEFAULT_SPEED 1000000
68#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
69#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
70
71/* Environment in SPI NOR flash */
Stefan Roese6edf27e2016-05-17 15:04:16 +020072#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
73#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
74#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
75
76/*
77 * Ethernet Driver configuration
78 */
Stefan Roese6edf27e2016-05-17 15:04:16 +020079#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
Stefan Roese6edf27e2016-05-17 15:04:16 +020080#define CONFIG_ARP_TIMEOUT 200
81#define CONFIG_NET_RETRY_COUNT 50
Konstantin Porotchkin8be1cfb2017-02-16 13:52:23 +020082#define CONFIG_PHY_MARVELL
Stefan Roese6edf27e2016-05-17 15:04:16 +020083
Bin Mengabe40262017-07-19 21:50:06 +080084#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
Stefan Roese6edf27e2016-05-17 15:04:16 +020085
86/* USB ethernet */
Stefan Roese6edf27e2016-05-17 15:04:16 +020087
88/*
89 * SATA/SCSI/AHCI configuration
90 */
Stefan Roese6edf27e2016-05-17 15:04:16 +020091#define CONFIG_SCSI_AHCI_PLAT
Stefan Roese6edf27e2016-05-17 15:04:16 +020092#define CONFIG_LBA48
93#define CONFIG_SYS_64BIT_LBA
94
95#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
96#define CONFIG_SYS_SCSI_MAX_LUN 1
97#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
98 CONFIG_SYS_SCSI_MAX_LUN)
99
Andre Heider57b45932017-12-02 10:46:37 +0100100#define BOOT_TARGET_DEVICES(func) \
101 func(MMC, mmc, 1) \
102 func(MMC, mmc, 0) \
103 func(USB, usb, 0) \
104 func(SCSI, scsi, 0) \
105 func(PXE, pxe, na) \
106 func(DHCP, dhcp, na)
107
108#include <config_distro_bootcmd.h>
109
Andre Heider272d2712017-12-02 10:46:35 +0100110#define CONFIG_EXTRA_ENV_SETTINGS \
111 "scriptaddr=0x4d00000\0" \
112 "pxefile_addr_r=0x4e00000\0" \
113 "fdt_addr_r=0x4f00000\0" \
114 "kernel_addr_r=0x5000000\0" \
Andre Heider57b45932017-12-02 10:46:37 +0100115 "ramdisk_addr_r=0x8000000\0" \
116 BOOTENV
Andre Heider272d2712017-12-02 10:46:35 +0100117
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200118#endif /* _CONFIG_MVEBU_ARMADA_37XX_H */