| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2008-2014 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * (C) Copyright 2000 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <asm/fsl_law.h> |
| 11 | #include <asm/mmu.h> |
| 12 | |
| 13 | struct law_entry law_table[] = { |
| 14 | SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), |
| 15 | #ifdef CONFIG_SYS_BMAN_MEM_PHYS |
| 16 | SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), |
| 17 | #endif |
| 18 | #ifdef CONFIG_SYS_QMAN_MEM_PHYS |
| 19 | SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), |
| 20 | #endif |
| 21 | #ifdef CONFIG_SYS_CPLD_BASE_PHYS |
| 22 | SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), |
| 23 | #endif |
| 24 | #ifdef CONFIG_SYS_DCSRBAR_PHYS |
| 25 | /* Limit DCSR to 32M to access NPC Trace Buffer */ |
| 26 | SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), |
| 27 | #endif |
| 28 | #ifdef CONFIG_SYS_NAND_BASE_PHYS |
| 29 | SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC), |
| 30 | #endif |
| 31 | }; |
| 32 | |
| 33 | int num_law_entries = ARRAY_SIZE(law_table); |