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Dirk Eibachb355f172015-10-28 11:46:32 +01001/*
2 * (C) Copyright 2014
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9
10#include <gdsys_fpga.h>
11
12enum {
13 UNITTYPE_MAIN_SERVER = 0,
14 UNITTYPE_MAIN_USER = 1,
15 UNITTYPE_VIDEO_SERVER = 2,
16 UNITTYPE_VIDEO_USER = 3,
17};
18
19enum {
20 UNITTYPEPCB_DVI = 0,
21 UNITTYPEPCB_DP_165 = 1,
22 UNITTYPEPCB_DP_300 = 2,
23 UNITTYPEPCB_HDMI = 3,
24};
25
26enum {
27 COMPRESSION_NONE = 0,
Dirk Eibach11887f12016-06-02 09:05:39 +020028 COMPRESSION_TYPE_1 = 1,
29 COMPRESSION_TYPE_1_2 = 3,
30 COMPRESSION_TYPE_1_2_3 = 7,
Dirk Eibachb355f172015-10-28 11:46:32 +010031};
32
33enum {
34 AUDIO_NONE = 0,
35 AUDIO_TX = 1,
36 AUDIO_RX = 2,
37 AUDIO_RXTX = 3,
38};
39
40enum {
41 SYSCLK_147456 = 0,
42};
43
44enum {
45 RAM_DDR2_32 = 0,
46 RAM_DDR3_32 = 1,
Dirk Eibach30d07bb2015-10-28 11:46:33 +010047 RAM_DDR3_48 = 2,
Dirk Eibachb355f172015-10-28 11:46:32 +010048};
49
50enum {
51 CARRIER_SPEED_1G = 0,
52 CARRIER_SPEED_2_5G = 1,
53};
54
55bool ioep_fpga_has_osd(unsigned int fpga)
56{
57 u16 fpga_features;
58 unsigned feature_osd;
59
60 FPGA_GET_REG(0, fpga_features, &fpga_features);
61 feature_osd = fpga_features & (1<<11);
62
63 return feature_osd;
64}
65
66void ioep_fpga_print_info(unsigned int fpga)
67{
68 u16 versions;
69 u16 fpga_version;
70 u16 fpga_features;
71 unsigned unit_type;
72 unsigned unit_type_pcb_video;
73 unsigned feature_compression;
74 unsigned feature_osd;
75 unsigned feature_audio;
76 unsigned feature_sysclock;
77 unsigned feature_ramconfig;
78 unsigned feature_carrier_speed;
79 unsigned feature_carriers;
80 unsigned feature_video_channels;
81
82 FPGA_GET_REG(fpga, versions, &versions);
83 FPGA_GET_REG(fpga, fpga_version, &fpga_version);
84 FPGA_GET_REG(fpga, fpga_features, &fpga_features);
85
86 unit_type = (versions & 0xf000) >> 12;
87 unit_type_pcb_video = (versions & 0x01c0) >> 6;
88 feature_compression = (fpga_features & 0xe000) >> 13;
89 feature_osd = fpga_features & (1<<11);
90 feature_audio = (fpga_features & 0x0600) >> 9;
91 feature_sysclock = (fpga_features & 0x0180) >> 7;
92 feature_ramconfig = (fpga_features & 0x0060) >> 5;
93 feature_carrier_speed = fpga_features & (1<<4);
94 feature_carriers = (fpga_features & 0x000c) >> 2;
95 feature_video_channels = fpga_features & 0x0003;
96
97 switch (unit_type) {
98 case UNITTYPE_MAIN_SERVER:
99 case UNITTYPE_MAIN_USER:
100 printf("Mainchannel");
101 break;
102
103 case UNITTYPE_VIDEO_SERVER:
104 case UNITTYPE_VIDEO_USER:
105 printf("Videochannel");
106 break;
107
108 default:
109 printf("UnitType %d(not supported)", unit_type);
110 break;
111 }
112
113 switch (unit_type) {
114 case UNITTYPE_MAIN_SERVER:
115 case UNITTYPE_VIDEO_SERVER:
116 printf(" Server");
117 if (versions & (1<<4))
118 printf(" UC");
119 break;
120
121 case UNITTYPE_MAIN_USER:
122 case UNITTYPE_VIDEO_USER:
123 printf(" User");
124 break;
125
126 default:
127 break;
128 }
129
130 if (versions & (1<<5))
131 printf(" Fiber");
132 else
133 printf(" CAT");
134
135 switch (unit_type_pcb_video) {
136 case UNITTYPEPCB_DVI:
137 printf(" DVI,");
138 break;
139
140 case UNITTYPEPCB_DP_165:
141 printf(" DP 165MPix/s,");
142 break;
143
144 case UNITTYPEPCB_DP_300:
145 printf(" DP 300MPix/s,");
146 break;
147
148 case UNITTYPEPCB_HDMI:
149 printf(" HDMI,");
150 break;
151 }
152
153 printf(" FPGA V %d.%02d\n features:",
154 fpga_version / 100, fpga_version % 100);
155
156
157 switch (feature_compression) {
158 case COMPRESSION_NONE:
159 printf(" no compression");
160 break;
161
Dirk Eibach11887f12016-06-02 09:05:39 +0200162 case COMPRESSION_TYPE_1:
163 printf(" compression type1(delta)");
Dirk Eibachb355f172015-10-28 11:46:32 +0100164 break;
165
Dirk Eibach11887f12016-06-02 09:05:39 +0200166 case COMPRESSION_TYPE_1_2:
167 printf(" compression type1(delta), type2(inline)");
168 break;
169
170 case COMPRESSION_TYPE_1_2_3:
171 printf(" compression type1(delta), type2(inline), type3(intempo)");
Dirk Eibachb355f172015-10-28 11:46:32 +0100172 break;
173
174 default:
175 printf(" compression %d(not supported)", feature_compression);
176 break;
177 }
178
179 printf(", %sosd", feature_osd ? "" : "no ");
180
181 switch (feature_audio) {
182 case AUDIO_NONE:
183 printf(", no audio");
184 break;
185
186 case AUDIO_TX:
187 printf(", audio tx");
188 break;
189
190 case AUDIO_RX:
191 printf(", audio rx");
192 break;
193
194 case AUDIO_RXTX:
195 printf(", audio rx+tx");
196 break;
197
198 default:
199 printf(", audio %d(not supported)", feature_audio);
200 break;
201 }
202
203 puts(",\n ");
204
205 switch (feature_sysclock) {
206 case SYSCLK_147456:
207 printf("clock 147.456 MHz");
208 break;
209
210 default:
211 printf("clock %d(not supported)", feature_sysclock);
212 break;
213 }
214
215 switch (feature_ramconfig) {
216 case RAM_DDR2_32:
217 printf(", RAM 32 bit DDR2");
218 break;
219
220 case RAM_DDR3_32:
221 printf(", RAM 32 bit DDR3");
222 break;
223
Dirk Eibach30d07bb2015-10-28 11:46:33 +0100224 case RAM_DDR3_48:
225 printf(", RAM 48 bit DDR3");
226 break;
227
Dirk Eibachb355f172015-10-28 11:46:32 +0100228 default:
229 printf(", RAM %d(not supported)", feature_ramconfig);
230 break;
231 }
232
233 printf(", %d carrier(s) %s", feature_carriers,
234 feature_carrier_speed ? "2.5Gbit/s" : "1Gbit/s");
235
236 printf(", %d video channel(s)\n", feature_video_channels);
237}