Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | menu "MIPS architecture" |
| 2 | depends on MIPS |
| 3 | |
| 4 | config SYS_ARCH |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 5 | default "mips" |
| 6 | |
Daniel Schwierzeck | 99e7af2 | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 7 | config SYS_CPU |
| 8 | default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 |
| 9 | default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 |
| 10 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 11 | choice |
| 12 | prompt "Target select" |
Joe Hershberger | f069960 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 13 | optional |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 14 | |
| 15 | config TARGET_QEMU_MIPS |
| 16 | bool "Support qemu-mips" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 17 | select SUPPORTS_BIG_ENDIAN |
| 18 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 19 | select SUPPORTS_CPU_MIPS32_R1 |
| 20 | select SUPPORTS_CPU_MIPS32_R2 |
Daniel Schwierzeck | 94384d1 | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 21 | select SUPPORTS_CPU_MIPS64_R1 |
| 22 | select SUPPORTS_CPU_MIPS64_R2 |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 23 | |
| 24 | config TARGET_MALTA |
| 25 | bool "Support malta" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 26 | select SUPPORTS_BIG_ENDIAN |
| 27 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 28 | select SUPPORTS_CPU_MIPS32_R1 |
| 29 | select SUPPORTS_CPU_MIPS32_R2 |
Daniel Schwierzeck | 7dca686 | 2015-01-18 22:00:18 +0100 | [diff] [blame] | 30 | select SWAP_IO_SPACE |
Daniel Schwierzeck | 02ca55e | 2016-01-09 17:32:50 +0100 | [diff] [blame] | 31 | select MIPS_L1_CACHE_SHIFT_6 |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 32 | |
| 33 | config TARGET_VCT |
| 34 | bool "Support vct" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 35 | select SUPPORTS_BIG_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 36 | select SUPPORTS_CPU_MIPS32_R1 |
| 37 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 38 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 39 | |
| 40 | config TARGET_DBAU1X00 |
| 41 | bool "Support dbau1x00" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 42 | select SUPPORTS_BIG_ENDIAN |
| 43 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 44 | select SUPPORTS_CPU_MIPS32_R1 |
| 45 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 46 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 47 | select MIPS_TUNE_4KC |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 48 | |
| 49 | config TARGET_PB1X00 |
| 50 | bool "Support pb1x00" |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 51 | select SUPPORTS_LITTLE_ENDIAN |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 52 | select SUPPORTS_CPU_MIPS32_R1 |
| 53 | select SUPPORTS_CPU_MIPS32_R2 |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 54 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 55 | select MIPS_TUNE_4KC |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 56 | |
| 57 | endchoice |
| 58 | |
| 59 | source "board/dbau1x00/Kconfig" |
| 60 | source "board/imgtec/malta/Kconfig" |
| 61 | source "board/micronas/vct/Kconfig" |
| 62 | source "board/pb1x00/Kconfig" |
| 63 | source "board/qemu-mips/Kconfig" |
| 64 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 65 | if MIPS |
| 66 | |
| 67 | choice |
| 68 | prompt "Endianness selection" |
| 69 | help |
| 70 | Some MIPS boards can be configured for either little or big endian |
| 71 | byte order. These modes require different U-Boot images. In general there |
| 72 | is one preferred byteorder for a particular system but some systems are |
| 73 | just as commonly used in the one or the other endianness. |
| 74 | |
| 75 | config SYS_BIG_ENDIAN |
| 76 | bool "Big endian" |
| 77 | depends on SUPPORTS_BIG_ENDIAN |
| 78 | |
| 79 | config SYS_LITTLE_ENDIAN |
| 80 | bool "Little endian" |
| 81 | depends on SUPPORTS_LITTLE_ENDIAN |
| 82 | |
| 83 | endchoice |
| 84 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 85 | choice |
| 86 | prompt "CPU selection" |
| 87 | default CPU_MIPS32_R2 |
| 88 | |
| 89 | config CPU_MIPS32_R1 |
| 90 | bool "MIPS32 Release 1" |
| 91 | depends on SUPPORTS_CPU_MIPS32_R1 |
| 92 | select 32BIT |
| 93 | help |
| 94 | Choose this option to build an U-Boot for release 1 or later of the |
| 95 | MIPS32 architecture. |
| 96 | |
| 97 | config CPU_MIPS32_R2 |
| 98 | bool "MIPS32 Release 2" |
| 99 | depends on SUPPORTS_CPU_MIPS32_R2 |
| 100 | select 32BIT |
| 101 | help |
| 102 | Choose this option to build an U-Boot for release 2 or later of the |
| 103 | MIPS32 architecture. |
| 104 | |
| 105 | config CPU_MIPS64_R1 |
| 106 | bool "MIPS64 Release 1" |
| 107 | depends on SUPPORTS_CPU_MIPS64_R1 |
| 108 | select 64BIT |
| 109 | help |
| 110 | Choose this option to build a kernel for release 1 or later of the |
| 111 | MIPS64 architecture. |
| 112 | |
| 113 | config CPU_MIPS64_R2 |
| 114 | bool "MIPS64 Release 2" |
| 115 | depends on SUPPORTS_CPU_MIPS64_R2 |
| 116 | select 64BIT |
| 117 | help |
| 118 | Choose this option to build a kernel for release 2 or later of the |
| 119 | MIPS64 architecture. |
| 120 | |
| 121 | endchoice |
| 122 | |
Daniel Schwierzeck | f9749fa | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 123 | menu "OS boot interface" |
| 124 | |
| 125 | config MIPS_BOOT_CMDLINE_LEGACY |
| 126 | bool "Hand over legacy command line to Linux kernel" |
| 127 | default y |
| 128 | help |
| 129 | Enable this option if you want U-Boot to hand over the Yamon-style |
| 130 | command line to the kernel. All bootargs will be prepared as argc/argv |
| 131 | compatible list. The argument count (argc) is stored in register $a0. |
| 132 | The address of the argument list (argv) is stored in register $a1. |
| 133 | |
Daniel Schwierzeck | c07dc60 | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 134 | config MIPS_BOOT_ENV_LEGACY |
| 135 | bool "Hand over legacy environment to Linux kernel" |
| 136 | default y |
| 137 | help |
| 138 | Enable this option if you want U-Boot to hand over the Yamon-style |
| 139 | environment to the kernel. Information like memory size, initrd |
| 140 | address and size will be prepared as zero-terminated key/value list. |
| 141 | The address of the enviroment is stored in register $a2. |
| 142 | |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 143 | config MIPS_BOOT_FDT |
Daniel Schwierzeck | d1b29d2 | 2015-02-22 16:58:30 +0100 | [diff] [blame] | 144 | bool "Hand over a flattened device tree to Linux kernel" |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 145 | default n |
| 146 | help |
| 147 | Enable this option if you want U-Boot to hand over a flattened |
Daniel Schwierzeck | d1b29d2 | 2015-02-22 16:58:30 +0100 | [diff] [blame] | 148 | device tree to the kernel. According to UHI register $a0 will be set |
| 149 | to -2 and the FDT address is stored in $a1. |
Daniel Schwierzeck | 8d7ff4d | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 150 | |
Daniel Schwierzeck | f9749fa | 2015-01-14 21:44:13 +0100 | [diff] [blame] | 151 | endmenu |
| 152 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 153 | config SUPPORTS_BIG_ENDIAN |
| 154 | bool |
| 155 | |
| 156 | config SUPPORTS_LITTLE_ENDIAN |
| 157 | bool |
| 158 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 159 | config SUPPORTS_CPU_MIPS32_R1 |
| 160 | bool |
| 161 | |
| 162 | config SUPPORTS_CPU_MIPS32_R2 |
| 163 | bool |
| 164 | |
| 165 | config SUPPORTS_CPU_MIPS64_R1 |
| 166 | bool |
| 167 | |
| 168 | config SUPPORTS_CPU_MIPS64_R2 |
| 169 | bool |
| 170 | |
Daniel Schwierzeck | dfbad0f | 2015-01-18 21:59:35 +0100 | [diff] [blame] | 171 | config CPU_MIPS32 |
| 172 | bool |
| 173 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 |
| 174 | |
| 175 | config CPU_MIPS64 |
| 176 | bool |
| 177 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 |
| 178 | |
Daniel Schwierzeck | aadd332 | 2015-12-26 19:55:37 +0100 | [diff] [blame] | 179 | config MIPS_TUNE_4KC |
| 180 | bool |
| 181 | |
| 182 | config MIPS_TUNE_14KC |
| 183 | bool |
| 184 | |
| 185 | config MIPS_TUNE_24KC |
| 186 | bool |
| 187 | |
Daniel Schwierzeck | 256034d | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 188 | config 32BIT |
| 189 | bool |
| 190 | |
| 191 | config 64BIT |
| 192 | bool |
| 193 | |
Daniel Schwierzeck | 7dca686 | 2015-01-18 22:00:18 +0100 | [diff] [blame] | 194 | config SWAP_IO_SPACE |
| 195 | bool |
| 196 | |
Paul Burton | 6832bdc | 2015-01-29 01:28:02 +0000 | [diff] [blame] | 197 | config SYS_MIPS_CACHE_INIT_RAM_LOAD |
| 198 | bool |
| 199 | |
Daniel Schwierzeck | 02ca55e | 2016-01-09 17:32:50 +0100 | [diff] [blame] | 200 | config MIPS_L1_CACHE_SHIFT_4 |
| 201 | bool |
| 202 | |
| 203 | config MIPS_L1_CACHE_SHIFT_5 |
| 204 | bool |
| 205 | |
| 206 | config MIPS_L1_CACHE_SHIFT_6 |
| 207 | bool |
| 208 | |
| 209 | config MIPS_L1_CACHE_SHIFT_7 |
| 210 | bool |
| 211 | |
| 212 | config MIPS_L1_CACHE_SHIFT |
| 213 | int |
| 214 | default "7" if MIPS_L1_CACHE_SHIFT_7 |
| 215 | default "6" if MIPS_L1_CACHE_SHIFT_6 |
| 216 | default "5" if MIPS_L1_CACHE_SHIFT_5 |
| 217 | default "4" if MIPS_L1_CACHE_SHIFT_4 |
| 218 | default "5" |
| 219 | |
Daniel Schwierzeck | a4c242b | 2014-10-26 14:14:07 +0100 | [diff] [blame] | 220 | endif |
| 221 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 222 | endmenu |