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git01.mediatek.com / filogic / uboot / cd51318861f885588ff3d0dee36c8e01555b1486 / . / board / renesas / lager / qos.c
blob: 80e57107a941face635239d23ce0ed5c36f8f29f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]2/*
3 * board/renesas/lager/qos.c
4 *
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]5 * Copyright (C) 2013,2014 Renesas Electronics Corporation
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]6 */
7
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]8#include <asm/processor.h>
9#include <asm/mach-types.h>
10#include <asm/io.h>
Marek Vasut97a070b2024-02-27 17:05:54 +0100[diff] [blame]11#include <asm/arch/renesas.h>
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]12
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]13/* QoS version 0.955 for ES1 and version 0.973 for ES2 */
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]14#if defined(CONFIG_RENESAS_EXTRAM_BOOT)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]15enum {
Nobuhiro Iwamatsud247fb22014-07-29 12:13:16 +0900[diff] [blame]16 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
17 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
18 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
19 DBSC3_15,
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]20 DBSC3_NR,
21};
22
Nobuhiro Iwamatsud247fb22014-07-29 12:13:16 +0900[diff] [blame]23static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
24 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
25 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
26 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
27 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
28 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
29 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
30 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
31 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
32 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
33 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
34 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
35 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
36 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
37 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
38 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
39 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]40};
41
Nobuhiro Iwamatsud247fb22014-07-29 12:13:16 +0900[diff] [blame]42static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
43 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
44 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
45 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
46 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
47 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
48 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
49 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
50 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
51 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
52 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
53 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
54 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
55 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
56 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
57 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
58 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
59};
60
61/* QoS version 0.955 for ES1 */
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]62static void qos_init_es1(void)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]63{
64 int i;
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]65 struct rcar_s3c *s3c;
66 struct rcar_s3c_qos *s3c_qos;
67 struct rcar_dbsc3_qos *qos_addr;
68 struct rcar_mxi *mxi;
69 struct rcar_mxi_qos *mxi_qos;
70 struct rcar_axi_qos *axi_qos;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]71
72 /* DBSC DBADJ2 */
73 writel(0x20042004, DBSC3_0_DBADJ2);
74
75 /* S3C -QoS */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]76 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]77 writel(0x80FF1C1E, &s3c->s3cadsplcr);
78 writel(0x1F060505, &s3c->s3crorr);
79 writel(0x1F020100, &s3c->s3cworr);
80
81 /* QoS Control Registers */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]82 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]83 writel(0x00800080, &s3c_qos->s3cqos0);
84 writel(0x22000010, &s3c_qos->s3cqos1);
85 writel(0x22002200, &s3c_qos->s3cqos2);
86 writel(0x2F002200, &s3c_qos->s3cqos3);
87 writel(0x2F002F00, &s3c_qos->s3cqos4);
88 writel(0x22000010, &s3c_qos->s3cqos5);
89 writel(0x22002200, &s3c_qos->s3cqos6);
90 writel(0x2F002200, &s3c_qos->s3cqos7);
91 writel(0x2F002F00, &s3c_qos->s3cqos8);
92
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]93 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]94 writel(0x00800080, &s3c_qos->s3cqos0);
95 writel(0x22000010, &s3c_qos->s3cqos1);
96 writel(0x22002200, &s3c_qos->s3cqos2);
97 writel(0x2F002200, &s3c_qos->s3cqos3);
98 writel(0x2F002F00, &s3c_qos->s3cqos4);
99 writel(0x22000010, &s3c_qos->s3cqos5);
100 writel(0x22002200, &s3c_qos->s3cqos6);
101 writel(0x2F002200, &s3c_qos->s3cqos7);
102 writel(0x2F002F00, &s3c_qos->s3cqos8);
103
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]104 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]105 writel(0x80918099, &s3c_qos->s3cqos0);
106 writel(0x20410010, &s3c_qos->s3cqos1);
107 writel(0x200A2023, &s3c_qos->s3cqos2);
108 writel(0x20502001, &s3c_qos->s3cqos3);
109 writel(0x00002032, &s3c_qos->s3cqos4);
110 writel(0x20410FFF, &s3c_qos->s3cqos5);
111 writel(0x200A2023, &s3c_qos->s3cqos6);
112 writel(0x20502001, &s3c_qos->s3cqos7);
113 writel(0x20142032, &s3c_qos->s3cqos8);
114
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]115 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]116 writel(0x00810089, &s3c_qos->s3cqos0);
117 writel(0x20410001, &s3c_qos->s3cqos1);
118 writel(0x200A2023, &s3c_qos->s3cqos2);
119 writel(0x20502001, &s3c_qos->s3cqos3);
120 writel(0x00002032, &s3c_qos->s3cqos4);
121 writel(0x20410FFF, &s3c_qos->s3cqos5);
122 writel(0x200A2023, &s3c_qos->s3cqos6);
123 writel(0x20502001, &s3c_qos->s3cqos7);
124 writel(0x20142032, &s3c_qos->s3cqos8);
125
126 writel(0x00200808, &s3c->s3carcr11);
127
128 /* DBSC -QoS */
Nobuhiro Iwamatsud247fb22014-07-29 12:13:16 +0900[diff] [blame]129 /* DBSC0 - Read */
130 for (i = DBSC3_00; i < DBSC3_NR; i++) {
131 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
132 writel(0x00000203, &qos_addr->dblgcnt);
133 writel(0x00002064, &qos_addr->dbtmval0);
134 writel(0x00002048, &qos_addr->dbtmval1);
135 writel(0x00002032, &qos_addr->dbtmval2);
136 writel(0x00002019, &qos_addr->dbtmval3);
137 writel(0x00000001, &qos_addr->dbrqctr);
138 writel(0x00002019, &qos_addr->dbthres0);
139 writel(0x00002019, &qos_addr->dbthres1);
140 writel(0x00002019, &qos_addr->dbthres2);
141 writel(0x00000000, &qos_addr->dblgqon);
142 }
143
144 /* DBSC0 - Write */
145 for (i = DBSC3_00; i < DBSC3_NR; i++) {
146 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]147 writel(0x00000203, &qos_addr->dblgcnt);
148 writel(0x00002064, &qos_addr->dbtmval0);
149 writel(0x00002048, &qos_addr->dbtmval1);
150 writel(0x00002032, &qos_addr->dbtmval2);
151 writel(0x00002019, &qos_addr->dbtmval3);
152 writel(0x00000001, &qos_addr->dbrqctr);
153 writel(0x00002019, &qos_addr->dbthres0);
154 writel(0x00002019, &qos_addr->dbthres1);
155 writel(0x00002019, &qos_addr->dbthres2);
156 writel(0x00000000, &qos_addr->dblgqon);
157 }
Nobuhiro Iwamatsud247fb22014-07-29 12:13:16 +0900[diff] [blame]158
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]159 /* CCI-400 -QoS */
160 writel(0x20001000, CCI_400_MAXOT_1);
161 writel(0x20001000, CCI_400_MAXOT_2);
162 writel(0x0000000C, CCI_400_QOSCNTL_1);
163 writel(0x0000000C, CCI_400_QOSCNTL_2);
164
165 /* MXI -QoS */
166 /* Transaction Control (MXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]167 mxi = (struct rcar_mxi *)MXI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]168 writel(0x00000013, &mxi->mxrtcr);
169 writel(0x00000013, &mxi->mxwtcr);
170 writel(0x00B800C0, &mxi->mxsaar0);
171 writel(0x02000800, &mxi->mxsaar1);
172 writel(0x00200000, &mxi->mxs3cracr);
173 writel(0x00200000, &mxi->mxs3cwacr);
174 writel(0x00200000, &mxi->mxaxiracr);
175 writel(0x00200000, &mxi->mxaxiwacr);
176
177 /* QoS Control (MXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]178 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]179 writel(0x0000000C, &mxi_qos->vspdu0);
180 writel(0x0000000C, &mxi_qos->vspdu1);
181 writel(0x0000000D, &mxi_qos->du0);
182 writel(0x0000000D, &mxi_qos->du1);
183
184 /* AXI -QoS */
185 /* Transaction Control (MXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]186 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]187 writel(0x00000002, &axi_qos->qosconf);
188 writel(0x0000200F, &axi_qos->qosctset0);
189 writel(0x00002009, &axi_qos->qosctset1);
190 writel(0x00002003, &axi_qos->qosctset2);
191 writel(0x00002003, &axi_qos->qosctset3);
192 writel(0x00000001, &axi_qos->qosreqctr);
193 writel(0x00002006, &axi_qos->qosthres0);
194 writel(0x00002001, &axi_qos->qosthres1);
195 writel(0x00000000, &axi_qos->qosthres2);
196 writel(0x00000001, &axi_qos->qosqon);
197
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]198 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]199 writel(0x00000000, &axi_qos->qosconf);
200 writel(0x0000200A, &axi_qos->qosctset0);
201 writel(0x00000001, &axi_qos->qosreqctr);
202 writel(0x00002006, &axi_qos->qosthres0);
203 writel(0x00002001, &axi_qos->qosthres1);
204 writel(0x00000000, &axi_qos->qosthres2);
205 writel(0x00000001, &axi_qos->qosqon);
206
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]207 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]208 writel(0x00000000, &axi_qos->qosconf);
209 writel(0x0000200A, &axi_qos->qosctset0);
210 writel(0x00000001, &axi_qos->qosreqctr);
211 writel(0x00002006, &axi_qos->qosthres0);
212 writel(0x00002001, &axi_qos->qosthres1);
213 writel(0x00000000, &axi_qos->qosthres2);
214 writel(0x00000001, &axi_qos->qosqon);
215
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]216 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]217 writel(0x00000000, &axi_qos->qosconf);
218 writel(0x00002002, &axi_qos->qosctset0);
219 writel(0x00000001, &axi_qos->qosreqctr);
220 writel(0x00002006, &axi_qos->qosthres0);
221 writel(0x00002001, &axi_qos->qosthres1);
222 writel(0x00000000, &axi_qos->qosthres2);
223 writel(0x00000001, &axi_qos->qosqon);
224
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]225 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]226 writel(0x00000000, &axi_qos->qosconf);
227 writel(0x00002004, &axi_qos->qosctset0);
228 writel(0x00000001, &axi_qos->qosreqctr);
229 writel(0x00002006, &axi_qos->qosthres0);
230 writel(0x00002001, &axi_qos->qosthres1);
231 writel(0x00000000, &axi_qos->qosthres2);
232 writel(0x00000001, &axi_qos->qosqon);
233
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]234 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]235 writel(0x00000002, &axi_qos->qosconf);
236 writel(0x0000200F, &axi_qos->qosctset0);
237 writel(0x00002009, &axi_qos->qosctset1);
238 writel(0x00002003, &axi_qos->qosctset2);
239 writel(0x00002003, &axi_qos->qosctset3);
240 writel(0x00000001, &axi_qos->qosreqctr);
241 writel(0x00002006, &axi_qos->qosthres0);
242 writel(0x00002001, &axi_qos->qosthres1);
243 writel(0x00000000, &axi_qos->qosthres2);
244 writel(0x00000001, &axi_qos->qosqon);
245
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]246 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]247 writel(0x00000002, &axi_qos->qosconf);
248 writel(0x0000200F, &axi_qos->qosctset0);
249 writel(0x00002009, &axi_qos->qosctset1);
250 writel(0x00002003, &axi_qos->qosctset2);
251 writel(0x00002003, &axi_qos->qosctset3);
252 writel(0x00000001, &axi_qos->qosreqctr);
253 writel(0x00002006, &axi_qos->qosthres0);
254 writel(0x00002001, &axi_qos->qosthres1);
255 writel(0x00000000, &axi_qos->qosthres2);
256 writel(0x00000001, &axi_qos->qosqon);
257
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]258 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]259 writel(0x00000002, &axi_qos->qosconf);
260 writel(0x0000200F, &axi_qos->qosctset0);
261 writel(0x00002009, &axi_qos->qosctset1);
262 writel(0x00002003, &axi_qos->qosctset2);
263 writel(0x00002003, &axi_qos->qosctset3);
264 writel(0x00000001, &axi_qos->qosreqctr);
265 writel(0x00002006, &axi_qos->qosthres0);
266 writel(0x00002001, &axi_qos->qosthres1);
267 writel(0x00000000, &axi_qos->qosthres2);
268 writel(0x00000001, &axi_qos->qosqon);
269
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]270 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]271 writel(0x00000000, &axi_qos->qosconf);
272 writel(0x00002014, &axi_qos->qosctset0);
273 writel(0x00000001, &axi_qos->qosreqctr);
274 writel(0x00002006, &axi_qos->qosthres0);
275 writel(0x00002001, &axi_qos->qosthres1);
276 writel(0x00000000, &axi_qos->qosthres2);
277 writel(0x00000001, &axi_qos->qosqon);
278
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]279 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]280 writel(0x00000001, &axi_qos->qosconf);
281 writel(0x00002001, &axi_qos->qosctset0);
282 writel(0x00002009, &axi_qos->qosctset1);
283 writel(0x00002003, &axi_qos->qosctset2);
284 writel(0x00002003, &axi_qos->qosctset3);
285 writel(0x00000001, &axi_qos->qosreqctr);
286 writel(0x00002006, &axi_qos->qosthres0);
287 writel(0x00002001, &axi_qos->qosthres1);
288 writel(0x00000000, &axi_qos->qosthres2);
289 writel(0x00000001, &axi_qos->qosqon);
290
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]291 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]292 writel(0x00000001, &axi_qos->qosconf);
293 writel(0x00002001, &axi_qos->qosctset0);
294 writel(0x00002009, &axi_qos->qosctset1);
295 writel(0x00002003, &axi_qos->qosctset2);
296 writel(0x00002003, &axi_qos->qosctset3);
297 writel(0x00000001, &axi_qos->qosreqctr);
298 writel(0x00002006, &axi_qos->qosthres0);
299 writel(0x00002001, &axi_qos->qosthres1);
300 writel(0x00000000, &axi_qos->qosthres2);
301 writel(0x00000001, &axi_qos->qosqon);
302
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]303 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]304 writel(0x00000001, &axi_qos->qosconf);
305 writel(0x00002001, &axi_qos->qosctset0);
306 writel(0x00002009, &axi_qos->qosctset1);
307 writel(0x00002003, &axi_qos->qosctset2);
308 writel(0x00002003, &axi_qos->qosctset3);
309 writel(0x00000001, &axi_qos->qosreqctr);
310 writel(0x00002006, &axi_qos->qosthres0);
311 writel(0x00002001, &axi_qos->qosthres1);
312 writel(0x00000000, &axi_qos->qosthres2);
313 writel(0x00000001, &axi_qos->qosqon);
314
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]315 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]316 writel(0x00000001, &axi_qos->qosconf);
317 writel(0x00002001, &axi_qos->qosctset0);
318 writel(0x00002009, &axi_qos->qosctset1);
319 writel(0x00002003, &axi_qos->qosctset2);
320 writel(0x00002003, &axi_qos->qosctset3);
321 writel(0x00000001, &axi_qos->qosreqctr);
322 writel(0x00002006, &axi_qos->qosthres0);
323 writel(0x00002001, &axi_qos->qosthres1);
324 writel(0x00000000, &axi_qos->qosthres2);
325 writel(0x00000001, &axi_qos->qosqon);
326
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]327 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]328 writel(0x00000001, &axi_qos->qosconf);
329 writel(0x00002001, &axi_qos->qosctset0);
330 writel(0x00002009, &axi_qos->qosctset1);
331 writel(0x00002003, &axi_qos->qosctset2);
332 writel(0x00002003, &axi_qos->qosctset3);
333 writel(0x00000001, &axi_qos->qosreqctr);
334 writel(0x00002006, &axi_qos->qosthres0);
335 writel(0x00002001, &axi_qos->qosthres1);
336 writel(0x00000000, &axi_qos->qosthres2);
337 writel(0x00000001, &axi_qos->qosqon);
338
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]339 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]340 writel(0x00000000, &axi_qos->qosconf);
341 writel(0x00002002, &axi_qos->qosctset0);
342 writel(0x00000001, &axi_qos->qosreqctr);
343 writel(0x00002006, &axi_qos->qosthres0);
344 writel(0x00002001, &axi_qos->qosthres1);
345 writel(0x00000000, &axi_qos->qosthres2);
346 writel(0x00000001, &axi_qos->qosqon);
347
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]348 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]349 writel(0x00000000, &axi_qos->qosconf);
350 writel(0x00002002, &axi_qos->qosctset0);
351 writel(0x00000001, &axi_qos->qosreqctr);
352 writel(0x00002006, &axi_qos->qosthres0);
353 writel(0x00002001, &axi_qos->qosthres1);
354 writel(0x00000000, &axi_qos->qosthres2);
355 writel(0x00000001, &axi_qos->qosqon);
356
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]357 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]358 writel(0x00000000, &axi_qos->qosconf);
359 writel(0x00002014, &axi_qos->qosctset0);
360 writel(0x00000001, &axi_qos->qosreqctr);
361 writel(0x00002006, &axi_qos->qosthres0);
362 writel(0x00002001, &axi_qos->qosthres1);
363 writel(0x00000000, &axi_qos->qosthres2);
364 writel(0x00000001, &axi_qos->qosqon);
365
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]366 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]367 writel(0x00000002, &axi_qos->qosconf);
368 writel(0x0000200F, &axi_qos->qosctset0);
369 writel(0x00002009, &axi_qos->qosctset1);
370 writel(0x00002003, &axi_qos->qosctset2);
371 writel(0x00002003, &axi_qos->qosctset3);
372 writel(0x00000001, &axi_qos->qosreqctr);
373 writel(0x00002006, &axi_qos->qosthres0);
374 writel(0x00002001, &axi_qos->qosthres1);
375 writel(0x00000000, &axi_qos->qosthres2);
376 writel(0x00000001, &axi_qos->qosqon);
377
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]378 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]379 writel(0x00000000, &axi_qos->qosconf);
380 writel(0x0000200A, &axi_qos->qosctset0);
381 writel(0x00000001, &axi_qos->qosreqctr);
382 writel(0x00002006, &axi_qos->qosthres0);
383 writel(0x00002001, &axi_qos->qosthres1);
384 writel(0x00000000, &axi_qos->qosthres2);
385 writel(0x00000001, &axi_qos->qosqon);
386
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]387 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]388 writel(0x00000000, &axi_qos->qosconf);
389 writel(0x0000200A, &axi_qos->qosctset0);
390 writel(0x00000001, &axi_qos->qosreqctr);
391 writel(0x00002006, &axi_qos->qosthres0);
392 writel(0x00002001, &axi_qos->qosthres1);
393 writel(0x00000000, &axi_qos->qosthres2);
394 writel(0x00000001, &axi_qos->qosqon);
395
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]396 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]397 writel(0x00000000, &axi_qos->qosconf);
398 writel(0x00002005, &axi_qos->qosctset0);
399 writel(0x00000001, &axi_qos->qosreqctr);
400 writel(0x00002006, &axi_qos->qosthres0);
401 writel(0x00002001, &axi_qos->qosthres1);
402 writel(0x00000000, &axi_qos->qosthres2);
403 writel(0x00000001, &axi_qos->qosqon);
404
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]405 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]406 writel(0x00000000, &axi_qos->qosconf);
407 writel(0x00002005, &axi_qos->qosctset0);
408 writel(0x00000001, &axi_qos->qosreqctr);
409 writel(0x00002006, &axi_qos->qosthres0);
410 writel(0x00002001, &axi_qos->qosthres1);
411 writel(0x00000000, &axi_qos->qosthres2);
412 writel(0x00000001, &axi_qos->qosqon);
413
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]414 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]415 writel(0x00000000, &axi_qos->qosconf);
416 writel(0x00002005, &axi_qos->qosctset0);
417 writel(0x00000001, &axi_qos->qosreqctr);
418 writel(0x00002006, &axi_qos->qosthres0);
419 writel(0x00002001, &axi_qos->qosthres1);
420 writel(0x00000000, &axi_qos->qosthres2);
421 writel(0x00000001, &axi_qos->qosqon);
422
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]423 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]424 writel(0x00000000, &axi_qos->qosconf);
425 writel(0x00002014, &axi_qos->qosctset0);
426 writel(0x00000001, &axi_qos->qosreqctr);
427 writel(0x00002006, &axi_qos->qosthres0);
428 writel(0x00002001, &axi_qos->qosthres1);
429 writel(0x00000000, &axi_qos->qosthres2);
430 writel(0x00000001, &axi_qos->qosqon);
431
432 /* QoS Register (RT-AXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]433 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]434 writel(0x00000000, &axi_qos->qosconf);
435 writel(0x00002005, &axi_qos->qosctset0);
436 writel(0x00002009, &axi_qos->qosctset1);
437 writel(0x00002003, &axi_qos->qosctset2);
438 writel(0x00002003, &axi_qos->qosctset3);
439 writel(0x00000001, &axi_qos->qosreqctr);
440 writel(0x00002006, &axi_qos->qosthres0);
441 writel(0x00002001, &axi_qos->qosthres1);
442 writel(0x00000000, &axi_qos->qosthres2);
443 writel(0x00000001, &axi_qos->qosqon);
444
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]445 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]446 writel(0x00000000, &axi_qos->qosconf);
447 writel(0x00002007, &axi_qos->qosctset0);
448 writel(0x00000001, &axi_qos->qosreqctr);
449 writel(0x00002006, &axi_qos->qosthres0);
450 writel(0x00002001, &axi_qos->qosthres1);
451 writel(0x00000000, &axi_qos->qosthres2);
452 writel(0x00000001, &axi_qos->qosqon);
453
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]454 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]455 writel(0x00000002, &axi_qos->qosconf);
456 writel(0x0000200F, &axi_qos->qosctset0);
457 writel(0x00002009, &axi_qos->qosctset1);
458 writel(0x00002003, &axi_qos->qosctset2);
459 writel(0x00002003, &axi_qos->qosctset3);
460 writel(0x00000001, &axi_qos->qosreqctr);
461 writel(0x00002006, &axi_qos->qosthres0);
462 writel(0x00002001, &axi_qos->qosthres1);
463 writel(0x00000000, &axi_qos->qosthres2);
464 writel(0x00000001, &axi_qos->qosqon);
465
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]466 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]467 writel(0x00000000, &axi_qos->qosconf);
468 writel(0x00002003, &axi_qos->qosctset0);
469 writel(0x00002009, &axi_qos->qosctset1);
470 writel(0x00002003, &axi_qos->qosctset2);
471 writel(0x00002003, &axi_qos->qosctset3);
472 writel(0x00000001, &axi_qos->qosreqctr);
473 writel(0x00002006, &axi_qos->qosthres0);
474 writel(0x00002001, &axi_qos->qosthres1);
475 writel(0x00000000, &axi_qos->qosthres2);
476 writel(0x00000001, &axi_qos->qosqon);
477
478 /* QoS Register (MP-AXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]479 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]480 writel(0x00000000, &axi_qos->qosconf);
481 writel(0x00002007, &axi_qos->qosctset0);
482 writel(0x00000001, &axi_qos->qosreqctr);
483 writel(0x00002006, &axi_qos->qosthres0);
484 writel(0x00002001, &axi_qos->qosthres1);
485 writel(0x00000000, &axi_qos->qosthres2);
486 writel(0x00000001, &axi_qos->qosqon);
487
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]488 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]489 writel(0x00000001, &axi_qos->qosconf);
490 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu35ba51e2014-03-28 14:10:06 +0900[diff] [blame]491 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]492 writel(0x00002006, &axi_qos->qosthres0);
493 writel(0x00002001, &axi_qos->qosthres1);
494 writel(0x00000000, &axi_qos->qosthres2);
495 writel(0x00000001, &axi_qos->qosqon);
496
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]497 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]498 writel(0x00000001, &axi_qos->qosconf);
499 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu35ba51e2014-03-28 14:10:06 +0900[diff] [blame]500 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]501 writel(0x00002006, &axi_qos->qosthres0);
502 writel(0x00002001, &axi_qos->qosthres1);
503 writel(0x00000000, &axi_qos->qosthres2);
504 writel(0x00000001, &axi_qos->qosqon);
505
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]506 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
Nobuhiro Iwamatsu35ba51e2014-03-28 14:10:06 +0900[diff] [blame]507 writel(0x00000001, &axi_qos->qosconf);
508 writel(0x00001FF0, &axi_qos->qosctset0);
509 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]510 writel(0x00002006, &axi_qos->qosthres0);
511 writel(0x00002001, &axi_qos->qosthres1);
Nobuhiro Iwamatsu35ba51e2014-03-28 14:10:06 +0900[diff] [blame]512 writel(0x00002001, &axi_qos->qosthres2);
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]513 writel(0x00000001, &axi_qos->qosqon);
514
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]515 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]516 writel(0x00000001, &axi_qos->qosconf);
517 writel(0x00002001, &axi_qos->qosctset0);
518 writel(0x00002009, &axi_qos->qosctset1);
519 writel(0x00002003, &axi_qos->qosctset2);
520 writel(0x00002003, &axi_qos->qosctset3);
521 writel(0x00000001, &axi_qos->qosreqctr);
522 writel(0x00002006, &axi_qos->qosthres0);
523 writel(0x00002001, &axi_qos->qosthres1);
524 writel(0x00000000, &axi_qos->qosthres2);
525 writel(0x00000001, &axi_qos->qosqon);
526
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]527 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]528 writel(0x00000000, &axi_qos->qosconf);
529 writel(0x00002018, &axi_qos->qosctset0);
530 writel(0x00000001, &axi_qos->qosreqctr);
531 writel(0x00002006, &axi_qos->qosthres0);
532 writel(0x00002001, &axi_qos->qosthres1);
533 writel(0x00000000, &axi_qos->qosthres2);
534 writel(0x00000001, &axi_qos->qosqon);
535
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]536 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]537 writel(0x00000000, &axi_qos->qosconf);
538 writel(0x0000200D, &axi_qos->qosctset0);
539 writel(0x00000001, &axi_qos->qosreqctr);
540 writel(0x00002006, &axi_qos->qosthres0);
541 writel(0x00002001, &axi_qos->qosthres1);
542 writel(0x00000000, &axi_qos->qosthres2);
543 writel(0x00000001, &axi_qos->qosqon);
544
545 /* QoS Register (SYS-AXI256) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]546 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]547 writel(0x00000002, &axi_qos->qosconf);
548 writel(0x0000200F, &axi_qos->qosctset0);
549 writel(0x00002009, &axi_qos->qosctset1);
550 writel(0x00002003, &axi_qos->qosctset2);
551 writel(0x00002003, &axi_qos->qosctset3);
552 writel(0x00000001, &axi_qos->qosreqctr);
553 writel(0x00002006, &axi_qos->qosthres0);
554 writel(0x00002001, &axi_qos->qosthres1);
555 writel(0x00000000, &axi_qos->qosthres2);
556 writel(0x00000001, &axi_qos->qosqon);
557
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]558 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]559 writel(0x00000002, &axi_qos->qosconf);
560 writel(0x0000200F, &axi_qos->qosctset0);
561 writel(0x00002009, &axi_qos->qosctset1);
562 writel(0x00002003, &axi_qos->qosctset2);
563 writel(0x00002003, &axi_qos->qosctset3);
564 writel(0x00000001, &axi_qos->qosreqctr);
565 writel(0x00002006, &axi_qos->qosthres0);
566 writel(0x00002001, &axi_qos->qosthres1);
567 writel(0x00000000, &axi_qos->qosthres2);
568 writel(0x00000001, &axi_qos->qosqon);
569
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]570 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]571 writel(0x00000002, &axi_qos->qosconf);
572 writel(0x0000200F, &axi_qos->qosctset0);
573 writel(0x00002009, &axi_qos->qosctset1);
574 writel(0x00002003, &axi_qos->qosctset2);
575 writel(0x00002003, &axi_qos->qosctset3);
576 writel(0x00000001, &axi_qos->qosreqctr);
577 writel(0x00002006, &axi_qos->qosthres0);
578 writel(0x00002001, &axi_qos->qosthres1);
579 writel(0x00000000, &axi_qos->qosthres2);
580 writel(0x00000001, &axi_qos->qosqon);
581
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]582 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]583 writel(0x00000002, &axi_qos->qosconf);
584 writel(0x0000200F, &axi_qos->qosctset0);
585 writel(0x00002009, &axi_qos->qosctset1);
586 writel(0x00002003, &axi_qos->qosctset2);
587 writel(0x00002003, &axi_qos->qosctset3);
588 writel(0x00000001, &axi_qos->qosreqctr);
589 writel(0x00002006, &axi_qos->qosthres0);
590 writel(0x00002001, &axi_qos->qosthres1);
591 writel(0x00000000, &axi_qos->qosthres2);
592 writel(0x00000001, &axi_qos->qosqon);
593
594 /* QoS Register (CCI-AXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]595 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]596 writel(0x00000001, &axi_qos->qosconf);
597 writel(0x00002001, &axi_qos->qosctset0);
598 writel(0x00002009, &axi_qos->qosctset1);
599 writel(0x00002003, &axi_qos->qosctset2);
600 writel(0x00002003, &axi_qos->qosctset3);
601 writel(0x00000001, &axi_qos->qosreqctr);
602 writel(0x00002006, &axi_qos->qosthres0);
603 writel(0x00002001, &axi_qos->qosthres1);
604 writel(0x00000000, &axi_qos->qosthres2);
605 writel(0x00000001, &axi_qos->qosqon);
606
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]607 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]608 writel(0x00000002, &axi_qos->qosconf);
609 writel(0x0000200F, &axi_qos->qosctset0);
610 writel(0x00002009, &axi_qos->qosctset1);
611 writel(0x00002003, &axi_qos->qosctset2);
612 writel(0x00002003, &axi_qos->qosctset3);
613 writel(0x00000001, &axi_qos->qosreqctr);
614 writel(0x00002006, &axi_qos->qosthres0);
615 writel(0x00002001, &axi_qos->qosthres1);
616 writel(0x00000000, &axi_qos->qosthres2);
617 writel(0x00000001, &axi_qos->qosqon);
618
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]619 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]620 writel(0x00000001, &axi_qos->qosconf);
621 writel(0x00002001, &axi_qos->qosctset0);
622 writel(0x00002009, &axi_qos->qosctset1);
623 writel(0x00002003, &axi_qos->qosctset2);
624 writel(0x00002003, &axi_qos->qosctset3);
625 writel(0x00000001, &axi_qos->qosreqctr);
626 writel(0x00002006, &axi_qos->qosthres0);
627 writel(0x00002001, &axi_qos->qosthres1);
628 writel(0x00000000, &axi_qos->qosthres2);
629 writel(0x00000001, &axi_qos->qosqon);
630
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]631 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]632 writel(0x00000001, &axi_qos->qosconf);
633 writel(0x00002001, &axi_qos->qosctset0);
634 writel(0x00002009, &axi_qos->qosctset1);
635 writel(0x00002003, &axi_qos->qosctset2);
636 writel(0x00002003, &axi_qos->qosctset3);
637 writel(0x00000001, &axi_qos->qosreqctr);
638 writel(0x00002006, &axi_qos->qosthres0);
639 writel(0x00002001, &axi_qos->qosthres1);
640 writel(0x00000000, &axi_qos->qosthres2);
641 writel(0x00000001, &axi_qos->qosqon);
642
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]643 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]644 writel(0x00000001, &axi_qos->qosconf);
645 writel(0x00002001, &axi_qos->qosctset0);
646 writel(0x00002009, &axi_qos->qosctset1);
647 writel(0x00002003, &axi_qos->qosctset2);
648 writel(0x00002003, &axi_qos->qosctset3);
649 writel(0x00000001, &axi_qos->qosreqctr);
650 writel(0x00002006, &axi_qos->qosthres0);
651 writel(0x00002001, &axi_qos->qosthres1);
652 writel(0x00000000, &axi_qos->qosthres2);
653 writel(0x00000001, &axi_qos->qosqon);
654
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]655 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]656 writel(0x00000002, &axi_qos->qosconf);
657 writel(0x0000200F, &axi_qos->qosctset0);
658 writel(0x00002009, &axi_qos->qosctset1);
659 writel(0x00002003, &axi_qos->qosctset2);
660 writel(0x00002003, &axi_qos->qosctset3);
661 writel(0x00000001, &axi_qos->qosreqctr);
662 writel(0x00002006, &axi_qos->qosthres0);
663 writel(0x00002001, &axi_qos->qosthres1);
664 writel(0x00000000, &axi_qos->qosthres2);
665 writel(0x00000001, &axi_qos->qosqon);
666
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]667 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]668 writel(0x00000001, &axi_qos->qosconf);
669 writel(0x00002001, &axi_qos->qosctset0);
670 writel(0x00002009, &axi_qos->qosctset1);
671 writel(0x00002003, &axi_qos->qosctset2);
672 writel(0x00002003, &axi_qos->qosctset3);
673 writel(0x00000001, &axi_qos->qosreqctr);
674 writel(0x00002006, &axi_qos->qosthres0);
675 writel(0x00002001, &axi_qos->qosthres1);
676 writel(0x00000000, &axi_qos->qosthres2);
677 writel(0x00000001, &axi_qos->qosqon);
678
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]679 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]680 writel(0x00000001, &axi_qos->qosconf);
681 writel(0x00002001, &axi_qos->qosctset0);
682 writel(0x00002009, &axi_qos->qosctset1);
683 writel(0x00002003, &axi_qos->qosctset2);
684 writel(0x00002003, &axi_qos->qosctset3);
685 writel(0x00000001, &axi_qos->qosreqctr);
686 writel(0x00002006, &axi_qos->qosthres0);
687 writel(0x00002001, &axi_qos->qosthres1);
688 writel(0x00000000, &axi_qos->qosthres2);
689 writel(0x00000001, &axi_qos->qosqon);
690
691 /* QoS Register (Media-AXI) */
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]692 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]693 writel(0x00000001, &axi_qos->qosconf);
694 writel(0x00002018, &axi_qos->qosctset0);
695 writel(0x00000020, &axi_qos->qosreqctr);
696 writel(0x00002006, &axi_qos->qosthres0);
697 writel(0x00002001, &axi_qos->qosthres1);
698 writel(0x00000001, &axi_qos->qosthres2);
699 writel(0x00000001, &axi_qos->qosqon);
700
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]701 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]702 writel(0x00000001, &axi_qos->qosconf);
703 writel(0x00002018, &axi_qos->qosctset0);
704 writel(0x00000020, &axi_qos->qosreqctr);
705 writel(0x00002006, &axi_qos->qosthres0);
706 writel(0x00002001, &axi_qos->qosthres1);
707 writel(0x00000001, &axi_qos->qosthres2);
708 writel(0x00000001, &axi_qos->qosqon);
709
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]710 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]711 writel(0x00000001, &axi_qos->qosconf);
712 writel(0x00002018, &axi_qos->qosctset0);
713 writel(0x00000020, &axi_qos->qosreqctr);
714 writel(0x00002006, &axi_qos->qosthres0);
715 writel(0x00002001, &axi_qos->qosthres1);
716 writel(0x00000001, &axi_qos->qosthres2);
717 writel(0x00000001, &axi_qos->qosqon);
718
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]719 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]720 writel(0x00000001, &axi_qos->qosconf);
721 writel(0x00002018, &axi_qos->qosctset0);
722 writel(0x00000020, &axi_qos->qosreqctr);
723 writel(0x00002006, &axi_qos->qosthres0);
724 writel(0x00002001, &axi_qos->qosthres1);
725 writel(0x00000001, &axi_qos->qosthres2);
726 writel(0x00000001, &axi_qos->qosqon);
727
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]728 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]729 writel(0x00000001, &axi_qos->qosconf);
730 writel(0x00002018, &axi_qos->qosctset0);
731 writel(0x00000020, &axi_qos->qosreqctr);
732 writel(0x00002006, &axi_qos->qosthres0);
733 writel(0x00002001, &axi_qos->qosthres1);
734 writel(0x00000001, &axi_qos->qosthres2);
735 writel(0x00000001, &axi_qos->qosqon);
736
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]737 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]738 writel(0x00000001, &axi_qos->qosconf);
739 writel(0x00002018, &axi_qos->qosctset0);
740 writel(0x00000020, &axi_qos->qosreqctr);
741 writel(0x00002006, &axi_qos->qosthres0);
742 writel(0x00002001, &axi_qos->qosthres1);
743 writel(0x00000001, &axi_qos->qosthres2);
744 writel(0x00000001, &axi_qos->qosqon);
745
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]746 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]747 writel(0x00000001, &axi_qos->qosconf);
748 writel(0x00002018, &axi_qos->qosctset0);
749 writel(0x00000020, &axi_qos->qosreqctr);
750 writel(0x00002006, &axi_qos->qosthres0);
751 writel(0x00002001, &axi_qos->qosthres1);
752 writel(0x00000001, &axi_qos->qosthres2);
753 writel(0x00000001, &axi_qos->qosqon);
754
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]755 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]756 writel(0x00000001, &axi_qos->qosconf);
757 writel(0x00002018, &axi_qos->qosctset0);
758 writel(0x00000020, &axi_qos->qosreqctr);
759 writel(0x00002006, &axi_qos->qosthres0);
760 writel(0x00002001, &axi_qos->qosthres1);
761 writel(0x00000001, &axi_qos->qosthres2);
762 writel(0x00000001, &axi_qos->qosqon);
763
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]764 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]765 writel(0x00000001, &axi_qos->qosconf);
766 writel(0x00002018, &axi_qos->qosctset0);
767 writel(0x00000020, &axi_qos->qosreqctr);
768 writel(0x00002006, &axi_qos->qosthres0);
769 writel(0x00002001, &axi_qos->qosthres1);
770 writel(0x00000001, &axi_qos->qosthres2);
771 writel(0x00000001, &axi_qos->qosqon);
772
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]773 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]774 writel(0x00000001, &axi_qos->qosconf);
775 writel(0x00002018, &axi_qos->qosctset0);
776 writel(0x00000020, &axi_qos->qosreqctr);
777 writel(0x00002006, &axi_qos->qosthres0);
778 writel(0x00002001, &axi_qos->qosthres1);
779 writel(0x00000001, &axi_qos->qosthres2);
780 writel(0x00000001, &axi_qos->qosqon);
781
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]782 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]783 writel(0x00000001, &axi_qos->qosconf);
784 writel(0x00002018, &axi_qos->qosctset0);
785 writel(0x00000020, &axi_qos->qosreqctr);
786 writel(0x00002006, &axi_qos->qosthres0);
787 writel(0x00002001, &axi_qos->qosthres1);
788 writel(0x00000001, &axi_qos->qosthres2);
789 writel(0x00000001, &axi_qos->qosqon);
790
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]791 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]792 writel(0x00000001, &axi_qos->qosconf);
793 writel(0x00002018, &axi_qos->qosctset0);
794 writel(0x00000020, &axi_qos->qosreqctr);
795 writel(0x00002006, &axi_qos->qosthres0);
796 writel(0x00002001, &axi_qos->qosthres1);
797 writel(0x00000001, &axi_qos->qosthres2);
798 writel(0x00000001, &axi_qos->qosqon);
799
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]800 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]801 writel(0x00000001, &axi_qos->qosconf);
802 writel(0x00002018, &axi_qos->qosctset0);
803 writel(0x00000020, &axi_qos->qosreqctr);
804 writel(0x00002006, &axi_qos->qosthres0);
805 writel(0x00002001, &axi_qos->qosthres1);
806 writel(0x00000001, &axi_qos->qosthres2);
807 writel(0x00000001, &axi_qos->qosqon);
808
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]809 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]810 writel(0x00000001, &axi_qos->qosconf);
811 writel(0x00002018, &axi_qos->qosctset0);
812 writel(0x00000020, &axi_qos->qosreqctr);
813 writel(0x00002006, &axi_qos->qosthres0);
814 writel(0x00002001, &axi_qos->qosthres1);
815 writel(0x00000001, &axi_qos->qosthres2);
816 writel(0x00000001, &axi_qos->qosqon);
817
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]818 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]819 writel(0x00000001, &axi_qos->qosconf);
820 writel(0x00002018, &axi_qos->qosctset0);
821 writel(0x00000020, &axi_qos->qosreqctr);
822 writel(0x00002006, &axi_qos->qosthres0);
823 writel(0x00002001, &axi_qos->qosthres1);
824 writel(0x00000001, &axi_qos->qosthres2);
825 writel(0x00000001, &axi_qos->qosqon);
826
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]827 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]828 writel(0x00000001, &axi_qos->qosconf);
829 writel(0x00002018, &axi_qos->qosctset0);
830 writel(0x00000020, &axi_qos->qosreqctr);
831 writel(0x00002006, &axi_qos->qosthres0);
832 writel(0x00002001, &axi_qos->qosthres1);
833 writel(0x00000001, &axi_qos->qosthres2);
834 writel(0x00000001, &axi_qos->qosqon);
835
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]836 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]837 writel(0x00000001, &axi_qos->qosconf);
838 writel(0x0000200C, &axi_qos->qosctset0);
839 writel(0x00000020, &axi_qos->qosreqctr);
840 writel(0x00002006, &axi_qos->qosthres0);
841 writel(0x00002001, &axi_qos->qosthres1);
842 writel(0x00000001, &axi_qos->qosthres2);
843 writel(0x00000001, &axi_qos->qosqon);
844
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]845 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]846 writel(0x00000001, &axi_qos->qosconf);
847 writel(0x0000200C, &axi_qos->qosctset0);
848 writel(0x00000020, &axi_qos->qosreqctr);
849 writel(0x00002006, &axi_qos->qosthres0);
850 writel(0x00002001, &axi_qos->qosthres1);
851 writel(0x00000001, &axi_qos->qosthres2);
852 writel(0x00000001, &axi_qos->qosqon);
853
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]854 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]855 writel(0x00000001, &axi_qos->qosconf);
856 writel(0x0000200C, &axi_qos->qosctset0);
857 writel(0x00000020, &axi_qos->qosreqctr);
858 writel(0x00002006, &axi_qos->qosthres0);
859 writel(0x00002001, &axi_qos->qosthres1);
860 writel(0x00000001, &axi_qos->qosthres2);
861 writel(0x00000001, &axi_qos->qosqon);
862
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]863 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]864 writel(0x00000001, &axi_qos->qosconf);
865 writel(0x0000200C, &axi_qos->qosctset0);
866 writel(0x00000020, &axi_qos->qosreqctr);
867 writel(0x00002006, &axi_qos->qosthres0);
868 writel(0x00002001, &axi_qos->qosthres1);
869 writel(0x00000001, &axi_qos->qosthres2);
870 writel(0x00000001, &axi_qos->qosqon);
871
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]872 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]873 writel(0x00000001, &axi_qos->qosconf);
874 writel(0x0000200C, &axi_qos->qosctset0);
875 writel(0x00000020, &axi_qos->qosreqctr);
876 writel(0x00002006, &axi_qos->qosthres0);
877 writel(0x00002001, &axi_qos->qosthres1);
878 writel(0x00000001, &axi_qos->qosthres2);
879 writel(0x00000001, &axi_qos->qosqon);
880
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]881 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]882 writel(0x00000001, &axi_qos->qosconf);
883 writel(0x0000200C, &axi_qos->qosctset0);
884 writel(0x00000020, &axi_qos->qosreqctr);
885 writel(0x00002006, &axi_qos->qosthres0);
886 writel(0x00002001, &axi_qos->qosthres1);
887 writel(0x00000001, &axi_qos->qosthres2);
888 writel(0x00000001, &axi_qos->qosqon);
889
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]890 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]891 writel(0x00000001, &axi_qos->qosconf);
892 writel(0x0000200C, &axi_qos->qosctset0);
893 writel(0x00000020, &axi_qos->qosreqctr);
894 writel(0x00002006, &axi_qos->qosthres0);
895 writel(0x00002001, &axi_qos->qosthres1);
896 writel(0x00000001, &axi_qos->qosthres2);
897 writel(0x00000001, &axi_qos->qosqon);
898
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]899 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]900 writel(0x00000001, &axi_qos->qosconf);
901 writel(0x0000200C, &axi_qos->qosctset0);
902 writel(0x00000020, &axi_qos->qosreqctr);
903 writel(0x00002006, &axi_qos->qosthres0);
904 writel(0x00002001, &axi_qos->qosthres1);
905 writel(0x00000001, &axi_qos->qosthres2);
906 writel(0x00000001, &axi_qos->qosqon);
907
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]908 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]909 writel(0x00000001, &axi_qos->qosconf);
910 writel(0x0000200C, &axi_qos->qosctset0);
911 writel(0x00000020, &axi_qos->qosreqctr);
912 writel(0x00002006, &axi_qos->qosthres0);
913 writel(0x00002001, &axi_qos->qosthres1);
914 writel(0x00000001, &axi_qos->qosthres2);
915 writel(0x00000001, &axi_qos->qosqon);
916
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]917 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]918 writel(0x00000001, &axi_qos->qosconf);
919 writel(0x0000200C, &axi_qos->qosctset0);
920 writel(0x00000020, &axi_qos->qosreqctr);
921 writel(0x00002006, &axi_qos->qosthres0);
922 writel(0x00002001, &axi_qos->qosthres1);
923 writel(0x00000001, &axi_qos->qosthres2);
924 writel(0x00000001, &axi_qos->qosqon);
925
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]926 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]927 writel(0x00000001, &axi_qos->qosconf);
928 writel(0x0000200C, &axi_qos->qosctset0);
929 writel(0x00000020, &axi_qos->qosreqctr);
930 writel(0x00002006, &axi_qos->qosthres0);
931 writel(0x00002001, &axi_qos->qosthres1);
932 writel(0x00000001, &axi_qos->qosthres2);
933 writel(0x00000001, &axi_qos->qosqon);
934
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]935 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]936 writel(0x00000001, &axi_qos->qosconf);
937 writel(0x0000200C, &axi_qos->qosctset0);
938 writel(0x00000020, &axi_qos->qosreqctr);
939 writel(0x00002006, &axi_qos->qosthres0);
940 writel(0x00002001, &axi_qos->qosthres1);
941 writel(0x00000001, &axi_qos->qosthres2);
942 writel(0x00000001, &axi_qos->qosqon);
943
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]944 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]945 writel(0x00000001, &axi_qos->qosconf);
946 writel(0x0000200C, &axi_qos->qosctset0);
947 writel(0x00000020, &axi_qos->qosreqctr);
948 writel(0x00002006, &axi_qos->qosthres0);
949 writel(0x00002001, &axi_qos->qosthres1);
950 writel(0x00000001, &axi_qos->qosthres2);
951 writel(0x00000001, &axi_qos->qosqon);
952
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]953 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]954 writel(0x00000001, &axi_qos->qosconf);
955 writel(0x0000200C, &axi_qos->qosctset0);
956 writel(0x00000020, &axi_qos->qosreqctr);
957 writel(0x00002006, &axi_qos->qosthres0);
958 writel(0x00002001, &axi_qos->qosthres1);
959 writel(0x00000001, &axi_qos->qosthres2);
960 writel(0x00000001, &axi_qos->qosqon);
961
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]962 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]963 writel(0x00000001, &axi_qos->qosconf);
964 writel(0x0000200C, &axi_qos->qosctset0);
965 writel(0x00000020, &axi_qos->qosreqctr);
966 writel(0x00002006, &axi_qos->qosthres0);
967 writel(0x00002001, &axi_qos->qosthres1);
968 writel(0x00000001, &axi_qos->qosthres2);
969 writel(0x00000001, &axi_qos->qosqon);
970
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]971 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]972 writel(0x00000000, &axi_qos->qosconf);
973 writel(0x0000200C, &axi_qos->qosctset0);
974 writel(0x00000001, &axi_qos->qosreqctr);
975 writel(0x00002006, &axi_qos->qosthres0);
976 writel(0x00002001, &axi_qos->qosthres1);
977 writel(0x00000001, &axi_qos->qosthres2);
978 writel(0x00000001, &axi_qos->qosqon);
979
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]980 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]981 writel(0x00000000, &axi_qos->qosconf);
982 writel(0x0000200C, &axi_qos->qosctset0);
983 writel(0x00000001, &axi_qos->qosreqctr);
984 writel(0x00002006, &axi_qos->qosthres0);
985 writel(0x00002001, &axi_qos->qosthres1);
986 writel(0x00000001, &axi_qos->qosthres2);
987 writel(0x00000001, &axi_qos->qosqon);
988
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]989 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]990 writel(0x00000000, &axi_qos->qosconf);
991 writel(0x0000200C, &axi_qos->qosctset0);
992 writel(0x00000001, &axi_qos->qosreqctr);
993 writel(0x00002006, &axi_qos->qosthres0);
994 writel(0x00002001, &axi_qos->qosthres1);
995 writel(0x00000001, &axi_qos->qosthres2);
996 writel(0x00000001, &axi_qos->qosqon);
997
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]998 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]999 writel(0x00000000, &axi_qos->qosconf);
1000 writel(0x0000200C, &axi_qos->qosctset0);
1001 writel(0x00000001, &axi_qos->qosreqctr);
1002 writel(0x00002006, &axi_qos->qosthres0);
1003 writel(0x00002001, &axi_qos->qosthres1);
1004 writel(0x00000001, &axi_qos->qosthres2);
1005 writel(0x00000001, &axi_qos->qosqon);
1006
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1007 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1008 writel(0x00000000, &axi_qos->qosconf);
1009 writel(0x0000200C, &axi_qos->qosctset0);
1010 writel(0x00000001, &axi_qos->qosreqctr);
1011 writel(0x00002006, &axi_qos->qosthres0);
1012 writel(0x00002001, &axi_qos->qosthres1);
1013 writel(0x00000001, &axi_qos->qosthres2);
1014 writel(0x00000001, &axi_qos->qosqon);
1015
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1016 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1017 writel(0x00000000, &axi_qos->qosconf);
1018 writel(0x0000200C, &axi_qos->qosctset0);
1019 writel(0x00000001, &axi_qos->qosreqctr);
1020 writel(0x00002006, &axi_qos->qosthres0);
1021 writel(0x00002001, &axi_qos->qosthres1);
1022 writel(0x00000001, &axi_qos->qosthres2);
1023 writel(0x00000001, &axi_qos->qosqon);
1024
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1025 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1026 writel(0x00000000, &axi_qos->qosconf);
1027 writel(0x0000200C, &axi_qos->qosctset0);
1028 writel(0x00000001, &axi_qos->qosreqctr);
1029 writel(0x00002006, &axi_qos->qosthres0);
1030 writel(0x00002001, &axi_qos->qosthres1);
1031 writel(0x00000001, &axi_qos->qosthres2);
1032 writel(0x00000001, &axi_qos->qosqon);
1033
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1034 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1035 writel(0x00000000, &axi_qos->qosconf);
1036 writel(0x0000200C, &axi_qos->qosctset0);
1037 writel(0x00000001, &axi_qos->qosreqctr);
1038 writel(0x00002006, &axi_qos->qosthres0);
1039 writel(0x00002001, &axi_qos->qosthres1);
1040 writel(0x00000001, &axi_qos->qosthres2);
1041 writel(0x00000001, &axi_qos->qosqon);
1042
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1043 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1044 writel(0x00000001, &axi_qos->qosconf);
1045 writel(0x00002007, &axi_qos->qosctset0);
1046 writel(0x00000020, &axi_qos->qosreqctr);
1047 writel(0x00002006, &axi_qos->qosthres0);
1048 writel(0x00002001, &axi_qos->qosthres1);
1049 writel(0x00000001, &axi_qos->qosthres2);
1050 writel(0x00000001, &axi_qos->qosqon);
1051
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1052 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1053 writel(0x00000001, &axi_qos->qosconf);
1054 writel(0x00002007, &axi_qos->qosctset0);
1055 writel(0x00000020, &axi_qos->qosreqctr);
1056 writel(0x00002006, &axi_qos->qosthres0);
1057 writel(0x00002001, &axi_qos->qosthres1);
1058 writel(0x00000001, &axi_qos->qosthres2);
1059 writel(0x00000001, &axi_qos->qosqon);
1060
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1061 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1062 writel(0x00000001, &axi_qos->qosconf);
1063 writel(0x00002007, &axi_qos->qosctset0);
1064 writel(0x00000020, &axi_qos->qosreqctr);
1065 writel(0x00002006, &axi_qos->qosthres0);
1066 writel(0x00002001, &axi_qos->qosthres1);
1067 writel(0x00000001, &axi_qos->qosthres2);
1068 writel(0x00000001, &axi_qos->qosqon);
1069
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1070 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1071 writel(0x00000001, &axi_qos->qosconf);
1072 writel(0x00002007, &axi_qos->qosctset0);
1073 writel(0x00000020, &axi_qos->qosreqctr);
1074 writel(0x00002006, &axi_qos->qosthres0);
1075 writel(0x00002001, &axi_qos->qosthres1);
1076 writel(0x00000001, &axi_qos->qosthres2);
1077 writel(0x00000001, &axi_qos->qosqon);
1078
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1079 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1080 writel(0x00000001, &axi_qos->qosconf);
1081 writel(0x00002007, &axi_qos->qosctset0);
1082 writel(0x00000020, &axi_qos->qosreqctr);
1083 writel(0x00002006, &axi_qos->qosthres0);
1084 writel(0x00002001, &axi_qos->qosthres1);
1085 writel(0x00000001, &axi_qos->qosthres2);
1086 writel(0x00000001, &axi_qos->qosqon);
1087
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1088 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1089 writel(0x00000001, &axi_qos->qosconf);
1090 writel(0x00002007, &axi_qos->qosctset0);
1091 writel(0x00000020, &axi_qos->qosreqctr);
1092 writel(0x00002006, &axi_qos->qosthres0);
1093 writel(0x00002001, &axi_qos->qosthres1);
1094 writel(0x00000001, &axi_qos->qosthres2);
1095 writel(0x00000001, &axi_qos->qosqon);
1096
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1097 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1098 writel(0x00000001, &axi_qos->qosconf);
1099 writel(0x00002007, &axi_qos->qosctset0);
1100 writel(0x00000020, &axi_qos->qosreqctr);
1101 writel(0x00002006, &axi_qos->qosthres0);
1102 writel(0x00002001, &axi_qos->qosthres1);
1103 writel(0x00000001, &axi_qos->qosthres2);
1104 writel(0x00000001, &axi_qos->qosqon);
1105
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1106 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1107 writel(0x00000001, &axi_qos->qosconf);
1108 writel(0x00002007, &axi_qos->qosctset0);
1109 writel(0x00000020, &axi_qos->qosreqctr);
1110 writel(0x00002006, &axi_qos->qosthres0);
1111 writel(0x00002001, &axi_qos->qosthres1);
1112 writel(0x00000001, &axi_qos->qosthres2);
1113 writel(0x00000001, &axi_qos->qosqon);
1114
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1115 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1116 writel(0x00000001, &axi_qos->qosconf);
1117 writel(0x00002007, &axi_qos->qosctset0);
1118 writel(0x00000020, &axi_qos->qosreqctr);
1119 writel(0x00002006, &axi_qos->qosthres0);
1120 writel(0x00002001, &axi_qos->qosthres1);
1121 writel(0x00000001, &axi_qos->qosthres2);
1122 writel(0x00000001, &axi_qos->qosqon);
1123
Nobuhiro Iwamatsufa3e41b2014-03-27 16:18:19 +0900[diff] [blame]1124 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900[diff] [blame]1125 writel(0x00000001, &axi_qos->qosconf);
1126 writel(0x00002007, &axi_qos->qosctset0);
1127 writel(0x00000020, &axi_qos->qosreqctr);
1128 writel(0x00002006, &axi_qos->qosthres0);
1129 writel(0x00002001, &axi_qos->qosthres1);
1130 writel(0x00000001, &axi_qos->qosthres2);
1131 writel(0x00000000, &axi_qos->qosqon);
1132}
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1133
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1134#if defined(CONFIG_QOS_PRI_MEDIA)
1135#define is_qos_pri_media() 1
1136#else
1137#define is_qos_pri_media() 0
1138#endif
1139
1140#if defined(CONFIG_QOS_PRI_NORMAL)
1141#define is_qos_pri_normal() 1
1142#else
1143#define is_qos_pri_normal() 0
1144#endif
1145
1146#if defined(CONFIG_QOS_PRI_GFX)
1147#define is_qos_pri_gfx() 1
1148#else
1149#define is_qos_pri_gfx() 0
1150#endif
1151
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1152/* QoS version 0.963 for ES2 */
1153static void qos_init_es2(void)
1154{
1155 int i;
1156 struct rcar_s3c *s3c;
1157 struct rcar_s3c_qos *s3c_qos;
1158 struct rcar_dbsc3_qos *qos_addr;
1159 struct rcar_mxi *mxi;
1160 struct rcar_mxi_qos *mxi_qos;
1161 struct rcar_axi_qos *axi_qos;
1162
1163 /* DBSC DBADJ2 */
1164 writel(0x20042004, DBSC3_0_DBADJ2);
1165
1166 /* S3C -QoS */
1167 s3c = (struct rcar_s3c *)S3C_BASE;
1168 writel(0x80000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1169 if (is_qos_pri_media()) {
1170 writel(0x1F060302, &s3c->s3crorr);
1171 writel(0x07070302, &s3c->s3cworr);
1172 } else if (is_qos_pri_normal()) {
1173 writel(0x1F060504, &s3c->s3crorr);
1174 writel(0x07070503, &s3c->s3cworr);
1175 } else if (is_qos_pri_gfx()) {
1176 writel(0x1F060606, &s3c->s3crorr);
1177 writel(0x07070606, &s3c->s3cworr);
1178 }
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1179 /* QoS Control Registers */
1180 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
1181 writel(0x00890089, &s3c_qos->s3cqos0);
1182 writel(0x20960010, &s3c_qos->s3cqos1);
1183 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1184 if (is_qos_pri_media())
1185 writel(0x20AA2300, &s3c_qos->s3cqos3);
1186 else if (is_qos_pri_normal())
1187 writel(0x20AA2200, &s3c_qos->s3cqos3);
1188 else if (is_qos_pri_gfx())
1189 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1190 writel(0x00002032, &s3c_qos->s3cqos4);
1191 writel(0x20960010, &s3c_qos->s3cqos5);
1192 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1193 if (is_qos_pri_media())
1194 writel(0x20AA2300, &s3c_qos->s3cqos7);
1195 else if (is_qos_pri_normal())
1196 writel(0x20AA2200, &s3c_qos->s3cqos7);
1197 else if (is_qos_pri_gfx())
1198 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1199 writel(0x00002032, &s3c_qos->s3cqos8);
1200
1201 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
1202 writel(0x00890089, &s3c_qos->s3cqos0);
1203 writel(0x20960010, &s3c_qos->s3cqos1);
1204 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1205 if (is_qos_pri_media())
1206 writel(0x20AA2300, &s3c_qos->s3cqos3);
1207 else if (is_qos_pri_normal())
1208 writel(0x20AA2200, &s3c_qos->s3cqos3);
1209 else if (is_qos_pri_gfx())
1210 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1211 writel(0x00002032, &s3c_qos->s3cqos4);
1212 writel(0x20960010, &s3c_qos->s3cqos5);
1213 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1214 if (is_qos_pri_media())
1215 writel(0x20AA2300, &s3c_qos->s3cqos7);
1216 else if (is_qos_pri_normal())
1217 writel(0x20AA2200, &s3c_qos->s3cqos7);
1218 else if (is_qos_pri_gfx())
1219 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1220 writel(0x00002032, &s3c_qos->s3cqos8);
1221
1222 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
1223 writel(0x80928092, &s3c_qos->s3cqos0);
1224 writel(0x20960020, &s3c_qos->s3cqos1);
1225 writel(0x20302030, &s3c_qos->s3cqos2);
1226 writel(0x20AA20DC, &s3c_qos->s3cqos3);
1227 writel(0x00002032, &s3c_qos->s3cqos4);
1228 writel(0x20960020, &s3c_qos->s3cqos5);
1229 writel(0x20302030, &s3c_qos->s3cqos6);
1230 writel(0x20AA20DC, &s3c_qos->s3cqos7);
1231 writel(0x00002032, &s3c_qos->s3cqos8);
1232
1233 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1234 writel(0x00828092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1235 writel(0x20960020, &s3c_qos->s3cqos1);
1236 writel(0x20302030, &s3c_qos->s3cqos2);
1237 writel(0x20AA20FA, &s3c_qos->s3cqos3);
1238 writel(0x00002032, &s3c_qos->s3cqos4);
1239 writel(0x20960020, &s3c_qos->s3cqos5);
1240 writel(0x20302030, &s3c_qos->s3cqos6);
1241 writel(0x20AA20FA, &s3c_qos->s3cqos7);
1242 writel(0x00002032, &s3c_qos->s3cqos8);
1243
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1244 writel(0x00310808, &s3c->s3carcr11);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1245
1246 /* DBSC -QoS */
1247 /* DBSC0 - Read */
1248 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1249 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
1250 writel(0x00000002, &qos_addr->dblgcnt);
1251 writel(0x00002096, &qos_addr->dbtmval0);
1252 writel(0x00002064, &qos_addr->dbtmval1);
1253 writel(0x00002032, &qos_addr->dbtmval2);
1254 writel(0x00001FB0, &qos_addr->dbtmval3);
1255 writel(0x00000001, &qos_addr->dbrqctr);
1256 writel(0x00002078, &qos_addr->dbthres0);
1257 writel(0x0000204B, &qos_addr->dbthres1);
1258 writel(0x0000201E, &qos_addr->dbthres2);
1259 writel(0x00000001, &qos_addr->dblgqon);
1260 }
1261
1262 /* DBSC0 - Write */
1263 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1264 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
1265 writel(0x00000002, &qos_addr->dblgcnt);
1266 writel(0x00002096, &qos_addr->dbtmval0);
1267 writel(0x00002064, &qos_addr->dbtmval1);
1268 writel(0x00002050, &qos_addr->dbtmval2);
1269 writel(0x0000203A, &qos_addr->dbtmval3);
1270 writel(0x00000001, &qos_addr->dbrqctr);
1271 writel(0x00002078, &qos_addr->dbthres0);
1272 writel(0x0000204B, &qos_addr->dbthres1);
1273 writel(0x0000203C, &qos_addr->dbthres2);
1274 writel(0x00000001, &qos_addr->dblgqon);
1275 }
1276
1277 /* MXI -QoS */
1278 /* Transaction Control (MXI) */
1279 mxi = (struct rcar_mxi *)MXI_BASE;
1280 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1281 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1282 writel(0x00B800C0, &mxi->mxsaar0);
1283 writel(0x02000800, &mxi->mxsaar1);
1284
1285 /* QoS Control (MXI) */
1286 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
1287 writel(0x0000000C, &mxi_qos->vspdu0);
1288 writel(0x0000000C, &mxi_qos->vspdu1);
1289 writel(0x0000000E, &mxi_qos->du0);
1290 writel(0x0000000E, &mxi_qos->du1);
1291
1292 /* AXI -QoS */
1293 /* Transaction Control (MXI) */
1294 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
1295 writel(0x00000002, &axi_qos->qosconf);
1296 writel(0x00002245, &axi_qos->qosctset0);
1297 writel(0x00002096, &axi_qos->qosctset1);
1298 writel(0x00002030, &axi_qos->qosctset2);
1299 writel(0x00002030, &axi_qos->qosctset3);
1300 writel(0x00000001, &axi_qos->qosreqctr);
1301 writel(0x00002064, &axi_qos->qosthres0);
1302 writel(0x00002004, &axi_qos->qosthres1);
1303 writel(0x00000000, &axi_qos->qosthres2);
1304 writel(0x00000001, &axi_qos->qosqon);
1305
1306 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
1307 writel(0x00000000, &axi_qos->qosconf);
1308 writel(0x000020A6, &axi_qos->qosctset0);
1309 writel(0x00000001, &axi_qos->qosreqctr);
1310 writel(0x00002064, &axi_qos->qosthres0);
1311 writel(0x00002004, &axi_qos->qosthres1);
1312 writel(0x00000000, &axi_qos->qosthres2);
1313 writel(0x00000001, &axi_qos->qosqon);
1314
1315 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
1316 writel(0x00000000, &axi_qos->qosconf);
1317 writel(0x000020A6, &axi_qos->qosctset0);
1318 writel(0x00000001, &axi_qos->qosreqctr);
1319 writel(0x00002064, &axi_qos->qosthres0);
1320 writel(0x00002004, &axi_qos->qosthres1);
1321 writel(0x00000000, &axi_qos->qosthres2);
1322 writel(0x00000001, &axi_qos->qosqon);
1323
1324 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
1325 writel(0x00000000, &axi_qos->qosconf);
1326 writel(0x00002021, &axi_qos->qosctset0);
1327 writel(0x00000001, &axi_qos->qosreqctr);
1328 writel(0x00002064, &axi_qos->qosthres0);
1329 writel(0x00002004, &axi_qos->qosthres1);
1330 writel(0x00000000, &axi_qos->qosthres2);
1331 writel(0x00000001, &axi_qos->qosqon);
1332
1333 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
1334 writel(0x00000000, &axi_qos->qosconf);
1335 writel(0x00002037, &axi_qos->qosctset0);
1336 writel(0x00000001, &axi_qos->qosreqctr);
1337 writel(0x00002064, &axi_qos->qosthres0);
1338 writel(0x00002004, &axi_qos->qosthres1);
1339 writel(0x00000000, &axi_qos->qosthres2);
1340 writel(0x00000001, &axi_qos->qosqon);
1341
1342 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
1343 writel(0x00000002, &axi_qos->qosconf);
1344 writel(0x00002245, &axi_qos->qosctset0);
1345 writel(0x00002096, &axi_qos->qosctset1);
1346 writel(0x00002030, &axi_qos->qosctset2);
1347 writel(0x00002030, &axi_qos->qosctset3);
1348 writel(0x00000001, &axi_qos->qosreqctr);
1349 writel(0x00002064, &axi_qos->qosthres0);
1350 writel(0x00002004, &axi_qos->qosthres1);
1351 writel(0x00000000, &axi_qos->qosthres2);
1352 writel(0x00000001, &axi_qos->qosqon);
1353
1354 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
1355 writel(0x00000002, &axi_qos->qosconf);
1356 writel(0x00002245, &axi_qos->qosctset0);
1357 writel(0x00002096, &axi_qos->qosctset1);
1358 writel(0x00002030, &axi_qos->qosctset2);
1359 writel(0x00002030, &axi_qos->qosctset3);
1360 writel(0x00000001, &axi_qos->qosreqctr);
1361 writel(0x00002064, &axi_qos->qosthres0);
1362 writel(0x00002004, &axi_qos->qosthres1);
1363 writel(0x00000000, &axi_qos->qosthres2);
1364 writel(0x00000001, &axi_qos->qosqon);
1365
1366 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
1367 writel(0x00000002, &axi_qos->qosconf);
1368 writel(0x00002245, &axi_qos->qosctset0);
1369 writel(0x00002096, &axi_qos->qosctset1);
1370 writel(0x00002030, &axi_qos->qosctset2);
1371 writel(0x00002030, &axi_qos->qosctset3);
1372 writel(0x00000001, &axi_qos->qosreqctr);
1373 writel(0x00002064, &axi_qos->qosthres0);
1374 writel(0x00002004, &axi_qos->qosthres1);
1375 writel(0x00000000, &axi_qos->qosthres2);
1376 writel(0x00000001, &axi_qos->qosqon);
1377
1378 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
1379 writel(0x00000000, &axi_qos->qosconf);
1380 writel(0x0000214C, &axi_qos->qosctset0);
1381 writel(0x00000001, &axi_qos->qosreqctr);
1382 writel(0x00002064, &axi_qos->qosthres0);
1383 writel(0x00002004, &axi_qos->qosthres1);
1384 writel(0x00000000, &axi_qos->qosthres2);
1385 writel(0x00000001, &axi_qos->qosqon);
1386
1387 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
1388 writel(0x00000001, &axi_qos->qosconf);
1389 writel(0x00002004, &axi_qos->qosctset0);
1390 writel(0x00002096, &axi_qos->qosctset1);
1391 writel(0x00002030, &axi_qos->qosctset2);
1392 writel(0x00002030, &axi_qos->qosctset3);
1393 writel(0x00000001, &axi_qos->qosreqctr);
1394 writel(0x00002064, &axi_qos->qosthres0);
1395 writel(0x00002004, &axi_qos->qosthres1);
1396 writel(0x00000000, &axi_qos->qosthres2);
1397 writel(0x00000001, &axi_qos->qosqon);
1398
1399 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
1400 writel(0x00000001, &axi_qos->qosconf);
1401 writel(0x00002004, &axi_qos->qosctset0);
1402 writel(0x00002096, &axi_qos->qosctset1);
1403 writel(0x00002030, &axi_qos->qosctset2);
1404 writel(0x00002030, &axi_qos->qosctset3);
1405 writel(0x00000001, &axi_qos->qosreqctr);
1406 writel(0x00002064, &axi_qos->qosthres0);
1407 writel(0x00002004, &axi_qos->qosthres1);
1408 writel(0x00000000, &axi_qos->qosthres2);
1409 writel(0x00000001, &axi_qos->qosqon);
1410
1411 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
1412 writel(0x00000001, &axi_qos->qosconf);
1413 writel(0x00002004, &axi_qos->qosctset0);
1414 writel(0x00002096, &axi_qos->qosctset1);
1415 writel(0x00002030, &axi_qos->qosctset2);
1416 writel(0x00002030, &axi_qos->qosctset3);
1417 writel(0x00000001, &axi_qos->qosreqctr);
1418 writel(0x00002064, &axi_qos->qosthres0);
1419 writel(0x00002004, &axi_qos->qosthres1);
1420 writel(0x00000000, &axi_qos->qosthres2);
1421 writel(0x00000001, &axi_qos->qosqon);
1422
1423 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
1424 writel(0x00000001, &axi_qos->qosconf);
1425 writel(0x00002004, &axi_qos->qosctset0);
1426 writel(0x00002096, &axi_qos->qosctset1);
1427 writel(0x00002030, &axi_qos->qosctset2);
1428 writel(0x00002030, &axi_qos->qosctset3);
1429 writel(0x00000001, &axi_qos->qosreqctr);
1430 writel(0x00002064, &axi_qos->qosthres0);
1431 writel(0x00002004, &axi_qos->qosthres1);
1432 writel(0x00000000, &axi_qos->qosthres2);
1433 writel(0x00000001, &axi_qos->qosqon);
1434
1435 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
1436 writel(0x00000001, &axi_qos->qosconf);
1437 writel(0x00002004, &axi_qos->qosctset0);
1438 writel(0x00002096, &axi_qos->qosctset1);
1439 writel(0x00002030, &axi_qos->qosctset2);
1440 writel(0x00002030, &axi_qos->qosctset3);
1441 writel(0x00000001, &axi_qos->qosreqctr);
1442 writel(0x00002064, &axi_qos->qosthres0);
1443 writel(0x00002004, &axi_qos->qosthres1);
1444 writel(0x00000000, &axi_qos->qosthres2);
1445 writel(0x00000001, &axi_qos->qosqon);
1446
1447 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
1448 writel(0x00000000, &axi_qos->qosconf);
1449 writel(0x00002021, &axi_qos->qosctset0);
1450 writel(0x00000001, &axi_qos->qosreqctr);
1451 writel(0x00002064, &axi_qos->qosthres0);
1452 writel(0x00002004, &axi_qos->qosthres1);
1453 writel(0x00000000, &axi_qos->qosthres2);
1454 writel(0x00000001, &axi_qos->qosqon);
1455
1456 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
1457 writel(0x00000000, &axi_qos->qosconf);
1458 writel(0x00002021, &axi_qos->qosctset0);
1459 writel(0x00000001, &axi_qos->qosreqctr);
1460 writel(0x00002064, &axi_qos->qosthres0);
1461 writel(0x00002004, &axi_qos->qosthres1);
1462 writel(0x00000000, &axi_qos->qosthres2);
1463 writel(0x00000001, &axi_qos->qosqon);
1464
1465 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
1466 writel(0x00000000, &axi_qos->qosconf);
1467 writel(0x0000214C, &axi_qos->qosctset0);
1468 writel(0x00000001, &axi_qos->qosreqctr);
1469 writel(0x00002064, &axi_qos->qosthres0);
1470 writel(0x00002004, &axi_qos->qosthres1);
1471 writel(0x00000000, &axi_qos->qosthres2);
1472 writel(0x00000001, &axi_qos->qosqon);
1473
1474 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
1475 writel(0x00000002, &axi_qos->qosconf);
1476 writel(0x00002245, &axi_qos->qosctset0);
1477 writel(0x00002096, &axi_qos->qosctset1);
1478 writel(0x00002030, &axi_qos->qosctset2);
1479 writel(0x00002030, &axi_qos->qosctset3);
1480 writel(0x00000001, &axi_qos->qosreqctr);
1481 writel(0x00002064, &axi_qos->qosthres0);
1482 writel(0x00002004, &axi_qos->qosthres1);
1483 writel(0x00000000, &axi_qos->qosthres2);
1484 writel(0x00000001, &axi_qos->qosqon);
1485
1486 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
1487 writel(0x00000000, &axi_qos->qosconf);
1488 writel(0x000020A6, &axi_qos->qosctset0);
1489 writel(0x00000001, &axi_qos->qosreqctr);
1490 writel(0x00002064, &axi_qos->qosthres0);
1491 writel(0x00002004, &axi_qos->qosthres1);
1492 writel(0x00000000, &axi_qos->qosthres2);
1493 writel(0x00000001, &axi_qos->qosqon);
1494
1495 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
1496 writel(0x00000000, &axi_qos->qosconf);
1497 writel(0x000020A6, &axi_qos->qosctset0);
1498 writel(0x00000001, &axi_qos->qosreqctr);
1499 writel(0x00002064, &axi_qos->qosthres0);
1500 writel(0x00002004, &axi_qos->qosthres1);
1501 writel(0x00000000, &axi_qos->qosthres2);
1502 writel(0x00000001, &axi_qos->qosqon);
1503
1504 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
1505 writel(0x00000000, &axi_qos->qosconf);
1506 writel(0x00002053, &axi_qos->qosctset0);
1507 writel(0x00000001, &axi_qos->qosreqctr);
1508 writel(0x00002064, &axi_qos->qosthres0);
1509 writel(0x00002004, &axi_qos->qosthres1);
1510 writel(0x00000000, &axi_qos->qosthres2);
1511 writel(0x00000001, &axi_qos->qosqon);
1512
1513 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
1514 writel(0x00000000, &axi_qos->qosconf);
1515 writel(0x00002053, &axi_qos->qosctset0);
1516 writel(0x00000001, &axi_qos->qosreqctr);
1517 writel(0x00002064, &axi_qos->qosthres0);
1518 writel(0x00002004, &axi_qos->qosthres1);
1519 writel(0x00000000, &axi_qos->qosthres2);
1520 writel(0x00000001, &axi_qos->qosqon);
1521
1522 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
1523 writel(0x00000000, &axi_qos->qosconf);
1524 writel(0x00002053, &axi_qos->qosctset0);
1525 writel(0x00000001, &axi_qos->qosreqctr);
1526 writel(0x00002064, &axi_qos->qosthres0);
1527 writel(0x00002004, &axi_qos->qosthres1);
1528 writel(0x00000000, &axi_qos->qosthres2);
1529 writel(0x00000001, &axi_qos->qosqon);
1530
1531 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
1532 writel(0x00000000, &axi_qos->qosconf);
1533 writel(0x0000214C, &axi_qos->qosctset0);
1534 writel(0x00000001, &axi_qos->qosreqctr);
1535 writel(0x00002064, &axi_qos->qosthres0);
1536 writel(0x00002004, &axi_qos->qosthres1);
1537 writel(0x00000000, &axi_qos->qosthres2);
1538 writel(0x00000001, &axi_qos->qosqon);
1539
1540 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
1541 writel(0x00000002, &axi_qos->qosconf);
1542 writel(0x00002245, &axi_qos->qosctset0);
1543 writel(0x00000001, &axi_qos->qosreqctr);
1544 writel(0x00002064, &axi_qos->qosthres0);
1545 writel(0x00002004, &axi_qos->qosthres1);
1546 writel(0x00000000, &axi_qos->qosthres2);
1547 writel(0x00000001, &axi_qos->qosqon);
1548
1549 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
1550 writel(0x00000000, &axi_qos->qosconf);
1551 writel(0x00002029, &axi_qos->qosctset0);
1552 writel(0x00000001, &axi_qos->qosreqctr);
1553 writel(0x00002064, &axi_qos->qosthres0);
1554 writel(0x00002004, &axi_qos->qosthres1);
1555 writel(0x00000000, &axi_qos->qosthres2);
1556 writel(0x00000001, &axi_qos->qosqon);
1557
1558 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
1559 writel(0x00000002, &axi_qos->qosconf);
1560 writel(0x00002245, &axi_qos->qosctset0);
1561 writel(0x00000001, &axi_qos->qosreqctr);
1562 writel(0x00002064, &axi_qos->qosthres0);
1563 writel(0x00002004, &axi_qos->qosthres1);
1564 writel(0x00000000, &axi_qos->qosthres2);
1565 writel(0x00000001, &axi_qos->qosqon);
1566
1567 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
1568 writel(0x00000000, &axi_qos->qosconf);
1569 writel(0x00002053, &axi_qos->qosctset0);
1570 writel(0x00000001, &axi_qos->qosreqctr);
1571 writel(0x00002064, &axi_qos->qosthres0);
1572 writel(0x00002004, &axi_qos->qosthres1);
1573 writel(0x00000000, &axi_qos->qosthres2);
1574 writel(0x00000001, &axi_qos->qosqon);
1575
1576 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
1577 writel(0x00000000, &axi_qos->qosconf);
1578 writel(0x000020A6, &axi_qos->qosctset0);
1579 writel(0x00000001, &axi_qos->qosreqctr);
1580 writel(0x00002064, &axi_qos->qosthres0);
1581 writel(0x00002004, &axi_qos->qosthres1);
1582 writel(0x00000000, &axi_qos->qosthres2);
1583 writel(0x00000001, &axi_qos->qosqon);
1584
1585 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
1586 writel(0x00000000, &axi_qos->qosconf);
1587 writel(0x00002053, &axi_qos->qosctset0);
1588 writel(0x00000001, &axi_qos->qosreqctr);
1589 writel(0x00002064, &axi_qos->qosthres0);
1590 writel(0x00002004, &axi_qos->qosthres1);
1591 writel(0x00000000, &axi_qos->qosthres2);
1592 writel(0x00000001, &axi_qos->qosqon);
1593
1594 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
1595 writel(0x00000002, &axi_qos->qosconf);
1596 writel(0x00002245, &axi_qos->qosctset0);
1597 writel(0x00000001, &axi_qos->qosreqctr);
1598 writel(0x00002064, &axi_qos->qosthres0);
1599 writel(0x00002004, &axi_qos->qosthres1);
1600 writel(0x00000000, &axi_qos->qosthres2);
1601 writel(0x00000001, &axi_qos->qosqon);
1602
1603 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
1604 writel(0x00000000, &axi_qos->qosconf);
1605 writel(0x00002053, &axi_qos->qosctset0);
1606 writel(0x00000001, &axi_qos->qosreqctr);
1607 writel(0x00002064, &axi_qos->qosthres0);
1608 writel(0x00002004, &axi_qos->qosthres1);
1609 writel(0x00000000, &axi_qos->qosthres2);
1610 writel(0x00000001, &axi_qos->qosqon);
1611
1612 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
1613 writel(0x00000000, &axi_qos->qosconf);
1614 writel(0x00002053, &axi_qos->qosctset0);
1615 writel(0x00000001, &axi_qos->qosreqctr);
1616 writel(0x00002064, &axi_qos->qosthres0);
1617 writel(0x00002004, &axi_qos->qosthres1);
1618 writel(0x00000000, &axi_qos->qosthres2);
1619 writel(0x00000001, &axi_qos->qosqon);
1620
1621 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
1622 writel(0x00000000, &axi_qos->qosconf);
1623 writel(0x0000214C, &axi_qos->qosctset0);
1624 writel(0x00000001, &axi_qos->qosreqctr);
1625 writel(0x00002064, &axi_qos->qosthres0);
1626 writel(0x00002004, &axi_qos->qosthres1);
1627 writel(0x00000000, &axi_qos->qosthres2);
1628 writel(0x00000001, &axi_qos->qosqon);
1629
1630 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
1631 writel(0x00000000, &axi_qos->qosconf);
1632 writel(0x0000214C, &axi_qos->qosctset0);
1633 writel(0x00000001, &axi_qos->qosreqctr);
1634 writel(0x00002064, &axi_qos->qosthres0);
1635 writel(0x00002004, &axi_qos->qosthres1);
1636 writel(0x00000000, &axi_qos->qosthres2);
1637 writel(0x00000001, &axi_qos->qosqon);
1638
1639 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
1640 writel(0x00000000, &axi_qos->qosconf);
1641 writel(0x000020A6, &axi_qos->qosctset0);
1642 writel(0x00000001, &axi_qos->qosreqctr);
1643 writel(0x00002064, &axi_qos->qosthres0);
1644 writel(0x00002004, &axi_qos->qosthres1);
1645 writel(0x00000000, &axi_qos->qosthres2);
1646 writel(0x00000001, &axi_qos->qosqon);
1647
1648 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
1649 writel(0x00000000, &axi_qos->qosconf);
1650 writel(0x00002053, &axi_qos->qosctset0);
1651 writel(0x00000001, &axi_qos->qosreqctr);
1652 writel(0x00002064, &axi_qos->qosthres0);
1653 writel(0x00002004, &axi_qos->qosthres1);
1654 writel(0x00000000, &axi_qos->qosthres2);
1655 writel(0x00000001, &axi_qos->qosqon);
1656
1657 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
1658 writel(0x00000000, &axi_qos->qosconf);
1659 writel(0x00002053, &axi_qos->qosctset0);
1660 writel(0x00000001, &axi_qos->qosreqctr);
1661 writel(0x00002064, &axi_qos->qosthres0);
1662 writel(0x00002004, &axi_qos->qosthres1);
1663 writel(0x00000000, &axi_qos->qosthres2);
1664 writel(0x00000001, &axi_qos->qosqon);
1665
1666 /* QoS Register (RT-AXI) */
1667 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsu98e559c2015-03-05 08:30:37 +0900[diff] [blame]1668 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]1669 writel(0x00002053, &axi_qos->qosctset0);
1670 writel(0x00002096, &axi_qos->qosctset1);
1671 writel(0x00002030, &axi_qos->qosctset2);
1672 writel(0x00002030, &axi_qos->qosctset3);
1673 writel(0x00000001, &axi_qos->qosreqctr);
1674 writel(0x00002064, &axi_qos->qosthres0);
1675 writel(0x00002004, &axi_qos->qosthres1);
1676 writel(0x00000000, &axi_qos->qosthres2);
1677 writel(0x00000001, &axi_qos->qosqon);
1678
1679 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
1680 writel(0x00000000, &axi_qos->qosconf);
1681 writel(0x00002053, &axi_qos->qosctset0);
1682 writel(0x00002096, &axi_qos->qosctset1);
1683 writel(0x00002030, &axi_qos->qosctset2);
1684 writel(0x00002030, &axi_qos->qosctset3);
1685 writel(0x00000001, &axi_qos->qosreqctr);
1686 writel(0x00002064, &axi_qos->qosthres0);
1687 writel(0x00002004, &axi_qos->qosthres1);
1688 writel(0x00000000, &axi_qos->qosthres2);
1689 writel(0x00000001, &axi_qos->qosqon);
1690
1691 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
1692 writel(0x00000000, &axi_qos->qosconf);
1693 writel(0x00002299, &axi_qos->qosctset0);
1694 writel(0x00000001, &axi_qos->qosreqctr);
1695 writel(0x00002064, &axi_qos->qosthres0);
1696 writel(0x00002004, &axi_qos->qosthres1);
1697 writel(0x00000000, &axi_qos->qosthres2);
1698 writel(0x00000001, &axi_qos->qosqon);
1699
1700 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
1701 writel(0x00000000, &axi_qos->qosconf);
1702 writel(0x00002029, &axi_qos->qosctset0);
1703 writel(0x00000001, &axi_qos->qosreqctr);
1704 writel(0x00002064, &axi_qos->qosthres0);
1705 writel(0x00002004, &axi_qos->qosthres1);
1706 writel(0x00000000, &axi_qos->qosthres2);
1707 writel(0x00000001, &axi_qos->qosqon);
1708
1709 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
1710 writel(0x00000002, &axi_qos->qosconf);
1711 writel(0x00002245, &axi_qos->qosctset0);
1712 writel(0x00002096, &axi_qos->qosctset1);
1713 writel(0x00002030, &axi_qos->qosctset2);
1714 writel(0x00002030, &axi_qos->qosctset3);
1715 writel(0x00000001, &axi_qos->qosreqctr);
1716 writel(0x00002064, &axi_qos->qosthres0);
1717 writel(0x00002004, &axi_qos->qosthres1);
1718 writel(0x00000000, &axi_qos->qosthres2);
1719 writel(0x00000001, &axi_qos->qosqon);
1720
1721 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
1722 writel(0x00000000, &axi_qos->qosconf);
1723 writel(0x00002029, &axi_qos->qosctset0);
1724 writel(0x00002096, &axi_qos->qosctset1);
1725 writel(0x00002030, &axi_qos->qosctset2);
1726 writel(0x00002030, &axi_qos->qosctset3);
1727 writel(0x00000001, &axi_qos->qosreqctr);
1728 writel(0x00002064, &axi_qos->qosthres0);
1729 writel(0x00002004, &axi_qos->qosthres1);
1730 writel(0x00000000, &axi_qos->qosthres2);
1731 writel(0x00000001, &axi_qos->qosqon);
1732
1733 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
1734 writel(0x00000002, &axi_qos->qosconf);
1735 writel(0x00002245, &axi_qos->qosctset0);
1736 writel(0x00000001, &axi_qos->qosreqctr);
1737 writel(0x00002064, &axi_qos->qosthres0);
1738 writel(0x00002004, &axi_qos->qosthres1);
1739 writel(0x00000000, &axi_qos->qosthres2);
1740 writel(0x00000001, &axi_qos->qosqon);
1741
1742 /* QoS Register (MP-AXI) */
1743 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
1744 writel(0x00000000, &axi_qos->qosconf);
1745 writel(0x00002037, &axi_qos->qosctset0);
1746 writel(0x00000001, &axi_qos->qosreqctr);
1747 writel(0x00002064, &axi_qos->qosthres0);
1748 writel(0x00002004, &axi_qos->qosthres1);
1749 writel(0x00000000, &axi_qos->qosthres2);
1750 writel(0x00000001, &axi_qos->qosqon);
1751
1752 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
1753 writel(0x00000001, &axi_qos->qosconf);
1754 writel(0x00002014, &axi_qos->qosctset0);
1755 writel(0x00000040, &axi_qos->qosreqctr);
1756 writel(0x00002064, &axi_qos->qosthres0);
1757 writel(0x00002004, &axi_qos->qosthres1);
1758 writel(0x00000000, &axi_qos->qosthres2);
1759 writel(0x00000001, &axi_qos->qosqon);
1760
1761 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
1762 writel(0x00000001, &axi_qos->qosconf);
1763 writel(0x00002014, &axi_qos->qosctset0);
1764 writel(0x00000040, &axi_qos->qosreqctr);
1765 writel(0x00002064, &axi_qos->qosthres0);
1766 writel(0x00002004, &axi_qos->qosthres1);
1767 writel(0x00000000, &axi_qos->qosthres2);
1768 writel(0x00000001, &axi_qos->qosqon);
1769
1770 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
1771 writel(0x00000001, &axi_qos->qosconf);
1772 writel(0x00001FF0, &axi_qos->qosctset0);
1773 writel(0x00000020, &axi_qos->qosreqctr);
1774 writel(0x00002064, &axi_qos->qosthres0);
1775 writel(0x00002004, &axi_qos->qosthres1);
1776 writel(0x00002001, &axi_qos->qosthres2);
1777 writel(0x00000001, &axi_qos->qosqon);
1778
1779 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
1780 writel(0x00000001, &axi_qos->qosconf);
1781 writel(0x00002004, &axi_qos->qosctset0);
1782 writel(0x00002096, &axi_qos->qosctset1);
1783 writel(0x00002030, &axi_qos->qosctset2);
1784 writel(0x00002030, &axi_qos->qosctset3);
1785 writel(0x00000001, &axi_qos->qosreqctr);
1786 writel(0x00002064, &axi_qos->qosthres0);
1787 writel(0x00002004, &axi_qos->qosthres1);
1788 writel(0x00000000, &axi_qos->qosthres2);
1789 writel(0x00000001, &axi_qos->qosqon);
1790
1791 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
1792 writel(0x00000000, &axi_qos->qosconf);
1793 writel(0x00002053, &axi_qos->qosctset0);
1794 writel(0x00000001, &axi_qos->qosreqctr);
1795 writel(0x00002064, &axi_qos->qosthres0);
1796 writel(0x00002004, &axi_qos->qosthres1);
1797 writel(0x00000000, &axi_qos->qosthres2);
1798 writel(0x00000001, &axi_qos->qosqon);
1799
1800 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
1801 writel(0x00000000, &axi_qos->qosconf);
1802 writel(0x0000206E, &axi_qos->qosctset0);
1803 writel(0x00000001, &axi_qos->qosreqctr);
1804 writel(0x00002064, &axi_qos->qosthres0);
1805 writel(0x00002004, &axi_qos->qosthres1);
1806 writel(0x00000000, &axi_qos->qosthres2);
1807 writel(0x00000001, &axi_qos->qosqon);
1808
1809 /* QoS Register (SYS-AXI256) */
1810 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
1811 writel(0x00000002, &axi_qos->qosconf);
1812 writel(0x000020EB, &axi_qos->qosctset0);
1813 writel(0x00002096, &axi_qos->qosctset1);
1814 writel(0x00002030, &axi_qos->qosctset2);
1815 writel(0x00002030, &axi_qos->qosctset3);
1816 writel(0x00000001, &axi_qos->qosreqctr);
1817 writel(0x00002064, &axi_qos->qosthres0);
1818 writel(0x00002004, &axi_qos->qosthres1);
1819 writel(0x00000000, &axi_qos->qosthres2);
1820 writel(0x00000001, &axi_qos->qosqon);
1821
1822 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
1823 writel(0x00000002, &axi_qos->qosconf);
1824 writel(0x000020EB, &axi_qos->qosctset0);
1825 writel(0x00002096, &axi_qos->qosctset1);
1826 writel(0x00002030, &axi_qos->qosctset2);
1827 writel(0x00002030, &axi_qos->qosctset3);
1828 writel(0x00000001, &axi_qos->qosreqctr);
1829 writel(0x00002064, &axi_qos->qosthres0);
1830 writel(0x00002004, &axi_qos->qosthres1);
1831 writel(0x00000000, &axi_qos->qosthres2);
1832 writel(0x00000001, &axi_qos->qosqon);
1833
1834 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
1835 writel(0x00000002, &axi_qos->qosconf);
1836 writel(0x000020EB, &axi_qos->qosctset0);
1837 writel(0x00002096, &axi_qos->qosctset1);
1838 writel(0x00002030, &axi_qos->qosctset2);
1839 writel(0x00002030, &axi_qos->qosctset3);
1840 writel(0x00000001, &axi_qos->qosreqctr);
1841 writel(0x00002064, &axi_qos->qosthres0);
1842 writel(0x00002004, &axi_qos->qosthres1);
1843 writel(0x00000000, &axi_qos->qosthres2);
1844 writel(0x00000001, &axi_qos->qosqon);
1845
1846 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
1847 writel(0x00000002, &axi_qos->qosconf);
1848 writel(0x000020EB, &axi_qos->qosctset0);
1849 writel(0x00002096, &axi_qos->qosctset1);
1850 writel(0x00002030, &axi_qos->qosctset2);
1851 writel(0x00002030, &axi_qos->qosctset3);
1852 writel(0x00000001, &axi_qos->qosreqctr);
1853 writel(0x00002064, &axi_qos->qosthres0);
1854 writel(0x00002004, &axi_qos->qosthres1);
1855 writel(0x00000000, &axi_qos->qosthres2);
1856 writel(0x00000001, &axi_qos->qosqon);
1857
1858 /* QoS Register (CCI-AXI) */
1859 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
1860 writel(0x00000001, &axi_qos->qosconf);
1861 writel(0x00002004, &axi_qos->qosctset0);
1862 writel(0x00002096, &axi_qos->qosctset1);
1863 writel(0x00002030, &axi_qos->qosctset2);
1864 writel(0x00002030, &axi_qos->qosctset3);
1865 writel(0x00000001, &axi_qos->qosreqctr);
1866 writel(0x00002064, &axi_qos->qosthres0);
1867 writel(0x00002004, &axi_qos->qosthres1);
1868 writel(0x00000000, &axi_qos->qosthres2);
1869 writel(0x00000001, &axi_qos->qosqon);
1870
1871 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
1872 writel(0x00000002, &axi_qos->qosconf);
1873 writel(0x00002245, &axi_qos->qosctset0);
1874 writel(0x00002096, &axi_qos->qosctset1);
1875 writel(0x00002030, &axi_qos->qosctset2);
1876 writel(0x00002030, &axi_qos->qosctset3);
1877 writel(0x00000001, &axi_qos->qosreqctr);
1878 writel(0x00002064, &axi_qos->qosthres0);
1879 writel(0x00002004, &axi_qos->qosthres1);
1880 writel(0x00000000, &axi_qos->qosthres2);
1881 writel(0x00000001, &axi_qos->qosqon);
1882
1883 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
1884 writel(0x00000001, &axi_qos->qosconf);
1885 writel(0x00002004, &axi_qos->qosctset0);
1886 writel(0x00002096, &axi_qos->qosctset1);
1887 writel(0x00002030, &axi_qos->qosctset2);
1888 writel(0x00002030, &axi_qos->qosctset3);
1889 writel(0x00000001, &axi_qos->qosreqctr);
1890 writel(0x00002064, &axi_qos->qosthres0);
1891 writel(0x00002004, &axi_qos->qosthres1);
1892 writel(0x00000000, &axi_qos->qosthres2);
1893 writel(0x00000001, &axi_qos->qosqon);
1894
1895 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
1896 writel(0x00000001, &axi_qos->qosconf);
1897 writel(0x00002004, &axi_qos->qosctset0);
1898 writel(0x00002096, &axi_qos->qosctset1);
1899 writel(0x00002030, &axi_qos->qosctset2);
1900 writel(0x00002030, &axi_qos->qosctset3);
1901 writel(0x00000001, &axi_qos->qosreqctr);
1902 writel(0x00002064, &axi_qos->qosthres0);
1903 writel(0x00002004, &axi_qos->qosthres1);
1904 writel(0x00000000, &axi_qos->qosthres2);
1905 writel(0x00000001, &axi_qos->qosqon);
1906
1907 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
1908 writel(0x00000001, &axi_qos->qosconf);
1909 writel(0x00002004, &axi_qos->qosctset0);
1910 writel(0x00002096, &axi_qos->qosctset1);
1911 writel(0x00002030, &axi_qos->qosctset2);
1912 writel(0x00002030, &axi_qos->qosctset3);
1913 writel(0x00000001, &axi_qos->qosreqctr);
1914 writel(0x00002064, &axi_qos->qosthres0);
1915 writel(0x00002004, &axi_qos->qosthres1);
1916 writel(0x00000000, &axi_qos->qosthres2);
1917 writel(0x00000001, &axi_qos->qosqon);
1918
1919 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
1920 writel(0x00000002, &axi_qos->qosconf);
1921 writel(0x00002245, &axi_qos->qosctset0);
1922 writel(0x00002096, &axi_qos->qosctset1);
1923 writel(0x00002030, &axi_qos->qosctset2);
1924 writel(0x00002030, &axi_qos->qosctset3);
1925 writel(0x00000001, &axi_qos->qosreqctr);
1926 writel(0x00002064, &axi_qos->qosthres0);
1927 writel(0x00002004, &axi_qos->qosthres1);
1928 writel(0x00000000, &axi_qos->qosthres2);
1929 writel(0x00000001, &axi_qos->qosqon);
1930
1931 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
1932 writel(0x00000001, &axi_qos->qosconf);
1933 writel(0x00002004, &axi_qos->qosctset0);
1934 writel(0x00002096, &axi_qos->qosctset1);
1935 writel(0x00002030, &axi_qos->qosctset2);
1936 writel(0x00002030, &axi_qos->qosctset3);
1937 writel(0x00000001, &axi_qos->qosreqctr);
1938 writel(0x00002064, &axi_qos->qosthres0);
1939 writel(0x00002004, &axi_qos->qosthres1);
1940 writel(0x00000000, &axi_qos->qosthres2);
1941 writel(0x00000001, &axi_qos->qosqon);
1942
1943 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
1944 writel(0x00000001, &axi_qos->qosconf);
1945 writel(0x00002004, &axi_qos->qosctset0);
1946 writel(0x00002096, &axi_qos->qosctset1);
1947 writel(0x00002030, &axi_qos->qosctset2);
1948 writel(0x00002030, &axi_qos->qosctset3);
1949 writel(0x00000001, &axi_qos->qosreqctr);
1950 writel(0x00002064, &axi_qos->qosthres0);
1951 writel(0x00002004, &axi_qos->qosthres1);
1952 writel(0x00000000, &axi_qos->qosthres2);
1953 writel(0x00000001, &axi_qos->qosqon);
1954
1955 /* QoS Register (Media-AXI) */
1956 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
1957 writel(0x00000002, &axi_qos->qosconf);
1958 writel(0x000020dc, &axi_qos->qosctset0);
1959 writel(0x00002096, &axi_qos->qosctset1);
1960 writel(0x00002030, &axi_qos->qosctset2);
1961 writel(0x00002030, &axi_qos->qosctset3);
1962 writel(0x00000020, &axi_qos->qosreqctr);
1963 writel(0x000020AA, &axi_qos->qosthres0);
1964 writel(0x00002032, &axi_qos->qosthres1);
1965 writel(0x00000001, &axi_qos->qosthres2);
1966
1967 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
1968 writel(0x00000002, &axi_qos->qosconf);
1969 writel(0x000020dc, &axi_qos->qosctset0);
1970 writel(0x00002096, &axi_qos->qosctset1);
1971 writel(0x00002030, &axi_qos->qosctset2);
1972 writel(0x00002030, &axi_qos->qosctset3);
1973 writel(0x00000020, &axi_qos->qosreqctr);
1974 writel(0x000020AA, &axi_qos->qosthres0);
1975 writel(0x00002032, &axi_qos->qosthres1);
1976 writel(0x00000001, &axi_qos->qosthres2);
1977
1978 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
1979 writel(0x00000001, &axi_qos->qosconf);
1980 writel(0x00002190, &axi_qos->qosctset0);
1981 writel(0x00000020, &axi_qos->qosreqctr);
1982 writel(0x00002064, &axi_qos->qosthres0);
1983 writel(0x00002004, &axi_qos->qosthres1);
1984 writel(0x00000001, &axi_qos->qosthres2);
1985 writel(0x00000001, &axi_qos->qosqon);
1986
1987 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
1988 writel(0x00000001, &axi_qos->qosconf);
1989 writel(0x00002190, &axi_qos->qosctset0);
1990 writel(0x00000020, &axi_qos->qosreqctr);
1991 writel(0x00002004, &axi_qos->qosthres0);
1992 writel(0x00000001, &axi_qos->qosthres1);
1993 writel(0x00000001, &axi_qos->qosthres2);
1994 writel(0x00000001, &axi_qos->qosqon);
1995
1996 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
1997 writel(0x00000001, &axi_qos->qosconf);
1998 writel(0x00002190, &axi_qos->qosctset0);
1999 writel(0x00000020, &axi_qos->qosreqctr);
2000 writel(0x00002064, &axi_qos->qosthres0);
2001 writel(0x00002004, &axi_qos->qosthres1);
2002 writel(0x00000001, &axi_qos->qosthres2);
2003 writel(0x00000001, &axi_qos->qosqon);
2004
2005 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
2006 writel(0x00000001, &axi_qos->qosconf);
2007 writel(0x00002190, &axi_qos->qosctset0);
2008 writel(0x00000020, &axi_qos->qosreqctr);
2009 writel(0x00002004, &axi_qos->qosthres0);
2010 writel(0x00000001, &axi_qos->qosthres1);
2011 writel(0x00000001, &axi_qos->qosthres2);
2012 writel(0x00000001, &axi_qos->qosqon);
2013
2014 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
2015 writel(0x00000001, &axi_qos->qosconf);
2016 writel(0x00002190, &axi_qos->qosctset0);
2017 writel(0x00000020, &axi_qos->qosreqctr);
2018 writel(0x00002064, &axi_qos->qosthres0);
2019 writel(0x00002004, &axi_qos->qosthres1);
2020 writel(0x00000001, &axi_qos->qosthres2);
2021 writel(0x00000001, &axi_qos->qosqon);
2022
2023 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
2024 writel(0x00000001, &axi_qos->qosconf);
2025 writel(0x00002190, &axi_qos->qosctset0);
2026 writel(0x00000020, &axi_qos->qosreqctr);
2027 writel(0x00002004, &axi_qos->qosthres0);
2028 writel(0x00000001, &axi_qos->qosthres1);
2029 writel(0x00000001, &axi_qos->qosthres2);
2030 writel(0x00000001, &axi_qos->qosqon);
2031
2032 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
2033 writel(0x00000001, &axi_qos->qosconf);
2034 writel(0x00002190, &axi_qos->qosctset0);
2035 writel(0x00000020, &axi_qos->qosreqctr);
2036 writel(0x00002064, &axi_qos->qosthres0);
2037 writel(0x00002004, &axi_qos->qosthres1);
2038 writel(0x00000001, &axi_qos->qosthres2);
2039 writel(0x00000001, &axi_qos->qosqon);
2040
2041 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
2042 writel(0x00000001, &axi_qos->qosconf);
2043 writel(0x00002190, &axi_qos->qosctset0);
2044 writel(0x00000020, &axi_qos->qosreqctr);
2045 writel(0x00002004, &axi_qos->qosthres0);
2046 writel(0x00000001, &axi_qos->qosthres1);
2047 writel(0x00000001, &axi_qos->qosthres2);
2048 writel(0x00000001, &axi_qos->qosqon);
2049
2050 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
2051 writel(0x00000001, &axi_qos->qosconf);
2052 writel(0x00002190, &axi_qos->qosctset0);
2053 writel(0x00000020, &axi_qos->qosreqctr);
2054 writel(0x00002064, &axi_qos->qosthres0);
2055 writel(0x00002004, &axi_qos->qosthres1);
2056 writel(0x00000001, &axi_qos->qosthres2);
2057 writel(0x00000001, &axi_qos->qosqon);
2058
2059 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
2060 writel(0x00000001, &axi_qos->qosconf);
2061 writel(0x00002190, &axi_qos->qosctset0);
2062 writel(0x00000020, &axi_qos->qosreqctr);
2063 writel(0x00002004, &axi_qos->qosthres0);
2064 writel(0x00000001, &axi_qos->qosthres1);
2065 writel(0x00000001, &axi_qos->qosthres2);
2066 writel(0x00000001, &axi_qos->qosqon);
2067
2068 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
2069 writel(0x00000001, &axi_qos->qosconf);
2070 writel(0x00002190, &axi_qos->qosctset0);
2071 writel(0x00000020, &axi_qos->qosreqctr);
2072 writel(0x00002064, &axi_qos->qosthres0);
2073 writel(0x00002004, &axi_qos->qosthres1);
2074 writel(0x00000001, &axi_qos->qosthres2);
2075 writel(0x00000001, &axi_qos->qosqon);
2076
2077 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
2078 writel(0x00000001, &axi_qos->qosconf);
2079 writel(0x00002190, &axi_qos->qosctset0);
2080 writel(0x00000020, &axi_qos->qosreqctr);
2081 writel(0x00002004, &axi_qos->qosthres0);
2082 writel(0x00000001, &axi_qos->qosthres1);
2083 writel(0x00000001, &axi_qos->qosthres2);
2084 writel(0x00000001, &axi_qos->qosqon);
2085
2086 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
2087 writel(0x00000001, &axi_qos->qosconf);
2088 writel(0x00002190, &axi_qos->qosctset0);
2089 writel(0x00000020, &axi_qos->qosreqctr);
2090 writel(0x00002064, &axi_qos->qosthres0);
2091 writel(0x00002004, &axi_qos->qosthres1);
2092 writel(0x00000001, &axi_qos->qosthres2);
2093 writel(0x00000001, &axi_qos->qosqon);
2094
2095 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
2096 writel(0x00000001, &axi_qos->qosconf);
2097 writel(0x00002190, &axi_qos->qosctset0);
2098 writel(0x00000020, &axi_qos->qosreqctr);
2099 writel(0x00002004, &axi_qos->qosthres0);
2100 writel(0x00000001, &axi_qos->qosthres1);
2101 writel(0x00000001, &axi_qos->qosthres2);
2102 writel(0x00000001, &axi_qos->qosqon);
2103
2104 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
2105 writel(0x00000001, &axi_qos->qosconf);
2106 writel(0x00002190, &axi_qos->qosctset0);
2107 writel(0x00000020, &axi_qos->qosreqctr);
2108 writel(0x00002064, &axi_qos->qosthres0);
2109 writel(0x00002004, &axi_qos->qosthres1);
2110 writel(0x00000001, &axi_qos->qosthres2);
2111 writel(0x00000001, &axi_qos->qosqon);
2112
2113 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
2114 writel(0x00000001, &axi_qos->qosconf);
2115 writel(0x00002190, &axi_qos->qosctset0);
2116 writel(0x00000020, &axi_qos->qosreqctr);
2117 writel(0x00002004, &axi_qos->qosthres0);
2118 writel(0x00000001, &axi_qos->qosthres1);
2119 writel(0x00000001, &axi_qos->qosthres2);
2120 writel(0x00000001, &axi_qos->qosqon);
2121
2122 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
2123 writel(0x00000001, &axi_qos->qosconf);
2124 writel(0x00001FF0, &axi_qos->qosctset0);
2125 writel(0x00000020, &axi_qos->qosreqctr);
2126 writel(0x00002064, &axi_qos->qosthres0);
2127 writel(0x00002004, &axi_qos->qosthres1);
2128 writel(0x00002001, &axi_qos->qosthres2);
2129 writel(0x00000001, &axi_qos->qosqon);
2130
2131 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
2132 writel(0x00000001, &axi_qos->qosconf);
2133 writel(0x000020C8, &axi_qos->qosctset0);
2134 writel(0x00000020, &axi_qos->qosreqctr);
2135 writel(0x00002064, &axi_qos->qosthres0);
2136 writel(0x00002004, &axi_qos->qosthres1);
2137 writel(0x00000001, &axi_qos->qosthres2);
2138 writel(0x00000001, &axi_qos->qosqon);
2139
2140 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
2141 writel(0x00000001, &axi_qos->qosconf);
2142 writel(0x000020C8, &axi_qos->qosctset0);
2143 writel(0x00000020, &axi_qos->qosreqctr);
2144 writel(0x00002004, &axi_qos->qosthres0);
2145 writel(0x00000001, &axi_qos->qosthres1);
2146 writel(0x00000001, &axi_qos->qosthres2);
2147 writel(0x00000001, &axi_qos->qosqon);
2148
2149 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
2150 writel(0x00000001, &axi_qos->qosconf);
2151 writel(0x000020C8, &axi_qos->qosctset0);
2152 writel(0x00000020, &axi_qos->qosreqctr);
2153 writel(0x00002064, &axi_qos->qosthres0);
2154 writel(0x00002004, &axi_qos->qosthres1);
2155 writel(0x00000001, &axi_qos->qosthres2);
2156 writel(0x00000001, &axi_qos->qosqon);
2157
2158 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
2159 writel(0x00000001, &axi_qos->qosconf);
2160 writel(0x000020C8, &axi_qos->qosctset0);
2161 writel(0x00000020, &axi_qos->qosreqctr);
2162 writel(0x00002004, &axi_qos->qosthres0);
2163 writel(0x00000001, &axi_qos->qosthres1);
2164 writel(0x00000001, &axi_qos->qosthres2);
2165 writel(0x00000001, &axi_qos->qosqon);
2166
2167 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
2168 writel(0x00000001, &axi_qos->qosconf);
2169 writel(0x000020C8, &axi_qos->qosctset0);
2170 writel(0x00000020, &axi_qos->qosreqctr);
2171 writel(0x00002064, &axi_qos->qosthres0);
2172 writel(0x00002004, &axi_qos->qosthres1);
2173 writel(0x00000001, &axi_qos->qosthres2);
2174 writel(0x00000001, &axi_qos->qosqon);
2175
2176 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
2177 writel(0x00000001, &axi_qos->qosconf);
2178 writel(0x000020C8, &axi_qos->qosctset0);
2179 writel(0x00000020, &axi_qos->qosreqctr);
2180 writel(0x00002064, &axi_qos->qosthres0);
2181 writel(0x00002004, &axi_qos->qosthres1);
2182 writel(0x00000001, &axi_qos->qosthres2);
2183 writel(0x00000001, &axi_qos->qosqon);
2184
2185 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
2186 writel(0x00000001, &axi_qos->qosconf);
2187 writel(0x000020C8, &axi_qos->qosctset0);
2188 writel(0x00000020, &axi_qos->qosreqctr);
2189 writel(0x00002064, &axi_qos->qosthres0);
2190 writel(0x00002004, &axi_qos->qosthres1);
2191 writel(0x00000001, &axi_qos->qosthres2);
2192 writel(0x00000001, &axi_qos->qosqon);
2193
2194 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
2195 writel(0x00000001, &axi_qos->qosconf);
2196 writel(0x000020C8, &axi_qos->qosctset0);
2197 writel(0x00000020, &axi_qos->qosreqctr);
2198 writel(0x00002004, &axi_qos->qosthres0);
2199 writel(0x00000001, &axi_qos->qosthres1);
2200 writel(0x00000001, &axi_qos->qosthres2);
2201 writel(0x00000001, &axi_qos->qosqon);
2202
2203 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
2204 writel(0x00000001, &axi_qos->qosconf);
2205 writel(0x000020C8, &axi_qos->qosctset0);
2206 writel(0x00000020, &axi_qos->qosreqctr);
2207 writel(0x00002064, &axi_qos->qosthres0);
2208 writel(0x00002004, &axi_qos->qosthres1);
2209 writel(0x00000001, &axi_qos->qosthres2);
2210 writel(0x00000001, &axi_qos->qosqon);
2211
2212 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
2213 writel(0x00000001, &axi_qos->qosconf);
2214 writel(0x000020C8, &axi_qos->qosctset0);
2215 writel(0x00000020, &axi_qos->qosreqctr);
2216 writel(0x00002004, &axi_qos->qosthres0);
2217 writel(0x00000001, &axi_qos->qosthres1);
2218 writel(0x00000001, &axi_qos->qosthres2);
2219 writel(0x00000001, &axi_qos->qosqon);
2220
2221 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
2222 writel(0x00000001, &axi_qos->qosconf);
2223 writel(0x000020C8, &axi_qos->qosctset0);
2224 writel(0x00000020, &axi_qos->qosreqctr);
2225 writel(0x00002064, &axi_qos->qosthres0);
2226 writel(0x00002004, &axi_qos->qosthres1);
2227 writel(0x00000001, &axi_qos->qosthres2);
2228 writel(0x00000001, &axi_qos->qosqon);
2229
2230 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
2231 writel(0x00000001, &axi_qos->qosconf);
2232 writel(0x000020C8, &axi_qos->qosctset0);
2233 writel(0x00000020, &axi_qos->qosreqctr);
2234 writel(0x00002004, &axi_qos->qosthres0);
2235 writel(0x00000001, &axi_qos->qosthres1);
2236 writel(0x00000001, &axi_qos->qosthres2);
2237 writel(0x00000001, &axi_qos->qosqon);
2238
2239 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
2240 writel(0x00000001, &axi_qos->qosconf);
2241 writel(0x000020C8, &axi_qos->qosctset0);
2242 writel(0x00000020, &axi_qos->qosreqctr);
2243 writel(0x00002064, &axi_qos->qosthres0);
2244 writel(0x00002004, &axi_qos->qosthres1);
2245 writel(0x00000001, &axi_qos->qosthres2);
2246 writel(0x00000001, &axi_qos->qosqon);
2247
2248 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
2249 writel(0x00000001, &axi_qos->qosconf);
2250 writel(0x000020C8, &axi_qos->qosctset0);
2251 writel(0x00000020, &axi_qos->qosreqctr);
2252 writel(0x00002004, &axi_qos->qosthres0);
2253 writel(0x00000001, &axi_qos->qosthres1);
2254 writel(0x00000001, &axi_qos->qosthres2);
2255 writel(0x00000001, &axi_qos->qosqon);
2256
2257 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
2258 writel(0x00000003, &axi_qos->qosconf);
2259 writel(0x000020C8, &axi_qos->qosctset0);
2260 writel(0x00000001, &axi_qos->qosreqctr);
2261 writel(0x00002064, &axi_qos->qosthres0);
2262 writel(0x00002004, &axi_qos->qosthres1);
2263 writel(0x00000001, &axi_qos->qosthres2);
2264 writel(0x00000001, &axi_qos->qosqon);
2265
2266 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
2267 writel(0x00000003, &axi_qos->qosconf);
2268 writel(0x000020C8, &axi_qos->qosctset0);
2269 writel(0x00000001, &axi_qos->qosreqctr);
2270 writel(0x00000001, &axi_qos->qosthres0);
2271 writel(0x00000001, &axi_qos->qosthres1);
2272 writel(0x00000001, &axi_qos->qosthres2);
2273 writel(0x00000001, &axi_qos->qosqon);
2274
2275 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
2276 writel(0x00000003, &axi_qos->qosconf);
2277 writel(0x000020C8, &axi_qos->qosctset0);
2278 writel(0x00000001, &axi_qos->qosreqctr);
2279 writel(0x00002064, &axi_qos->qosthres0);
2280 writel(0x00002004, &axi_qos->qosthres1);
2281 writel(0x00000001, &axi_qos->qosthres2);
2282 writel(0x00000001, &axi_qos->qosqon);
2283
2284 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
2285 writel(0x00000003, &axi_qos->qosconf);
2286 writel(0x000020C8, &axi_qos->qosctset0);
2287 writel(0x00000001, &axi_qos->qosreqctr);
2288 writel(0x00000001, &axi_qos->qosthres0);
2289 writel(0x00000001, &axi_qos->qosthres1);
2290 writel(0x00000001, &axi_qos->qosthres2);
2291 writel(0x00000001, &axi_qos->qosqon);
2292
2293 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
2294 writel(0x00000003, &axi_qos->qosconf);
2295 writel(0x00002063, &axi_qos->qosctset0);
2296 writel(0x00000001, &axi_qos->qosreqctr);
2297 writel(0x00002064, &axi_qos->qosthres0);
2298 writel(0x00002004, &axi_qos->qosthres1);
2299 writel(0x00000001, &axi_qos->qosthres2);
2300 writel(0x00000001, &axi_qos->qosqon);
2301
2302 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
2303 writel(0x00000003, &axi_qos->qosconf);
2304 writel(0x00002063, &axi_qos->qosctset0);
2305 writel(0x00000001, &axi_qos->qosreqctr);
2306 writel(0x00000001, &axi_qos->qosthres0);
2307 writel(0x00000001, &axi_qos->qosthres1);
2308 writel(0x00000001, &axi_qos->qosthres2);
2309 writel(0x00000001, &axi_qos->qosqon);
2310
2311 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
2312 writel(0x00000003, &axi_qos->qosconf);
2313 writel(0x00002063, &axi_qos->qosctset0);
2314 writel(0x00000001, &axi_qos->qosreqctr);
2315 writel(0x00002064, &axi_qos->qosthres0);
2316 writel(0x00002004, &axi_qos->qosthres1);
2317 writel(0x00000001, &axi_qos->qosthres2);
2318 writel(0x00000001, &axi_qos->qosqon);
2319
2320 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
2321 writel(0x00000003, &axi_qos->qosconf);
2322 writel(0x00002063, &axi_qos->qosctset0);
2323 writel(0x00000001, &axi_qos->qosreqctr);
2324 writel(0x00000001, &axi_qos->qosthres0);
2325 writel(0x00000001, &axi_qos->qosthres1);
2326 writel(0x00000001, &axi_qos->qosthres2);
2327 writel(0x00000001, &axi_qos->qosqon);
2328
2329 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
2330 writel(0x00000001, &axi_qos->qosconf);
2331 writel(0x00002073, &axi_qos->qosctset0);
2332 writel(0x00000020, &axi_qos->qosreqctr);
2333 writel(0x00002064, &axi_qos->qosthres0);
2334 writel(0x00002004, &axi_qos->qosthres1);
2335 writel(0x00000001, &axi_qos->qosthres2);
2336 writel(0x00000001, &axi_qos->qosqon);
2337
2338 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
2339 writel(0x00000001, &axi_qos->qosconf);
2340 writel(0x00002073, &axi_qos->qosctset0);
2341 writel(0x00000020, &axi_qos->qosreqctr);
2342 writel(0x00002004, &axi_qos->qosthres0);
2343 writel(0x00000001, &axi_qos->qosthres1);
2344 writel(0x00000001, &axi_qos->qosthres2);
2345 writel(0x00000001, &axi_qos->qosqon);
2346
2347 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
2348 writel(0x00000001, &axi_qos->qosconf);
2349 writel(0x00002073, &axi_qos->qosctset0);
2350 writel(0x00000020, &axi_qos->qosreqctr);
2351 writel(0x00002064, &axi_qos->qosthres0);
2352 writel(0x00002004, &axi_qos->qosthres1);
2353 writel(0x00000001, &axi_qos->qosthres2);
2354 writel(0x00000001, &axi_qos->qosqon);
2355
2356 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
2357 writel(0x00000001, &axi_qos->qosconf);
2358 writel(0x00002073, &axi_qos->qosctset0);
2359 writel(0x00000020, &axi_qos->qosreqctr);
2360 writel(0x00002004, &axi_qos->qosthres0);
2361 writel(0x00000001, &axi_qos->qosthres1);
2362 writel(0x00000001, &axi_qos->qosthres2);
2363 writel(0x00000001, &axi_qos->qosqon);
2364
2365 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
2366 writel(0x00000001, &axi_qos->qosconf);
2367 writel(0x00002073, &axi_qos->qosctset0);
2368 writel(0x00000020, &axi_qos->qosreqctr);
2369 writel(0x00002064, &axi_qos->qosthres0);
2370 writel(0x00002004, &axi_qos->qosthres1);
2371 writel(0x00000001, &axi_qos->qosthres2);
2372 writel(0x00000001, &axi_qos->qosqon);
2373
2374 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
2375 writel(0x00000001, &axi_qos->qosconf);
2376 writel(0x00002073, &axi_qos->qosctset0);
2377 writel(0x00000020, &axi_qos->qosreqctr);
2378 writel(0x00002064, &axi_qos->qosthres0);
2379 writel(0x00002004, &axi_qos->qosthres1);
2380 writel(0x00000001, &axi_qos->qosthres2);
2381 writel(0x00000001, &axi_qos->qosqon);
2382
2383 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
2384 writel(0x00000001, &axi_qos->qosconf);
2385 writel(0x00002073, &axi_qos->qosctset0);
2386 writel(0x00000020, &axi_qos->qosreqctr);
2387 writel(0x00002004, &axi_qos->qosthres0);
2388 writel(0x00000001, &axi_qos->qosthres1);
2389 writel(0x00000001, &axi_qos->qosthres2);
2390 writel(0x00000001, &axi_qos->qosqon);
2391
2392 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
2393 writel(0x00000001, &axi_qos->qosconf);
2394 writel(0x00002073, &axi_qos->qosctset0);
2395 writel(0x00000020, &axi_qos->qosreqctr);
2396 writel(0x00002064, &axi_qos->qosthres0);
2397 writel(0x00002004, &axi_qos->qosthres1);
2398 writel(0x00000001, &axi_qos->qosthres2);
2399 writel(0x00000001, &axi_qos->qosqon);
2400
2401 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
2402 writel(0x00000001, &axi_qos->qosconf);
2403 writel(0x00002073, &axi_qos->qosctset0);
2404 writel(0x00000020, &axi_qos->qosreqctr);
2405 writel(0x00002004, &axi_qos->qosthres0);
2406 writel(0x00000001, &axi_qos->qosthres1);
2407 writel(0x00000001, &axi_qos->qosthres2);
2408 writel(0x00000001, &axi_qos->qosqon);
2409
2410 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
2411 writel(0x00000001, &axi_qos->qosconf);
2412 writel(0x00002073, &axi_qos->qosctset0);
2413 writel(0x00000020, &axi_qos->qosreqctr);
2414 writel(0x00002064, &axi_qos->qosthres0);
2415 writel(0x00002004, &axi_qos->qosthres1);
2416 writel(0x00000001, &axi_qos->qosthres2);
2417 writel(0x00000001, &axi_qos->qosqon);
2418}
2419
2420void qos_init(void)
2421{
Marek Vasut17602322024-02-27 17:05:46 +0100[diff] [blame]2422 if (renesas_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
Nobuhiro Iwamatsu9a1efb02014-07-29 12:14:05 +0900[diff] [blame]2423 qos_init_es2();
2424 else
2425 qos_init_es1();
2426}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]2427#else /* CONFIG_RENESAS_EXTRAM_BOOT */
Nobuhiro Iwamatsu2af4b002014-10-31 16:16:26 +0900[diff] [blame]2428void qos_init(void)
2429{
2430}
Marek Vasutd26aa8c2024-02-27 17:05:53 +0100[diff] [blame]2431#endif /* CONFIG_RENESAS_EXTRAM_BOOT */