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Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +01001/*
2 * linux/mii.h: definitions for MII-compatible transceivers
3 * Originally drivers/net/sunhme.h.
4 *
5 * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
6 */
7
8#ifndef __LINUX_MII_H__
9#define __LINUX_MII_H__
10
11/* Generic MII registers. */
12
Wolfgang Denk11623932010-12-17 10:14:09 +010013#define MII_BMCR 0x00 /* Basic mode control register */
14#define MII_BMSR 0x01 /* Basic mode status register */
15#define MII_PHYSID1 0x02 /* PHYS ID 1 */
16#define MII_PHYSID2 0x03 /* PHYS ID 2 */
17#define MII_ADVERTISE 0x04 /* Advertisement control reg */
18#define MII_LPA 0x05 /* Link partner ability reg */
19#define MII_EXPANSION 0x06 /* Expansion register */
20#define MII_CTRL1000 0x09 /* 1000BASE-T control */
21#define MII_STAT1000 0x0a /* 1000BASE-T status */
Macpaul Linfa19f052010-12-03 13:52:34 +080022#define MII_ESTATUS 0x0f /* Extended Status */
Wolfgang Denk11623932010-12-17 10:14:09 +010023#define MII_DCOUNTER 0x12 /* Disconnect counter */
24#define MII_FCSCOUNTER 0x13 /* False carrier counter */
25#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
26#define MII_RERRCOUNTER 0x15 /* Receive error counter */
27#define MII_SREVISION 0x16 /* Silicon revision */
28#define MII_RESV1 0x17 /* Reserved... */
29#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
30#define MII_PHYADDR 0x19 /* PHY address */
31#define MII_RESV2 0x1a /* Reserved... */
32#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
33#define MII_NCONFIG 0x1c /* Network interface config */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +010034
35/* Basic mode control register. */
Wolfgang Denk11623932010-12-17 10:14:09 +010036#define BMCR_RESV 0x003f /* Unused... */
37#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
38#define BMCR_CTST 0x0080 /* Collision test */
39#define BMCR_FULLDPLX 0x0100 /* Full duplex */
40#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
41#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
42#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
43#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
44#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
45#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
46#define BMCR_RESET 0x8000 /* Reset the DP83840 */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +010047
48/* Basic mode status register. */
Wolfgang Denk11623932010-12-17 10:14:09 +010049#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
50#define BMSR_JCD 0x0002 /* Jabber detected */
51#define BMSR_LSTATUS 0x0004 /* Link status */
52#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
53#define BMSR_RFAULT 0x0010 /* Remote fault detected */
54#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
55#define BMSR_RESV 0x00c0 /* Unused... */
Macpaul Linfa19f052010-12-03 13:52:34 +080056#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
Wolfgang Denk11623932010-12-17 10:14:09 +010057#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
58#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
59#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
60#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
61#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
62#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
63#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +010064
65/* Advertisement control register. */
Wolfgang Denk11623932010-12-17 10:14:09 +010066#define ADVERTISE_SLCT 0x001f /* Selector bits */
67#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
68#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
69#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
70#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
71#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
72#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
73#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
74#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
75#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
76#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
77#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
78#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
79#define ADVERTISE_RESV 0x1000 /* Unused... */
80#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
81#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
82#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +010083
84#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
85 ADVERTISE_CSMA)
86#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
Wolfgang Denk11623932010-12-17 10:14:09 +010087 ADVERTISE_100HALF | ADVERTISE_100FULL)
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +010088
89/* Link partner ability register. */
Wolfgang Denk11623932010-12-17 10:14:09 +010090#define LPA_SLCT 0x001f /* Same as advertise selector */
91#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
92#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
93#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
94#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
95#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
96#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
97#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
98#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
99#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
100#define LPA_PAUSE_CAP 0x0400 /* Can pause */
101#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
102#define LPA_RESV 0x1000 /* Unused... */
103#define LPA_RFAULT 0x2000 /* Link partner faulted */
104#define LPA_LPACK 0x4000 /* Link partner acked us */
105#define LPA_NPAGE 0x8000 /* Next page bit */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100106
107#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
108#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
109
110/* Expansion register for auto-negotiation. */
Wolfgang Denk11623932010-12-17 10:14:09 +0100111#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
112#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
113#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
114#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
115#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
116#define EXPANSION_RESV 0xffe0 /* Unused... */
Macpaul Linfa19f052010-12-03 13:52:34 +0800117
Charles Coldwell23329412013-02-21 08:25:52 -0500118#define ESTATUS_1000_XFULL 0x8000 /* Can do 1000BX Full */
119#define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */
Macpaul Linfa19f052010-12-03 13:52:34 +0800120#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
121#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100122
123/* N-way test register. */
Wolfgang Denk11623932010-12-17 10:14:09 +0100124#define NWAYTEST_RESV1 0x00ff /* Unused... */
125#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
126#define NWAYTEST_RESV2 0xfe00 /* Unused... */
Macpaul Linfa19f052010-12-03 13:52:34 +0800127
128/* 1000BASE-T Control register */
Wolfgang Denk11623932010-12-17 10:14:09 +0100129#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
130#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100131
Macpaul Linfa19f052010-12-03 13:52:34 +0800132/* 1000BASE-T Status register */
Wolfgang Denk11623932010-12-17 10:14:09 +0100133#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
134#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
135#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
136#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
Macpaul Linfa19f052010-12-03 13:52:34 +0800137
138/* Flow control flags */
139#define FLOW_CTRL_TX 0x01
140#define FLOW_CTRL_RX 0x02
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100141
142/**
143 * mii_nway_result
144 * @negotiated: value of MII ANAR and'd with ANLPAR
145 *
146 * Given a set of MII abilities, check each bit and returns the
147 * currently supported media, in the priority order defined by
148 * IEEE 802.3u. We use LPA_xxx constants but note this is not the
149 * value of LPA solely, as described above.
150 *
151 * The one exception to IEEE 802.3u is that 100baseT4 is placed
152 * between 100T-full and 100T-half. If your phy does not support
Macpaul Linfa19f052010-12-03 13:52:34 +0800153 * 100T4 this is fine. If your phy places 100T4 elsewhere in the
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100154 * priority order, you will need to roll your own function.
155 */
156static inline unsigned int mii_nway_result (unsigned int negotiated)
157{
158 unsigned int ret;
159
160 if (negotiated & LPA_100FULL)
161 ret = LPA_100FULL;
162 else if (negotiated & LPA_100BASE4)
163 ret = LPA_100BASE4;
164 else if (negotiated & LPA_100HALF)
165 ret = LPA_100HALF;
166 else if (negotiated & LPA_10FULL)
167 ret = LPA_10FULL;
168 else
169 ret = LPA_10HALF;
170
171 return ret;
172}
173
174/**
175 * mii_duplex
176 * @duplex_lock: Non-zero if duplex is locked at full
177 * @negotiated: value of MII ANAR and'd with ANLPAR
178 *
179 * A small helper function for a common case. Returns one
180 * if the media is operating or locked at full duplex, and
181 * returns zero otherwise.
182 */
183static inline unsigned int mii_duplex (unsigned int duplex_lock,
184 unsigned int negotiated)
185{
186 if (duplex_lock)
187 return 1;
188 if (mii_nway_result(negotiated) & LPA_DUPLEX)
189 return 1;
190 return 0;
191}
192
Yuiko Oshinoa14e8082017-08-11 12:44:57 -0400193/**
194 * mii_resolve_flowctrl_fdx
195 * @lcladv: value of MII ADVERTISE register
196 * @rmtadv: value of MII LPA register
197 *
198 * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
199 */
200static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
201{
202 u8 cap = 0;
203
204 if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
205 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
206 } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
207 if (lcladv & ADVERTISE_PAUSE_CAP)
208 cap = FLOW_CTRL_RX;
209 else if (rmtadv & ADVERTISE_PAUSE_CAP)
210 cap = FLOW_CTRL_TX;
211 }
212
213 return cap;
214}
215
Haavard Skinnemoen48b8bb12006-12-17 15:46:02 +0100216#endif /* __LINUX_MII_H__ */