| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x00200000 |
| 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 6 | CONFIG_SYS_MALLOC_F_LEN=0x4000 |
| 7 | CONFIG_ROCKCHIP_RK3399=y |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 8 | CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 |
| Tom Rini | 929ea65 | 2019-01-07 17:46:19 -0500 | [diff] [blame] | 9 | CONFIG_TARGET_ROCK960_RK3399=y |
| Tom Rini | c9285bf | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 10 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 11 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
| 12 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 13 | CONFIG_DEBUG_UART=y |
| 14 | CONFIG_FIT=y |
| 15 | CONFIG_SPL_LOAD_FIT=y |
| 16 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" |
| 17 | # CONFIG_DISPLAY_CPUINFO is not set |
| 18 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| Simon Goldschmidt | cc4078c | 2018-09-30 14:31:53 +0200 | [diff] [blame^] | 19 | CONFIG_SPL_TEXT_BASE=0xff8c2000 |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 20 | CONFIG_SPL_STACK_R=y |
| 21 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 |
| 22 | CONFIG_SPL_ATF=y |
| 23 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y |
| 24 | CONFIG_CMD_BOOTZ=y |
| 25 | CONFIG_CMD_GPT=y |
| 26 | CONFIG_CMD_MMC=y |
| 27 | CONFIG_CMD_SF=y |
| 28 | CONFIG_CMD_USB=y |
| 29 | # CONFIG_CMD_SETEXPR is not set |
| 30 | CONFIG_CMD_TIME=y |
| 31 | CONFIG_SPL_OF_CONTROL=y |
| Tom Rini | 929ea65 | 2019-01-07 17:46:19 -0500 | [diff] [blame] | 32 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 33 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 34 | CONFIG_ENV_IS_IN_MMC=y |
| 35 | CONFIG_NET_RANDOM_ETHADDR=y |
| 36 | CONFIG_REGMAP=y |
| 37 | CONFIG_SPL_REGMAP=y |
| 38 | CONFIG_SYSCON=y |
| 39 | CONFIG_SPL_SYSCON=y |
| 40 | CONFIG_CLK=y |
| 41 | CONFIG_SPL_CLK=y |
| 42 | CONFIG_ROCKCHIP_GPIO=y |
| 43 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 44 | CONFIG_MMC_DW=y |
| 45 | CONFIG_MMC_DW_ROCKCHIP=y |
| 46 | CONFIG_MMC_SDHCI=y |
| 47 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
| Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 48 | CONFIG_SF_DEFAULT_SPEED=20000000 |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 49 | CONFIG_DM_ETH=y |
| 50 | CONFIG_ETH_DESIGNWARE=y |
| 51 | CONFIG_RGMII=y |
| 52 | CONFIG_GMAC_ROCKCHIP=y |
| 53 | CONFIG_PINCTRL=y |
| 54 | CONFIG_SPL_PINCTRL=y |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 55 | CONFIG_DM_PMIC=y |
| 56 | CONFIG_PMIC_RK8XX=y |
| 57 | CONFIG_REGULATOR_PWM=y |
| 58 | CONFIG_DM_REGULATOR_FIXED=y |
| 59 | CONFIG_DM_REGULATOR_GPIO=y |
| 60 | CONFIG_REGULATOR_RK8XX=y |
| 61 | CONFIG_PWM_ROCKCHIP=y |
| 62 | CONFIG_RAM=y |
| 63 | CONFIG_SPL_RAM=y |
| 64 | CONFIG_BAUDRATE=1500000 |
| 65 | CONFIG_DEBUG_UART_SHIFT=2 |
| 66 | CONFIG_SYSRESET=y |
| 67 | CONFIG_USB=y |
| 68 | CONFIG_USB_EHCI_HCD=y |
| 69 | CONFIG_USB_EHCI_GENERIC=y |
| Manivannan Sadhasivam | 88a0f50 | 2018-09-28 00:33:01 +0530 | [diff] [blame] | 70 | CONFIG_USE_TINY_PRINTF=y |
| 71 | CONFIG_ERRNO_STR=y |