blob: 16237bd5249febf0a74ac021efdc7bc431ac94fd [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8#include <common.h>
9#include <mpc824x.h>
10#include <pci.h>
Ben Warrenf2c1acb2008-08-31 10:03:22 -070011#include <netdev.h>
wdenkc6097192002-11-03 00:24:07 +000012
13int checkboard (void)
14{
15 /*TODO: Check processor type */
16
17 puts ( "Board: Sandpoint "
18#ifdef CONFIG_MPC8240
19 "8240"
20#endif
21#ifdef CONFIG_MPC8245
22 "8245"
23#endif
24 " Unity ##Test not implemented yet##\n");
25 return 0;
26}
27
Wolfgang Denka1be4762008-05-20 16:00:29 +020028#if 0 /* NOT USED */
wdenkc6097192002-11-03 00:24:07 +000029int checkflash (void)
30{
31 /* TODO: XXX XXX XXX */
32 printf ("## Test not implemented yet ##\n");
33
34 return (0);
35}
36#endif
37
Becky Brucebd99ae72008-06-09 16:03:40 -050038phys_size_t initdram (int board_type)
wdenkc6097192002-11-03 00:24:07 +000039{
wdenk87249ba2004-01-06 22:38:14 +000040 long size;
41 long new_bank0_end;
42 long mear1;
43 long emear1;
wdenkc6097192002-11-03 00:24:07 +000044
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045 size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
wdenkc6097192002-11-03 00:24:07 +000046
wdenk87249ba2004-01-06 22:38:14 +000047 new_bank0_end = size - 1;
48 mear1 = mpc824x_mpc107_getreg(MEAR1);
49 emear1 = mpc824x_mpc107_getreg(EMEAR1);
50 mear1 = (mear1 & 0xFFFFFF00) |
51 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
52 emear1 = (emear1 & 0xFFFFFF00) |
53 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
54 mpc824x_mpc107_setreg(MEAR1, mear1);
55 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkc6097192002-11-03 00:24:07 +000056
wdenk87249ba2004-01-06 22:38:14 +000057 return (size);
wdenkc6097192002-11-03 00:24:07 +000058}
59
60/*
61 * Initialize PCI Devices, report devices found.
62 */
63#ifndef CONFIG_PCI_PNP
64static struct pci_config_table pci_sandpoint_config_table[] = {
65 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
66 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
67 PCI_ENET0_MEMADDR,
68 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
69 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
70 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
71 PCI_ENET1_MEMADDR,
72 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
73 { }
74};
75#endif
76
77struct pci_controller hose = {
78#ifndef CONFIG_PCI_PNP
79 config_table: pci_sandpoint_config_table,
80#endif
81};
82
stroesef5dd4102003-02-14 11:21:23 +000083void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +000084{
85 pci_mpc824x_init(&hose);
86}
Ben Warrenf2c1acb2008-08-31 10:03:22 -070087
88int board_eth_init(bd_t *bis)
89{
90 return pci_eth_init(bis);
91}