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Marek Vasut00d51662021-12-31 00:58:08 +01001// SPDX-License-Identifier: GPL-2.0+
Ludwig Zenz72352722019-07-02 14:49:47 +02002/*
Marek Vasut00d51662021-12-31 00:58:08 +01003 * Copyright (C) 2015-2021 DH electronics GmbH
Ludwig Zenz72352722019-07-02 14:49:47 +02004 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
5 */
6
Marek Vasut00d51662021-12-31 00:58:08 +01007#include <dt-bindings/gpio/gpio.h>
Marcel Ziswiler5d4bcee2022-07-21 15:27:26 +02008#include <dt-bindings/input/input.h>
Marek Vasut00d51662021-12-31 00:58:08 +01009#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pwm/pwm.h>
Ludwig Zenz72352722019-07-02 14:49:47 +020011
12/ {
13 chosen {
Marek Vasut00d51662021-12-31 00:58:08 +010014 stdout-path = "serial0:115200n8";
Ludwig Zenz72352722019-07-02 14:49:47 +020015 };
16
17 clk_ext_audio_codec: clock-codec {
Ludwig Zenz72352722019-07-02 14:49:47 +020018 #clock-cells = <0>;
19 clock-frequency = <24000000>;
Marek Vasut00d51662021-12-31 00:58:08 +010020 compatible = "fixed-clock";
21 };
22
23 display_bl: display-bl {
24 brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
25 compatible = "pwm-backlight";
26 default-brightness-level = <8>;
27 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
28 pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
29 status = "okay";
30 };
31
32 lcd_display: disp0 {
33 #address-cells = <1>;
34 #size-cells = <0>;
35 compatible = "fsl,imx-parallel-display";
36 interface-pix-fmt = "rgb24";
37 pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
38 pinctrl-names = "default";
39 status = "okay";
40
41 port@0 {
42 reg = <0>;
43
44 lcd_display_in: endpoint {
45 remote-endpoint = <&ipu1_di0_disp0>;
46 };
47 };
48
49 port@1 {
50 reg = <1>;
51
52 lcd_display_out: endpoint {
53 remote-endpoint = <&lcd_panel_in>;
54 };
55 };
56 };
57
58 gpio-keys {
59 #size-cells = <0>;
60 compatible = "gpio-keys";
61
62 button-0 {
63 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
64 label = "TA1-GPIO-A";
65 linux,code = <KEY_A>;
66 pinctrl-0 = <&pinctrl_dhcom_a>;
67 pinctrl-names = "default";
68 wakeup-source;
69 };
70
71 button-1 {
72 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
73 label = "TA2-GPIO-B";
74 linux,code = <KEY_B>;
75 pinctrl-0 = <&pinctrl_dhcom_b>;
76 pinctrl-names = "default";
77 wakeup-source;
78 };
79
80 button-2 {
81 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
82 label = "TA3-GPIO-C";
83 linux,code = <KEY_C>;
84 pinctrl-0 = <&pinctrl_dhcom_c>;
85 pinctrl-names = "default";
86 wakeup-source;
87 };
88
89 button-3 {
90 gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
91 label = "TA4-GPIO-D";
92 linux,code = <KEY_D>;
93 pinctrl-0 = <&pinctrl_dhcom_d>;
94 pinctrl-names = "default";
95 wakeup-source;
96 };
97 };
98
99 led {
100 compatible = "gpio-leds";
101
102 /*
103 * Disable led-5, because GPIO E is
104 * already used as touch interrupt.
105 */
106 led-5 {
107 color = <LED_COLOR_ID_GREEN>;
108 default-state = "off";
109 function = LED_FUNCTION_INDICATOR;
110 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
111 pinctrl-0 = <&pinctrl_dhcom_e>;
112 pinctrl-names = "default";
113 status = "disabled";
114 };
115
116 led-6 {
117 color = <LED_COLOR_ID_GREEN>;
118 default-state = "off";
119 function = LED_FUNCTION_INDICATOR;
120 gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
121 pinctrl-0 = <&pinctrl_dhcom_f>;
122 pinctrl-names = "default";
123 };
124
125 led-7 {
126 color = <LED_COLOR_ID_GREEN>;
127 default-state = "off";
128 function = LED_FUNCTION_INDICATOR;
129 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
130 pinctrl-0 = <&pinctrl_dhcom_h>;
131 pinctrl-names = "default";
132 };
133
134 led-8 {
135 color = <LED_COLOR_ID_GREEN>;
136 default-state = "off";
137 function = LED_FUNCTION_INDICATOR;
138 gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
139 pinctrl-0 = <&pinctrl_dhcom_i>;
140 pinctrl-names = "default";
141 };
142 };
143
144 panel {
145 backlight = <&display_bl>;
146 compatible = "edt,etm0700g0edh6";
147
148 port {
149 lcd_panel_in: endpoint {
150 remote-endpoint = <&lcd_display_out>;
151 };
152 };
Ludwig Zenz72352722019-07-02 14:49:47 +0200153 };
154
155 sound {
Ludwig Zenz72352722019-07-02 14:49:47 +0200156 audio-codec = <&sgtl5000>;
157 audio-routing =
158 "MIC_IN", "Mic Jack",
159 "Mic Jack", "Mic Bias",
160 "LINE_IN", "Line In Jack",
161 "Headphone Jack", "HP_OUT";
Marek Vasut00d51662021-12-31 00:58:08 +0100162 compatible = "fsl,imx-audio-sgtl5000";
163 model = "imx-sgtl5000";
Ludwig Zenz72352722019-07-02 14:49:47 +0200164 mux-ext-port = <3>;
Marek Vasut00d51662021-12-31 00:58:08 +0100165 mux-int-port = <1>;
166 ssi-controller = <&ssi1>;
Ludwig Zenz72352722019-07-02 14:49:47 +0200167 };
168};
169
170&audmux {
Ludwig Zenz72352722019-07-02 14:49:47 +0200171 pinctrl-0 = <&pinctrl_audmux_ext>;
Marek Vasut00d51662021-12-31 00:58:08 +0100172 pinctrl-names = "default";
173 status = "okay";
174};
175
176&can1 {
Ludwig Zenz72352722019-07-02 14:49:47 +0200177 status = "okay";
178};
179
Marek Vasut00d51662021-12-31 00:58:08 +0100180&can2 {
181 status = "disabled";
182};
183
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100184/* 1G ethernet */
185/delete-node/ &ethphy0;
186&fec {
187 phy-mode = "rgmii";
188 phy-handle = <&ethphy7>;
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100189 pinctrl-0 = <&pinctrl_enet_1G>;
Marek Vasut00d51662021-12-31 00:58:08 +0100190 pinctrl-names = "default";
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100191 status = "okay";
192
193 mdio {
194 #address-cells = <1>;
195 #size-cells = <0>;
196
197 ethphy7: ethernet-phy@7 { /* KSZ 9021 */
198 compatible = "ethernet-phy-ieee802.3-c22";
199 interrupt-parent = <&gpio1>;
200 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
201 pinctrl-0 = <&pinctrl_ethphy7>;
202 pinctrl-names = "default";
203 reg = <7>;
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100204 reset-assert-us = <1000>;
205 reset-deassert-us = <1000>;
Marek Vasut00d51662021-12-31 00:58:08 +0100206 reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100207 rxc-skew-ps = <3000>;
208 rxd0-skew-ps = <0>;
209 rxd1-skew-ps = <0>;
210 rxd2-skew-ps = <0>;
211 rxd3-skew-ps = <0>;
Marek Vasut00d51662021-12-31 00:58:08 +0100212 rxdv-skew-ps = <0>;
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100213 txc-skew-ps = <3000>;
214 txd0-skew-ps = <0>;
215 txd1-skew-ps = <0>;
216 txd2-skew-ps = <0>;
217 txd3-skew-ps = <0>;
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100218 txen-skew-ps = <0>;
219 };
220 };
221};
222
Ludwig Zenz72352722019-07-02 14:49:47 +0200223&hdmi {
224 ddc-i2c-bus = <&i2c2>;
225 status = "okay";
226};
227
228&i2c2 {
229 sgtl5000: codec@a {
Ludwig Zenz72352722019-07-02 14:49:47 +0200230 #sound-dai-cells = <0>;
231 clocks = <&clk_ext_audio_codec>;
Marek Vasut00d51662021-12-31 00:58:08 +0100232 compatible = "fsl,sgtl5000";
233 reg = <0x0a>;
Ludwig Zenz72352722019-07-02 14:49:47 +0200234 VDDA-supply = <&reg_3p3v>;
Marek Vasut00d51662021-12-31 00:58:08 +0100235 VDDIO-supply = <&sw2_reg>;
236 };
237
238 touchscreen@38 {
239 compatible = "edt,edt-ft5406";
240 interrupt-parent = <&gpio4>;
241 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
242 pinctrl-0 = <&pinctrl_dhcom_e>;
243 pinctrl-names = "default";
244 reg = <0x38>;
Ludwig Zenz72352722019-07-02 14:49:47 +0200245 };
246};
247
Marek Vasut00d51662021-12-31 00:58:08 +0100248&ipu1_di0_disp0 {
249 remote-endpoint = <&lcd_display_in>;
250};
Ludwig Zenz72352722019-07-02 14:49:47 +0200251
Marek Vasut00d51662021-12-31 00:58:08 +0100252&pcie {
253 pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
254 reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
255 status = "okay";
256};
257
258&pwm1 {
259 status = "okay";
260};
261
262&ssi1 {
263 status = "okay";
264};
265
Marcel Ziswiler5d4bcee2022-07-21 15:27:26 +0200266&usbh1 {
267 disable-over-current;
268};
269
Marek Vasut00d51662021-12-31 00:58:08 +0100270&usdhc2 { /* SD card */
271 status = "okay";
272};
273
274&iomuxc {
275 pinctrl-0 = <
276 /*
277 * The following DHCOM GPIOs are used on this board.
278 * Therefore, they have been removed from the list below.
279 * A: key TA1
280 * B: key TA2
281 * C: key TA3
282 * D: key TA4
283 * E: touchscreen
284 * F: led6
285 * G: backlight enable
286 * H: led7
287 * I: led8
288 * J: PCIe reset
289 */
290 &pinctrl_hog_base
291 &pinctrl_dhcom_k &pinctrl_dhcom_l
292 &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
293 &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
294 &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
295 &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
Ludwig Zenz72352722019-07-02 14:49:47 +0200296 >;
Marek Vasut00d51662021-12-31 00:58:08 +0100297 pinctrl-names = "default";
Ludwig Zenz72352722019-07-02 14:49:47 +0200298
299 pinctrl_audmux_ext: audmux-ext-grp {
300 fsl,pins = <
Ludwig Zenz72352722019-07-02 14:49:47 +0200301 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
302 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
303 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
Marek Vasut00d51662021-12-31 00:58:08 +0100304 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
Ludwig Zenz72352722019-07-02 14:49:47 +0200305 >;
306 };
307
308 pinctrl_enet_1G: enet-1G-grp {
309 fsl,pins = <
Ludwig Zenz72352722019-07-02 14:49:47 +0200310 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
Marek Vasut00d51662021-12-31 00:58:08 +0100311 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
Ludwig Zenz72352722019-07-02 14:49:47 +0200312 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
Ludwig Zenz72352722019-07-02 14:49:47 +0200313 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
314 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
315 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
316 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
317 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
Marek Vasut00d51662021-12-31 00:58:08 +0100318 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
319 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
320 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
321 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
322 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
323 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
324 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100325 >;
326 };
327
328 pinctrl_ethphy7: ethphy7-grp {
329 fsl,pins = <
Marek Vasut00d51662021-12-31 00:58:08 +0100330 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */
Christoph Niedermaier62b46de2021-11-28 03:53:18 +0100331 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */
332 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */
Ludwig Zenz72352722019-07-02 14:49:47 +0200333 >;
334 };
335
Marek Vasut00d51662021-12-31 00:58:08 +0100336 pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
Ludwig Zenz72352722019-07-02 14:49:47 +0200337 fsl,pins = <
Marek Vasut00d51662021-12-31 00:58:08 +0100338 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
339 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
340 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
341 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
342 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
343 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
344 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
345 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
346 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
347 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
348 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
349 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
350 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
351 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
352 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
353 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
354 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
355 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
356 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
357 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
358 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
359 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
360 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
361 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
362 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
363 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
364 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
365 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
Ludwig Zenz72352722019-07-02 14:49:47 +0200366 >;
367 };
368};