Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / cbfa139b8bbddb215a266de1550f06811e230e38 / . / configs / ls1012ardb_tfa_defconfig
blob: 4224b48f9d8c1784874bd5a11d775f347664cd97 [file] [log] [blame]
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=25000000
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]3CONFIG_TARGET_LS1012ARDB=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]4CONFIG_TFABOOT=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x82000000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x500000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=2
Ashish Kumar17f36a22020-04-29 17:42:03 +0530[diff] [blame]8CONFIG_ENV_SIZE=0x2000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_OFFSET=0x500000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]13CONFIG_QSPI_AHB_INIT=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]14CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
15CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
16CONFIG_AHCI=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]17CONFIG_SYS_MEMTEST_START=0x80000000
18CONFIG_SYS_MEMTEST_END=0x9fffffff
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]19CONFIG_DISTRO_DEFAULTS=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]20# CONFIG_SYS_MALLOC_F is not set
21CONFIG_FIT_VERBOSE=y
22CONFIG_OF_BOARD_SETUP=y
23CONFIG_OF_STDOUT_VIA_ALIAS=y
24CONFIG_BOOTDELAY=10
25CONFIG_USE_BOOTARGS=y
26CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
27# CONFIG_DISPLAY_BOARDINFO is not set
28CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]29CONFIG_SYS_MAXARGS=64
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame^]30CONFIG_SYS_PBSIZE=532
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]31CONFIG_CMD_GREPENV=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]32CONFIG_CMD_MEMINFO=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]33CONFIG_CMD_MEMTEST=y
Biwen Li7dea8c32021-02-05 19:02:05 +0800[diff] [blame]34CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]35CONFIG_CMD_GPT=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]36CONFIG_CMD_I2C=y
37CONFIG_CMD_MMC=y
38CONFIG_CMD_PCI=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]39CONFIG_CMD_USB=y
40# CONFIG_CMD_SETEXPR is not set
41CONFIG_CMD_CACHE=y
42CONFIG_OF_CONTROL=y
Kuldeep Singh248a2932020-07-30 15:38:07 +0530[diff] [blame]43CONFIG_ENV_OVERWRITE=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]44CONFIG_ENV_IS_IN_SPI_FLASH=y
Kuldeep Singh5b189712019-12-12 14:46:04 +0530[diff] [blame]45CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]46CONFIG_NET_RANDOM_ETHADDR=y
47CONFIG_DM=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]48CONFIG_SATA=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]49CONFIG_SATA_CEVA=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]50CONFIG_MPC8XXX_GPIO=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]51CONFIG_DM_I2C=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]52CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]53CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]54CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]55CONFIG_DM_SPI_FLASH=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]56# CONFIG_SPI_FLASH_BAR is not set
Kuldeep Singh78f28822020-05-12 14:31:07 +0530[diff] [blame]57CONFIG_SPI_FLASH_SPANSION=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]58# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
59CONFIG_FSL_PFE=y
60CONFIG_DM_ETH=y
61CONFIG_E1000=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]62CONFIG_NVME_PCI=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]63CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]64CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]65CONFIG_DM_RTC=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]66CONFIG_DM_SCSI=y
67CONFIG_SYS_NS16550=y
68CONFIG_SPI=y
69CONFIG_DM_SPI=y
70CONFIG_FSL_DSPI=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]71CONFIG_FSL_QSPI=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]72CONFIG_USB=y
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000[diff] [blame]73CONFIG_USB_XHCI_HCD=y
74CONFIG_USB_XHCI_DWC3=y