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git01.mediatek.com / filogic / uboot / cbfa139b8bbddb215a266de1550f06811e230e38 / . / configs / display5_defconfig
blob: 0c47e83b77fde6c1dc5b735f2f018138696cb312 [file] [log] [blame]
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_MX6=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x17800000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x1000000
5CONFIG_SYS_MALLOC_F_LEN=0x1000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=1
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SIZE=0x10000
11CONFIG_ENV_OFFSET=0x120000
12CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinia0916d32020-08-18 07:43:50 -0400[diff] [blame]13CONFIG_MX6Q=y
Lukasz Majewski7ec76ca2018-05-11 16:51:13 +0200[diff] [blame]14CONFIG_MX6_DDRCAL=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]15CONFIG_TARGET_DISPLAY5=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]16CONFIG_SYS_I2C_MXC_I2C1=y
17CONFIG_SYS_I2C_MXC_I2C2=y
18CONFIG_SYS_I2C_MXC_I2C3=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]19CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]20CONFIG_SPL_TEXT_BASE=0x00908000
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]21CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]22CONFIG_SPL_SERIAL=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]23CONFIG_BOOTCOUNT_BOOTLIMIT=3
24CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
Lukasz Majewski48a05522019-06-09 22:54:41 +0200[diff] [blame]25CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]26CONFIG_SPL=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]27CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]28CONFIG_ENV_OFFSET_REDUND=0x130000
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]29CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]30CONFIG_SPL_SPI=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]31CONFIG_FIT=y
32CONFIG_SPL_LOAD_FIT=y
Simon Glass5d144112020-07-19 13:56:10 -0600[diff] [blame]33# CONFIG_USE_SPL_FIT_GENERATOR is not set
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]34CONFIG_SUPPORT_RAW_INITRD=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]35CONFIG_OF_BOARD_SETUP=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]36CONFIG_USE_BOOTCOMMAND=y
37CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi"
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]38CONFIG_MISC_INIT_R=y
Lukasz Majewski967b5a12018-05-02 16:10:56 +0200[diff] [blame]39CONFIG_SPL_BOOTCOUNT_LIMIT=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]40# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
Vignesh Raghavendra3d2ba9c2019-11-15 17:00:41 +0530[diff] [blame]41CONFIG_SPL_DMA=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]42CONFIG_SPL_ENV_SUPPORT=y
43CONFIG_SPL_SAVEENV=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]44CONFIG_SPL_I2C=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]45CONFIG_SPL_OS_BOOT=y
Alexandru Gagniuc99426c82021-12-30 10:39:59 -0600[diff] [blame]46CONFIG_SPL_FALCON_BOOT_MMCSD=y
47CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]48CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]49CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]50CONFIG_HUSH_PARSER=y
51CONFIG_SYS_PROMPT="display5 > "
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]52CONFIG_SYS_MAXARGS=32
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame^]53CONFIG_SYS_PBSIZE=2076
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]54CONFIG_CMD_BOOTZ=y
55# CONFIG_CMD_ELF is not set
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]56CONFIG_CMD_SPL=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]57CONFIG_CMD_ASKENV=y
58CONFIG_CRC32_VERIFY=y
59CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]60CONFIG_SYS_I2C_EEPROM_BUS=2
61CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
62CONFIG_SYS_EEPROM_SIZE=32768
63CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]64CONFIG_CMD_GPIO=y
Lukasz Majewskicf3bff52018-05-11 16:51:17 +0200[diff] [blame]65CONFIG_CMD_GPT=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]66CONFIG_CMD_I2C=y
67CONFIG_CMD_MMC=y
68CONFIG_CMD_PART=y
Lukasz Majewski3ce5e572019-09-03 16:38:38 +0200[diff] [blame]69# CONFIG_CMD_PINMUX is not set
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]70CONFIG_CMD_SPI=y
Lukasz Majewski170d0f92019-09-03 16:38:45 +0200[diff] [blame]71CONFIG_CMD_WDT=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]72CONFIG_CMD_DHCP=y
73CONFIG_CMD_MII=y
74CONFIG_CMD_PING=y
75CONFIG_CMD_CACHE=y
76CONFIG_CMD_TIME=y
Lukasz Majewskid7243b32019-09-03 16:38:40 +0200[diff] [blame]77CONFIG_CMD_PMIC=y
78CONFIG_CMD_REGULATOR=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]79CONFIG_CMD_EXT2=y
80CONFIG_CMD_EXT4=y
81CONFIG_CMD_FAT=y
82CONFIG_CMD_FS_GENERIC=y
83CONFIG_CMD_MTDPARTS=y
84CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1"
Lukasz Majewskia3d18cd2020-05-13 17:45:15 +0200[diff] [blame]85CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),6m(swu-kernel),20m(swu-initramfs),3840k(reserved),1m(factory)"
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]86# CONFIG_SPL_EFI_PARTITION is not set
87CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]88CONFIG_ENV_OVERWRITE=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]89CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]90CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]91CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]92CONFIG_BOUNCE_BUFFER=y
Lukasz Majewski967b5a12018-05-02 16:10:56 +0200[diff] [blame]93CONFIG_BOOTCOUNT_LIMIT=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]94CONFIG_SPL_SYS_I2C_LEGACY=y
Lukasz Majewski046d8ae2019-09-03 16:38:39 +0200[diff] [blame]95CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
96CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2
97CONFIG_SYS_I2C_MXC=y
Lukasz Majewski046d8ae2019-09-03 16:38:39 +0200[diff] [blame]98CONFIG_MISC=y
99CONFIG_I2C_EEPROM=y
100CONFIG_SYS_I2C_EEPROM_ADDR=0x50
Alex Kiernan00848772019-05-01 07:58:27 +0000[diff] [blame]101CONFIG_SUPPORT_EMMC_BOOT=y
Adam Ford01836582019-08-14 07:23:43 -0500[diff] [blame]102CONFIG_FSL_USDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]103CONFIG_MTD=y
Lukasz Majewski75056052019-09-03 16:38:43 +0200[diff] [blame]104CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]105CONFIG_SF_DEFAULT_BUS=1
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]106CONFIG_SF_DEFAULT_SPEED=50000000
Lukasz Majewski75056052019-09-03 16:38:43 +0200[diff] [blame]107CONFIG_SPI_FLASH_SFDP_SUPPORT=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]108CONFIG_SPI_FLASH_SPANSION=y
109CONFIG_SPI_FLASH_STMICRO=y
Lukasz Majewski75056052019-09-03 16:38:43 +0200[diff] [blame]110CONFIG_SPI_FLASH_MTD=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]111CONFIG_PHYLIB=y
112CONFIG_PHY_MARVELL=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]113CONFIG_FEC_MXC=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]114CONFIG_MII=y
Lukasz Majewski3ce5e572019-09-03 16:38:38 +0200[diff] [blame]115CONFIG_PINCTRL=y
116CONFIG_PINCTRL_IMX6=y
Lukasz Majewskid7243b32019-09-03 16:38:40 +0200[diff] [blame]117CONFIG_DM_PMIC=y
118CONFIG_DM_PMIC_PFUZE100=y
119CONFIG_DM_REGULATOR=y
120CONFIG_DM_REGULATOR_PFUZE100=y
Lukasz Majewskice86bf92017-10-31 17:58:05 +0100[diff] [blame]121CONFIG_MXC_UART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]122CONFIG_SPI=y
Tuomas Tynkkynend3958792018-02-07 02:42:19 +0200[diff] [blame]123CONFIG_MXC_SPI=y
Lukasz Majewski170d0f92019-09-03 16:38:45 +0200[diff] [blame]124CONFIG_SYSRESET=y
125CONFIG_SYSRESET_WATCHDOG=y
Lukasz Majewski046d8ae2019-09-03 16:38:39 +0200[diff] [blame]126CONFIG_I2C_EDID=y
Tom Riniecdb78e2019-11-07 14:25:00 -0500[diff] [blame]127CONFIG_WATCHDOG_TIMEOUT_MSECS=15000
Xiaoliang Yang4161dc22018-10-18 17:14:19 +0800[diff] [blame]128CONFIG_IMX_WATCHDOG=y