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Scott Wood865b8ae2007-04-16 14:54:15 -05001Freescale MPC8313ERDB Board
2-----------------------------------------
3
41. Board Switches and Jumpers
5
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02006 S3 is used to set CONFIG_SYS_RESET_SOURCE.
Scott Wood865b8ae2007-04-16 14:54:15 -05007
8 To boot the image at 0xFE000000 in NOR flash, use these DIP
Dave Liu217b9902008-04-15 13:12:23 +08009 switch settings for S3 S4:
Scott Wood865b8ae2007-04-16 14:54:15 -050010
11 +------+ +------+
12 | | | **** |
13 | **** | | |
14 +------+ ON +------+ ON
15 4321 4321
16 (where the '*' indicates the position of the tab of the switch.)
17
Scott Woodd97bc812008-10-27 15:57:08 -050018 To boot the image at the beginning of NAND flash, use these
19 DIP switch settings for S3 S4:
20
21 +------+ +------+
22 | * | | *** |
23 | *** | | * |
24 +------+ ON +------+ ON
25 4321 4321
26 (where the '*' indicates the position of the tab of the switch.)
27
28 When booting from NAND, use u-boot-nand.bin, not u-boot.bin.
29
Scott Wood865b8ae2007-04-16 14:54:15 -0500302. Memory Map
31 The memory map looks like this:
32
33 0x0000_0000 0x07ff_ffff DDR 128M
34 0x8000_0000 0x8fff_ffff PCI MEM 256M
35 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
36 0xe000_0000 0xe00f_ffff IMMR 1M
Wolfgang Denka1be4762008-05-20 16:00:29 +020037 0xe200_0000 0xe20f_ffff PCI IO 16M
Scott Wood865b8ae2007-04-16 14:54:15 -050038 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
39 0xf000_0000 0xf001_ffff VSC7385 (CS2) 128K
40 0xfa00_0000 0xfa00_7fff Board Status/ 32K
41 LED Control (CS3)
42 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
43
Scott Woodd97bc812008-10-27 15:57:08 -050044 When booting from NAND, NAND flash is CS0 and NOR flash
45 is CS1.
46
Scott Wood865b8ae2007-04-16 14:54:15 -0500473. Definitions
48
493.1 Explanation of NEW definitions in:
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51 include/configs/MPC8313ERDB.h
52
53 CONFIG_MPC83xx MPC83xx family
54 CONFIG_MPC831x MPC831x specific
55 CONFIG_MPC8313ERDB MPC8313ERDB board specific
56
574. Compilation
58
59 Assuming you're using BASH (or similar) as your shell:
60
61 export CROSS_COMPILE=your-cross-compiler-prefix-
62 make distclean
Scott Woodd97bc812008-10-27 15:57:08 -050063 make MPC8313ERDB_XXX_config
64 (where XXX is:
65 33 - 33 MHz oscillator, boot from NOR flash
66 66 - 66 MHz oscillator, boot from NOR flash
67 NAND_33 - 33 MHz oscillator, boot from NAND flash
68 NAND_66 - 66 MHz oscillator, boot from NAND flash)
Scott Wood865b8ae2007-04-16 14:54:15 -050069 make
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715. Downloading and Flashing Images
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735.1 Reflash U-boot Image using U-boot
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Scott Woodd97bc812008-10-27 15:57:08 -050075 NOR flash:
76
Scott Wood865b8ae2007-04-16 14:54:15 -050077 =>run tftpflash
78
79 You may want to try
80 =>tftpboot $loadaddr $uboot
81 first, to make sure that the TFTP load will succeed before it
82 goes ahead and wipes out your current firmware. And of course,
83 have an alternate means of programming the flash available
84 if the new u-boot doesn't boot.
85
Scott Woodd97bc812008-10-27 15:57:08 -050086 NAND flash:
87
88 =>tftpboot $loadaddr <filename>
89 =>nand erase 0 0x80000
90 =>nand write $loadaddr 0 0x80000
91
92 ...where 0x80000 is the filesize rounded up to
93 the next 0x20000 increment.
94
Scott Wood865b8ae2007-04-16 14:54:15 -0500955.2 Downloading and Booting Linux Kernel
96
97 Ensure that all networking-related environment variables are set
98 properly (including ipaddr, serverip, gatewayip (if needed),
99 netmask, ethaddr, eth1addr, rootpath (if using NFS root),
100 fdtfile, and bootfile).
101
102 Then, do one of the following, depending on whether you
103 want an NFS root or a ramdisk root:
104
105 =>run nfsboot
106 or
107 =>run ramboot
108
1096 Notes
110
Scott Wood865b8ae2007-04-16 14:54:15 -0500111 The console baudrate for MPC8313ERDB is 115200bps.