| Simon Glass | c5915f7 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2016 Google, Inc |
| 3 | * (C) Copyright 2008-2014 Rockchip Electronics |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef _ASM_ARCH_PWM_H |
| 9 | #define _ASM_ARCH_PWM_H |
| 10 | |
| 11 | struct rk3288_pwm { |
| 12 | u32 cnt; |
| Kever Yang | 7ac41cf | 2016-09-23 15:57:18 +0800 | [diff] [blame] | 13 | u32 period_hpr; |
| eric.gao@rock-chips.com | bdd3731 | 2017-06-19 14:45:36 +0800 | [diff] [blame] | 14 | u32 duty_lpr; |
| Simon Glass | c5915f7 | 2016-01-21 19:44:55 -0700 | [diff] [blame] | 15 | u32 ctrl; |
| 16 | }; |
| 17 | check_member(rk3288_pwm, ctrl, 0xc); |
| 18 | |
| 19 | #define RK_PWM_DISABLE (0 << 0) |
| 20 | #define RK_PWM_ENABLE (1 << 0) |
| 21 | |
| 22 | #define PWM_ONE_SHOT (0 << 1) |
| 23 | #define PWM_CONTINUOUS (1 << 1) |
| 24 | #define RK_PWM_CAPTURE (1 << 2) |
| 25 | |
| 26 | #define PWM_DUTY_POSTIVE (1 << 3) |
| 27 | #define PWM_DUTY_NEGATIVE (0 << 3) |
| 28 | |
| 29 | #define PWM_INACTIVE_POSTIVE (1 << 4) |
| 30 | #define PWM_INACTIVE_NEGATIVE (0 << 4) |
| 31 | |
| 32 | #define PWM_OUTPUT_LEFT (0 << 5) |
| 33 | #define PWM_OUTPUT_CENTER (1 << 5) |
| 34 | |
| 35 | #define PWM_LP_ENABLE (1 << 8) |
| 36 | #define PWM_LP_DISABLE (0 << 8) |
| 37 | |
| 38 | #define PWM_SEL_SCALE_CLK (1 << 9) |
| 39 | #define PWM_SEL_SRC_CLK (0 << 9) |
| 40 | |
| 41 | #endif |