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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stelian Pop61e69d72008-05-08 20:52:22 +02002/*
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h]
4 *
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
8 * Based on AT91SAM9261 datasheet revision D.
Stelian Pop61e69d72008-05-08 20:52:22 +02009 */
10
11#ifndef AT91SAM9261_MATRIX_H
12#define AT91SAM9261_MATRIX_H
13
Xu, Hong3f6dcee2011-07-31 22:37:06 +000014#ifndef __ASSEMBLY__
Stelian Pop61e69d72008-05-08 20:52:22 +020015
Xu, Hong3f6dcee2011-07-31 22:37:06 +000016struct at91_matrix {
17 u32 mcfg; /* Master Configuration Registers */
18 u32 scfg[5]; /* Slave Configuration Registers */
19 u32 filler[6];
20 u32 ebicsa; /* EBI Chip Select Assignment Register */
21};
22#endif /* __ASSEMBLY__ */
Stelian Pop61e69d72008-05-08 20:52:22 +020023
Xu, Hong3f6dcee2011-07-31 22:37:06 +000024#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
25#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
26#define AT91_MATRIX_ULBT_FOUR (2 << 0)
27#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
28#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
Stelian Pop61e69d72008-05-08 20:52:22 +020029
Xu, Hong3f6dcee2011-07-31 22:37:06 +000030#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
31#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
32#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
33#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18
34#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
35#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
36
37#define AT91_MATRIX_M0PR_SHIFT 0
38#define AT91_MATRIX_M1PR_SHIFT 4
39#define AT91_MATRIX_M2PR_SHIFT 8
40#define AT91_MATRIX_M3PR_SHIFT 12
41#define AT91_MATRIX_M4PR_SHIFT 16
42#define AT91_MATRIX_M5PR_SHIFT 20
43
44#define AT91_MATRIX_RCB0 (1 << 0)
45#define AT91_MATRIX_RCB1 (1 << 1)
Stelian Pop61e69d72008-05-08 20:52:22 +020046
Xu, Hong3f6dcee2011-07-31 22:37:06 +000047#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
48#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
49#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
50#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
51#define AT91_MATRIX_DBPUC (1 << 8)
52#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
53#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
Stelian Pop61e69d72008-05-08 20:52:22 +020054
55#endif