blob: c8b104d8f567211a4d4fb75dccbb8275baf2b7c9 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christophe Leroy89067642018-03-16 17:21:01 +01002/*
3 * Copyright 2017 CS Systemes d'Information
Christophe Leroy89067642018-03-16 17:21:01 +01004 */
5
6#include <common.h>
Charles Frey3b446282020-02-19 16:50:15 +00007#include <env.h>
Christophe Leroy40159302018-11-21 08:51:45 +00008#include <dm.h>
9#include <wdt.h>
Christophe Leroy89067642018-03-16 17:21:01 +010010#include <mpc8xx.h>
11#include <asm/cpm_8xx.h>
12#include <asm/io.h>
13
Christophe Leroy545e8942020-02-20 07:39:51 +000014void hw_watchdog_reset(void)
Christophe Leroy89067642018-03-16 17:21:01 +010015{
16 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
17
18 out_be16(&immap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
19 out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
20}
21
Christophe Leroy40159302018-11-21 08:51:45 +000022static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
23{
24 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
Charles Frey3b446282020-02-19 16:50:15 +000025 u32 val = CONFIG_SYS_SYPCR;
26 const char *mode = env_get("watchdog_mode");
27
28 if (strcmp(mode, "off") == 0)
29 val = val & ~(SYPCR_SWE | SYPCR_SWRI);
30 else if (strcmp(mode, "nmi") == 0)
31 val = (val & ~SYPCR_SWRI) | SYPCR_SWE;
Christophe Leroy40159302018-11-21 08:51:45 +000032
Charles Frey3b446282020-02-19 16:50:15 +000033 out_be32(&immap->im_siu_conf.sc_sypcr, val);
Christophe Leroy40159302018-11-21 08:51:45 +000034
35 if (!(in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE))
36 return -EBUSY;
37 return 0;
38
39}
40
41static int mpc8xx_wdt_stop(struct udevice *dev)
42{
43 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
44
45 out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE);
46
47 if (in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE)
48 return -EBUSY;
49 return 0;
50}
51
52static int mpc8xx_wdt_reset(struct udevice *dev)
53{
54 hw_watchdog_reset();
55
56 return 0;
57}
58
59static const struct wdt_ops mpc8xx_wdt_ops = {
60 .start = mpc8xx_wdt_start,
61 .reset = mpc8xx_wdt_reset,
62 .stop = mpc8xx_wdt_stop,
63};
64
65static const struct udevice_id mpc8xx_wdt_ids[] = {
66 { .compatible = "fsl,pq1-wdt" },
67 {}
68};
69
70U_BOOT_DRIVER(wdt_mpc8xx) = {
71 .name = "wdt_mpc8xx",
72 .id = UCLASS_WDT,
73 .of_match = mpc8xx_wdt_ids,
74 .ops = &mpc8xx_wdt_ops,
75};