blob: 7fe77ac8d81b793a798e37494cae175bab30c976 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Ley Foon Tanb149f2b2017-04-26 02:44:36 +08002/*
3 * Copyright (C) 2016-2017 Intel Corporation
Ley Foon Tanb149f2b2017-04-26 02:44:36 +08004 */
5
6#ifndef _MISC_H_
7#define _MISC_H_
8
9void dwmac_deassert_reset(const unsigned int of_reset_id, const u32 phymode);
10
11struct bsel {
12 const char *mode;
13 const char *name;
14};
15
16extern struct bsel bsel_str[];
17
18#ifdef CONFIG_FPGA
19void socfpga_fpga_add(void);
20#else
21static inline void socfpga_fpga_add(void) {}
22#endif
23
Ley Foon Tancfd0c542017-04-26 02:44:43 +080024#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
25unsigned int dedicated_uart_com_port(const void *blob);
26unsigned int shared_uart_com_port(const void *blob);
27unsigned int uart_com_port(const void *blob);
28#endif
29
Ley Foon Tan4cc6b582018-05-24 00:17:23 +080030void do_bridge_reset(int enable);
31
Ley Foon Tanb149f2b2017-04-26 02:44:36 +080032#endif /* _MISC_H_ */