blob: e1077e2da5f42652f5ec07c29174f34e21fd7231 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2014-2022 Toradex
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd.
6 */
7
8/dts-v1/;
9
Tom Rini6bb92fc2024-05-20 09:54:58 -060010#include "imx6q-apalis-eval.dtsi"
Tom Rini53633a82024-02-29 12:33:36 -050011
12/ {
13 model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board";
14 compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q",
15 "fsl,imx6q";
16
Tom Rini53633a82024-02-29 12:33:36 -050017 reg_pcie_switch: regulator-pcie-switch {
18 compatible = "regulator-fixed";
19 enable-active-high;
20 gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
21 regulator-max-microvolt = <1800000>;
22 regulator-min-microvolt = <1800000>;
23 regulator-name = "pcie_switch";
24 startup-delay-us = <100000>;
25 status = "okay";
26 };
Tom Rini53633a82024-02-29 12:33:36 -050027};
28
29&can1 {
30 xceiver-supply = <&reg_3v3_sw>;
31 status = "okay";
32};
33
34&can2 {
35 xceiver-supply = <&reg_3v3_sw>;
36 status = "okay";
37};
38
39/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
40&i2c1 {
Tom Rini6bb92fc2024-05-20 09:54:58 -060041 /* PCIe Switch */
Tom Rini53633a82024-02-29 12:33:36 -050042 pcie-switch@58 {
43 compatible = "plx,pex8605";
44 reg = <0x58>;
45 };
Tom Rini53633a82024-02-29 12:33:36 -050046};
47
48&pcie {
Tom Rini53633a82024-02-29 12:33:36 -050049 vpcie-supply = <&reg_pcie_switch>;
50 status = "okay";
51};
52
Tom Rini53633a82024-02-29 12:33:36 -050053&sound_spdif {
54 status = "okay";
55};
56
Tom Rini53633a82024-02-29 12:33:36 -050057/* MMC1 */
58&usdhc1 {
59 status = "okay";
60};
61
62/* SD1 */
63&usdhc2 {
64 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
67 status = "okay";
68};