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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Fabio Estevam6cfa7122016-02-29 09:33:22 -03002/*
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam6cfa7122016-02-29 09:33:22 -03005 */
6
7#include <asm/arch/clock.h>
8#include <asm/arch/imx-regs.h>
9#include <asm/arch/mx7-pins.h>
10#include <asm/arch/sys_proto.h>
11#include <asm/gpio.h>
Bryan O'Donoghue1b60ee62018-04-24 18:46:33 +010012#include <asm/mach-imx/hab.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020013#include <asm/mach-imx/iomux-v3.h>
14#include <asm/mach-imx/mxc_i2c.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030015#include <asm/io.h>
16#include <common.h>
17#include <fsl_esdhc.h>
Vanessa Maegima4abedc82016-08-19 10:21:36 -030018#include <i2c.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030019#include <mmc.h>
20#include <asm/arch/crm_regs.h>
21#include <usb.h>
Kevin Hilman46fdd842016-12-16 13:08:10 -080022#include <netdev.h>
Vanessa Maegima4abedc82016-08-19 10:21:36 -030023#include <power/pmic.h>
24#include <power/pfuze3000_pmic.h>
25#include "../freescale/common/pfuze.h"
Bryan O'Donoghue1936c412018-03-26 15:27:34 +010026#include <asm/setup.h>
27#include <asm/bootm.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030028
29DECLARE_GLOBAL_DATA_PTR;
30
31#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
32 PAD_CTL_HYS)
Fabio Estevam6cfa7122016-02-29 09:33:22 -030033
34int dram_init(void)
35{
36 gd->ram_size = PHYS_SDRAM_SIZE;
37
Bryan O'Donoghue2adfdff2018-04-24 18:46:35 +010038 /* Subtract the defined OPTEE runtime firmware length */
39#ifdef CONFIG_OPTEE_TZDRAM_SIZE
40 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
41#endif
42
Fabio Estevam6cfa7122016-02-29 09:33:22 -030043 return 0;
44}
45
Marco Franchi3d73f522016-06-10 14:45:28 -030046static iomux_v3_cfg_t const wdog_pads[] = {
47 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
48};
49
Fabio Estevam6cfa7122016-02-29 09:33:22 -030050static iomux_v3_cfg_t const uart1_pads[] = {
51 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
52 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
53};
54
Fabio Estevam6cfa7122016-02-29 09:33:22 -030055static void setup_iomux_uart(void)
56{
57 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
58};
59
Fabio Estevam6cfa7122016-02-29 09:33:22 -030060int board_early_init_f(void)
61{
62 setup_iomux_uart();
63
64 return 0;
65}
66
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000067#ifdef CONFIG_DM_PMIC
Vanessa Maegima4abedc82016-08-19 10:21:36 -030068int power_init_board(void)
69{
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000070 struct udevice *dev;
71 int ret, dev_id, rev_id;
Vanessa Maegima4abedc82016-08-19 10:21:36 -030072
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000073 ret = pmic_get("pfuze3000", &dev);
74 if (ret == -ENODEV)
75 return 0;
76 if (ret != 0)
Vanessa Maegima4abedc82016-08-19 10:21:36 -030077 return ret;
78
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000079 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
80 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
81 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
Vanessa Maegima4abedc82016-08-19 10:21:36 -030082
83 /* disable Low Power Mode during standby mode */
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000084 pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
Vanessa Maegima4abedc82016-08-19 10:21:36 -030085
86 return 0;
87}
88#endif
89
Kevin Hilman46fdd842016-12-16 13:08:10 -080090int board_eth_init(bd_t *bis)
91{
92 int ret = 0;
93
94#ifdef CONFIG_USB_ETHER
95 ret = usb_eth_initialize(bis);
96 if (ret < 0)
97 printf("Error %d registering USB ether.\n", ret);
98#endif
99
100 return ret;
101}
102
Fabio Estevam6cfa7122016-02-29 09:33:22 -0300103int board_init(void)
104{
105 /* address of boot parameters */
106 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
107
108 return 0;
109}
110
111int checkboard(void)
112{
Fabio Estevamf8f21942016-08-25 21:07:20 -0300113 char *mode;
114
115 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
116 mode = "secure";
117 else
118 mode = "non-secure";
119
Bryan O'Donoghue446dddd2018-04-24 18:46:36 +0100120#ifdef CONFIG_OPTEE_TZDRAM_SIZE
121 unsigned long optee_start, optee_end;
122
123 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
124 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
125
126 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
127 mode, optee_start, optee_end);
128#else
Fabio Estevamf8f21942016-08-25 21:07:20 -0300129 printf("Board: WARP7 in %s mode\n", mode);
Bryan O'Donoghue446dddd2018-04-24 18:46:36 +0100130#endif
Fabio Estevam6cfa7122016-02-29 09:33:22 -0300131
132 return 0;
133}
134
135int board_usb_phy_mode(int port)
136{
137 return USB_INIT_DEVICE;
138}
Marco Franchi3d73f522016-06-10 14:45:28 -0300139
140int board_late_init(void)
141{
142 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
Bryan O'Donoghue1936c412018-03-26 15:27:34 +0100143#ifdef CONFIG_SERIAL_TAG
144 struct tag_serialnr serialnr;
145 char serial_string[0x20];
146#endif
Marco Franchi3d73f522016-06-10 14:45:28 -0300147
148 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
149
150 set_wdog_reset(wdog);
151
152 /*
153 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
154 * since we use PMIC_PWRON to reset the board.
155 */
156 clrsetbits_le16(&wdog->wcr, 0, 0x10);
157
Bryan O'Donoghue1b60ee62018-04-24 18:46:33 +0100158#ifdef CONFIG_SECURE_BOOT
159 /* Determine HAB state */
160 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
161#else
162 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
163#endif
164
Bryan O'Donoghue1936c412018-03-26 15:27:34 +0100165#ifdef CONFIG_SERIAL_TAG
166 /* Set serial# standard environment variable based on OTP settings */
167 get_board_serial(&serialnr);
168 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
169 serialnr.low, serialnr.high);
170 env_set("serial#", serial_string);
171#endif
172
Marco Franchi3d73f522016-06-10 14:45:28 -0300173 return 0;
174}