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Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +03001/*
2 * Board functions for Compulab CM-T54 board
3 *
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5 *
6 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#include <common.h>
Alex Kiernan9c215492018-04-01 09:22:38 +000012#include <environment.h>
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +030013#include <fdt_support.h>
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +030014#include <usb.h>
15#include <mmc.h>
16#include <palmas.h>
Dmitry Lifshitzf0ead5d2014-04-27 13:18:48 +030017#include <spl.h>
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +030018
19#include <asm/gpio.h>
20#include <asm/arch/sys_proto.h>
21#include <asm/arch/mmc_host_def.h>
22#include <asm/arch/clock.h>
23#include <asm/arch/ehci.h>
24#include <asm/ehci-omap.h>
25
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +030026#include "../common/eeprom.h"
27
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +030028#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
29#define DIE_ID_REG_OFFSET 0x200
30
31DECLARE_GLOBAL_DATA_PTR;
32
33#if !defined(CONFIG_SPL_BUILD)
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010034inline void set_muxconf_regs(void){};
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +030035#endif
36
37const struct omap_sysinfo sysinfo = {
38 "Board: CM-T54\n"
39};
40
41/*
42 * Routine: board_init
43 * Description: hardware init.
44 */
45int board_init(void)
46{
Dmitry Lifshitz29525de2014-07-31 14:30:39 +030047 gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +030048
49 return 0;
50}
51
52/*
53 * Routine: cm_t54_palmas_regulator_set
54 * Description: select voltage and turn on/off Palmas PMIC regulator.
55 */
56static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)
57{
58 int err;
59
60 /* Setup voltage */
61 err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval);
62 if (err) {
63 printf("cm_t54: could not set regulator 0x%02x voltage : %d\n",
64 vreg, err);
65 return err;
66 }
67
68 /* Turn on/off regulator */
69 err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval);
70 if (err) {
71 printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n",
72 creg, err);
73 return err;
74 }
75
76 return 0;
77}
78
Dmitry Lifshitzf0ead5d2014-04-27 13:18:48 +030079/*
80 * Routine: mmc_get_env_part
81 * Description: setup environment storage device partition.
82 */
83#ifdef CONFIG_SYS_MMC_ENV_PART
84uint mmc_get_env_part(struct mmc *mmc)
85{
Paul Kocialkowskid5b76242015-07-15 16:02:19 +020086 u32 bootmode = gd->arch.omap_boot_mode;
Dmitry Lifshitzf0ead5d2014-04-27 13:18:48 +030087 uint bootpart = CONFIG_SYS_MMC_ENV_PART;
88
89 /*
90 * If booted from eMMC boot partition then force eMMC
91 * FIRST boot partition to be env storage
92 */
Dmitry Lifshitz3f1546d2014-07-31 14:30:40 +030093 if (bootmode == BOOT_DEVICE_MMC2)
Dmitry Lifshitzf0ead5d2014-04-27 13:18:48 +030094 bootpart = 1;
95
96 return bootpart;
97}
98#endif
99
Masahiro Yamada0a780172017-05-09 20:31:39 +0900100#if defined(CONFIG_MMC)
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +0300101#define SB_T54_CD_GPIO 228
102#define SB_T54_WP_GPIO 229
103
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +0300104int board_mmc_init(bd_t *bis)
105{
106 int ret0, ret1;
107
Igor Grinberg2f4e0952014-11-03 11:32:23 +0200108 ret0 = omap_mmc_init(0, 0, 0, SB_T54_CD_GPIO, SB_T54_WP_GPIO);
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +0300109 if (ret0)
110 printf("cm_t54: failed to initialize mmc0\n");
111
112 ret1 = omap_mmc_init(1, 0, 0, -1, -1);
113 if (ret1)
114 printf("cm_t54: failed to initialize mmc1\n");
115
116 if (ret0 && ret1)
117 return -1;
118
119 return 0;
120}
121#endif
122
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300123#ifdef CONFIG_USB_HOST_ETHER
124
Simon Glass2aec3cc2014-10-23 18:58:47 -0600125int ft_board_setup(void *blob, bd_t *bd)
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300126{
127 uint8_t enetaddr[6];
128
129 /* MAC addr */
Simon Glass399a9ce2017-08-03 12:22:14 -0600130 if (eth_env_get_enetaddr("usbethaddr", enetaddr)) {
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300131 fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address",
132 enetaddr, 6, 1);
133 }
Simon Glass2aec3cc2014-10-23 18:58:47 -0600134
135 return 0;
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300136}
137
138static void generate_mac_addr(uint8_t *enetaddr)
139{
140 int reg;
141
142 reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
143
144 /*
145 * create a fake MAC address from the processor ID code.
146 * first byte is 0x02 to signify locally administered.
147 */
148 enetaddr[0] = 0x02;
149 enetaddr[1] = readl(reg + 0x10) & 0xff;
150 enetaddr[2] = readl(reg + 0xC) & 0xff;
151 enetaddr[3] = readl(reg + 0x8) & 0xff;
152 enetaddr[4] = readl(reg) & 0xff;
153 enetaddr[5] = (readl(reg) >> 8) & 0xff;
154}
155
156/*
157 * Routine: handle_mac_address
158 * Description: prepare MAC address for on-board Ethernet.
159 */
160static int handle_mac_address(void)
161{
162 uint8_t enetaddr[6];
163 int ret;
164
Simon Glass399a9ce2017-08-03 12:22:14 -0600165 ret = eth_env_get_enetaddr("usbethaddr", enetaddr);
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300166 if (ret)
167 return 0;
168
Nikita Kiryanovb2c55472015-01-14 10:42:43 +0200169 ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
Joe Hershberger8ecdbed2015-04-08 01:41:04 -0500170 if (ret || !is_valid_ethaddr(enetaddr))
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300171 generate_mac_addr(enetaddr);
172
Joe Hershberger8ecdbed2015-04-08 01:41:04 -0500173 if (!is_valid_ethaddr(enetaddr))
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300174 return -1;
175
Simon Glass8551d552017-08-03 12:22:11 -0600176 return eth_env_set_enetaddr("usbethaddr", enetaddr);
Dmitry Lifshitz0cc0b242014-04-27 13:18:46 +0300177}
178
179int board_eth_init(bd_t *bis)
180{
181 return handle_mac_address();
182}
183#endif
184
Tom Riniceed5d22017-05-12 22:33:27 -0400185#ifdef CONFIG_USB_EHCI_HCD
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +0300186static struct omap_usbhs_board_data usbhs_bdata = {
187 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
188 .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
189 .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
190};
191
192static void setup_host_clocks(bool enable)
193{
194 int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK |
195 OPTFCLKEN_HSIC480M_P3_CLK |
196 OPTFCLKEN_HSIC60M_P2_CLK |
197 OPTFCLKEN_HSIC480M_P2_CLK |
198 OPTFCLKEN_UTMI_P3_CLK |
199 OPTFCLKEN_UTMI_P2_CLK;
200
201 int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE |
202 OPTFCLKEN_USB_CH2_CLK_ENABLE;
203
204 int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK;
205
206 if (enable) {
207 /* Enable port 2 and 3 clocks*/
208 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
209 /* Enable port 2 and 3 usb host ports tll clocks*/
210 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
211 /* Request FREF_XTAL_CLK clock for HSIC USB Hub */
212 setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
213 } else {
214 clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
215 clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
216 clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
217 }
218}
219
220int ehci_hcd_init(int index, enum usb_init_type init,
221 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
222{
223 int ret;
224
225 /* VCC_3V3_ETH */
226 cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL,
227 SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO);
228
229 setup_host_clocks(true);
230
231 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
232 if (ret < 0)
233 printf("cm_t54: Failed to initialize ehci : %d\n", ret);
234
235 return ret;
236}
237
238int ehci_hcd_stop(void)
239{
240 int ret = omap_ehci_hcd_stop();
241
242 setup_host_clocks(false);
243
244 cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF,
245 SMPS9_CTRL, SMPS_MODE_SLP_AUTO);
246
247 return ret;
248}
249
Philipp Tomsich693f4922017-11-22 17:15:17 +0100250void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
Dmitry Lifshitzc3ad3a02014-05-19 12:50:54 +0300251{
252 /* The LAN9730 needs to be reset after the port power has been set. */
253 if (port == 3) {
254 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
255 udelay(10);
256 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
257 }
258}
259#endif
260