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git01.mediatek.com / filogic / uboot / cb2accdbb2ce82afdb6e915bbee41ec5cce595ee / . / arch / sh / lib / ashlsi3.S
blob: f971568e35a86e6e8f54d4e46bb27135deb83687 [file] [log] [blame]
Phil Edworthy8e5ab4b2011-06-02 22:15:27 +0000[diff] [blame]1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
6 */
Phil Edworthy8e5ab4b2011-06-02 22:15:27 +0000[diff] [blame]7
8!! libgcc routines for the Renesas / SuperH SH CPUs.
9!! Contributed by Steve Chamberlain.
10!! sac@cygnus.com
11
12!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
13!! recoded in assembly by Toshiyasu Morita
14!! tm@netcom.com
15
16/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
17 ELF local label prefixes by J"orn Rennecke
18 amylaar@cygnus.com */
19
20!
21! GLOBAL(ashlsi3)
22!
23! Entry:
24!
25! r4: Value to shift
26! r5: Shifts
27!
28! Exit:
29!
30! r0: Result
31!
32! Destroys:
33!
34! (none)
35!
36 .global __ashlsi3
37 .align 2
38__ashlsi3:
39 mov #31,r0
40 and r0,r5
41 mova __ashlsi3_table,r0
42 mov.b @(r0,r5),r5
43#ifdef __sh1__
44 add r5,r0
45 jmp @r0
46#else
47 braf r5
48#endif
49 mov r4,r0
50
51 .align 2
52__ashlsi3_table:
53 .byte __ashlsi3_0-__ashlsi3_table
54 .byte __ashlsi3_1-__ashlsi3_table
55 .byte __ashlsi3_2-__ashlsi3_table
56 .byte __ashlsi3_3-__ashlsi3_table
57 .byte __ashlsi3_4-__ashlsi3_table
58 .byte __ashlsi3_5-__ashlsi3_table
59 .byte __ashlsi3_6-__ashlsi3_table
60 .byte __ashlsi3_7-__ashlsi3_table
61 .byte __ashlsi3_8-__ashlsi3_table
62 .byte __ashlsi3_9-__ashlsi3_table
63 .byte __ashlsi3_10-__ashlsi3_table
64 .byte __ashlsi3_11-__ashlsi3_table
65 .byte __ashlsi3_12-__ashlsi3_table
66 .byte __ashlsi3_13-__ashlsi3_table
67 .byte __ashlsi3_14-__ashlsi3_table
68 .byte __ashlsi3_15-__ashlsi3_table
69 .byte __ashlsi3_16-__ashlsi3_table
70 .byte __ashlsi3_17-__ashlsi3_table
71 .byte __ashlsi3_18-__ashlsi3_table
72 .byte __ashlsi3_19-__ashlsi3_table
73 .byte __ashlsi3_20-__ashlsi3_table
74 .byte __ashlsi3_21-__ashlsi3_table
75 .byte __ashlsi3_22-__ashlsi3_table
76 .byte __ashlsi3_23-__ashlsi3_table
77 .byte __ashlsi3_24-__ashlsi3_table
78 .byte __ashlsi3_25-__ashlsi3_table
79 .byte __ashlsi3_26-__ashlsi3_table
80 .byte __ashlsi3_27-__ashlsi3_table
81 .byte __ashlsi3_28-__ashlsi3_table
82 .byte __ashlsi3_29-__ashlsi3_table
83 .byte __ashlsi3_30-__ashlsi3_table
84 .byte __ashlsi3_31-__ashlsi3_table
85
86__ashlsi3_6:
87 shll2 r0
88__ashlsi3_4:
89 shll2 r0
90__ashlsi3_2:
91 rts
92 shll2 r0
93
94__ashlsi3_7:
95 shll2 r0
96__ashlsi3_5:
97 shll2 r0
98__ashlsi3_3:
99 shll2 r0
100__ashlsi3_1:
101 rts
102 shll r0
103
104__ashlsi3_14:
105 shll2 r0
106__ashlsi3_12:
107 shll2 r0
108__ashlsi3_10:
109 shll2 r0
110__ashlsi3_8:
111 rts
112 shll8 r0
113
114__ashlsi3_15:
115 shll2 r0
116__ashlsi3_13:
117 shll2 r0
118__ashlsi3_11:
119 shll2 r0
120__ashlsi3_9:
121 shll8 r0
122 rts
123 shll r0
124
125__ashlsi3_22:
126 shll2 r0
127__ashlsi3_20:
128 shll2 r0
129__ashlsi3_18:
130 shll2 r0
131__ashlsi3_16:
132 rts
133 shll16 r0
134
135__ashlsi3_23:
136 shll2 r0
137__ashlsi3_21:
138 shll2 r0
139__ashlsi3_19:
140 shll2 r0
141__ashlsi3_17:
142 shll16 r0
143 rts
144 shll r0
145
146__ashlsi3_30:
147 shll2 r0
148__ashlsi3_28:
149 shll2 r0
150__ashlsi3_26:
151 shll2 r0
152__ashlsi3_24:
153 shll16 r0
154 rts
155 shll8 r0
156
157__ashlsi3_31:
158 shll2 r0
159__ashlsi3_29:
160 shll2 r0
161__ashlsi3_27:
162 shll2 r0
163__ashlsi3_25:
164 shll16 r0
165 shll8 r0
166 rts
167 shll r0
168
169__ashlsi3_0:
170 rts
171 nop