blob: c8298c57e11ba22d8faa8c60029897f95fc98cc0 [file] [log] [blame]
Minkyu Kangae6f0c62009-07-20 11:40:01 +09001/*
Steve Sakoman1ad21582010-06-08 13:07:46 -07002 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com>
Minkyu Kangae6f0c62009-07-20 11:40:01 +09004 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kangae6f0c62009-07-20 11:40:01 +09006 */
7
Steve Sakoman1ad21582010-06-08 13:07:46 -07008#ifndef _SYS_PROTO_H_
9#define _SYS_PROTO_H_
10
Sricharan9310ff72011-11-15 09:49:55 -050011#include <asm/arch/omap.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000012#include <asm/arch/clock.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070013#include <asm/io.h>
Aneesh V30679422011-07-21 09:09:59 -040014#include <asm/omap_common.h>
pekon gupta5bbb0992013-11-22 16:53:29 +053015#include <linux/mtd/omap_gpmc.h>
Aneesh Vf908b632011-07-21 09:10:01 -040016#include <asm/arch/mux_omap4.h>
Tom Rini72f36002014-05-16 13:02:24 -040017#include <asm/ti-common/sys_proto.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070018
Paul Kocialkowski83ec8812016-02-27 19:18:53 +010019#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
Hardik Patel8662fc62013-11-27 21:16:21 +053020extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
21extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
22extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
23extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
Nishanth Menonc22ced32014-12-18 15:28:35 -060024extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2;
25extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2;
26extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2;
Paul Kocialkowski83ec8812016-02-27 19:18:53 +010027#else
28extern const struct lpddr2_device_details elpida_2G_S4_details;
29extern const struct lpddr2_device_details elpida_4G_S4_details;
30#endif
Paul Kocialkowski6943d342016-02-27 19:18:54 +010031
Paul Kocialkowskiebb7b9f2016-02-27 19:18:55 +010032#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
33extern const struct lpddr2_device_timings jedec_default_timings;
34#else
Paul Kocialkowski6943d342016-02-27 19:18:54 +010035extern const struct lpddr2_device_timings elpida_2G_S4_timings;
36#endif
37
Steve Sakoman1ad21582010-06-08 13:07:46 -070038struct omap_sysinfo {
39 char *board_string;
40};
Aneesh V30679422011-07-21 09:09:59 -040041extern const struct omap_sysinfo sysinfo;
Steve Sakoman1ad21582010-06-08 13:07:46 -070042
Steve Sakoman9b8ea4e2010-07-15 16:19:16 -040043void gpmc_init(void);
Steve Sakoman1ad21582010-06-08 13:07:46 -070044void watchdog_init(void);
45u32 get_device_type(void);
Aneesh Vf908b632011-07-21 09:10:01 -040046void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010047void set_muxconf_regs(void);
Steve Sakoman6e09a762010-08-04 09:39:40 -070048u32 wait_on_value(u32, u32, void *, u32);
49void sdelay(unsigned long);
Kipisz, Stevenebe86dc2016-02-24 12:30:52 -060050void setup_early_clocks(void);
Aneesh V0d2628b2011-07-21 09:10:07 -040051void prcm_init(void);
Kipisz, Steven4466dfb2016-02-24 12:30:57 -060052void do_board_detect(void);
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000053void bypass_dpll(u32 const base);
Aneesh V0d2628b2011-07-21 09:10:07 -040054void freq_update_core(void);
55u32 get_sys_clk_freq(void);
56u32 omap4_ddr_clk(void);
Aneesh Vc0e88522011-07-21 09:10:12 -040057void cancel_out(u32 *num, u32 *den, u32 den_limit);
Aneesh Vcc565582011-07-21 09:10:09 -040058void sdram_init(void);
Sricharan9310ff72011-11-15 09:49:55 -050059u32 omap_sdram_size(void);
60u32 cortex_rev(void);
Tom Rini51df26c2013-05-31 12:31:59 -040061void save_omap_boot_params(void);
Sricharan9310ff72011-11-15 09:49:55 -050062void init_omap_revision(void);
63void do_io_settings(void);
Lokesh Vutlaae49f6d2013-05-30 02:54:33 +000064void sri2c_init(void);
Nishanth Menon41d7ab12012-03-01 14:17:37 +000065int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000066u32 warm_reset(void);
Lokesh Vutlaba873772012-05-29 19:26:43 +000067void force_emif_self_refresh(void);
Lokesh Vutla100c2d82013-04-17 20:49:40 +000068void setup_warmreset_time(void);
Nishanth Menon19e1fdf2015-03-09 17:12:03 -050069
70#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
71
Steve Sakoman1ad21582010-06-08 13:07:46 -070072#endif