developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. |
| 4 | * |
| 5 | * Author: Weijie Gao <weijie.gao@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_MT7620_H |
| 9 | #define __CONFIG_MT7620_H |
| 10 | |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 11 | #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 |
| 12 | |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 13 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 14 | |
| 15 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
| 16 | |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 17 | /* SPL */ |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 18 | |
| 19 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 20 | |
| 21 | /* Dummy value */ |
| 22 | #define CONFIG_SYS_UBOOT_BASE 0 |
| 23 | |
| 24 | #endif /* __CONFIG_MT7620_H */ |