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Oliver Grautedafcd992019-09-20 07:08:41 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017-2018 NXP
4 */
5
6#ifndef __IMX8QM_ROM7720_H
7#define __IMX8QM_ROM7720_H
8
9#include <linux/sizes.h>
Simon Glassfb64e362020-05-10 11:40:09 -060010#include <linux/stringify.h>
Oliver Grautedafcd992019-09-20 07:08:41 +000011#include <asm/arch/imx-regs.h>
Oliver Grautedafcd992019-09-20 07:08:41 +000012
Oliver Grauted5c36ec2020-02-12 12:01:17 +000013#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
Oliver Grautedafcd992019-09-20 07:08:41 +000014#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Oliver Graute2fe5a342019-12-19 14:25:53 +000015#define USDHC1_BASE_ADDR 0x5B010000
16#define USDHC2_BASE_ADDR 0x5B020000
17#define USDHC3_BASE_ADDR 0x5B030000
18
Oliver Grautedafcd992019-09-20 07:08:41 +000019/* FUSE command */
Oliver Grautedafcd992019-09-20 07:08:41 +000020
21/* Boot M4 */
22#define M4_BOOT_ENV \
23 "m4_0_image=m4_0.bin\0" \
24 "m4_1_image=m4_1.bin\0" \
25 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
26 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
27 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
28 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
29
30#ifdef CONFIG_NAND_BOOT
31#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
32#else
33#define MFG_NAND_PARTITION ""
34#endif
35
36#define CONFIG_MFG_ENV_SETTINGS \
37 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
38 "rdinit=/linuxrc " \
39 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
40 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
41 "g_mass_storage.iSerialNumber=\"\" "\
42 MFG_NAND_PARTITION \
43 "clk_ignore_unused "\
44 "\0" \
45 "initrd_addr=0x83800000\0" \
46 "initrd_high=0xffffffffffffffff\0" \
47 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
48
49/* Initial environment variables */
50#define CONFIG_EXTRA_ENV_SETTINGS \
51 CONFIG_MFG_ENV_SETTINGS \
52 M4_BOOT_ENV \
53 "script=boot.scr\0" \
54 "image=Image\0" \
55 "panel=NULL\0" \
56 "console=ttyLP0\0" \
Oliver Graute88c5a1b2022-01-26 22:56:07 +010057 "fdt_addr=0x84000000\0" \
Oliver Grautedafcd992019-09-20 07:08:41 +000058 "boot_fdt=try\0" \
59 "fdt_file=imx8qm-rom7720-a1.dtb\0" \
60 "initrd_addr=0x83800000\0" \
Oliver Grautedafcd992019-09-20 07:08:41 +000061 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
Tom Rinib113bca2021-12-11 14:55:52 -050062 "mmcpart=1\0" \
Peng Fanbb4bb582022-04-15 12:23:41 +080063 "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
Oliver Grautedafcd992019-09-20 07:08:41 +000064 "mmcautodetect=yes\0" \
65 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
66 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
67 "bootscript=echo Running bootscript from mmc ...; " \
68 "source\0" \
69 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
70 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
71 "mmcboot=echo Booting from mmc ...; " \
72 "run mmcargs; " \
73 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
74 "if run loadfdt; then " \
75 "booti ${loadaddr} - ${fdt_addr}; " \
76 "else " \
77 "echo WARN: Cannot load the DT; " \
78 "fi; " \
79 "else " \
80 "echo wait for boot; " \
81 "fi;\0" \
82 "netargs=setenv bootargs console=${console},${baudrate} " \
83 "root=/dev/nfs " \
84 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
85 "netboot=echo Booting from net ...; " \
86 "run netargs; " \
87 "if test ${ip_dyn} = yes; then " \
88 "setenv get_cmd dhcp; " \
89 "else " \
90 "setenv get_cmd tftp; " \
91 "fi; " \
92 "${get_cmd} ${loadaddr} ${image}; " \
93 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
94 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
95 "booti ${loadaddr} - ${fdt_addr}; " \
96 "else " \
97 "echo WARN: Cannot load the DT; " \
98 "fi; " \
99 "else " \
100 "booti; " \
101 "fi;\0"
102
Oliver Grautedafcd992019-09-20 07:08:41 +0000103/* Link Definitions */
Oliver Grautedafcd992019-09-20 07:08:41 +0000104
Oliver Grautedafcd992019-09-20 07:08:41 +0000105/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
106 * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
107 * USDHC2 is for SD, USDHC3 is for SD on base board
108 */
Oliver Grautedafcd992019-09-20 07:08:41 +0000109#define CONFIG_SYS_FSL_USDHC_NUM 3
110
Oliver Grautedafcd992019-09-20 07:08:41 +0000111#define CONFIG_SYS_SDRAM_BASE 0x80000000
112#define PHYS_SDRAM_1 0x80000000
113#define PHYS_SDRAM_2 0x880000000
114#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
115/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
116#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
117
Simon Glassfb64e362020-05-10 11:40:09 -0600118#include <linux/stringify.h>
Oliver Grautedafcd992019-09-20 07:08:41 +0000119#endif /* __IMX8QM_ROM7720_H */