Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Marek Vasut | d086918 | 2016-05-26 18:01:37 +0200 | [diff] [blame] | 2 | /* |
| 3 | * include/asm-arm/unified.h - Unified Assembler Syntax helper macros |
| 4 | * |
| 5 | * Copyright (C) 2008 ARM Limited |
Marek Vasut | d086918 | 2016-05-26 18:01:37 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_UNIFIED_H |
| 9 | #define __ASM_UNIFIED_H |
| 10 | |
| 11 | #if defined(__ASSEMBLY__) && defined(CONFIG_ARM_ASM_UNIFIED) |
| 12 | .syntax unified |
| 13 | #endif |
| 14 | |
| 15 | #ifdef CONFIG_CPU_V7M |
| 16 | #define AR_CLASS(x...) |
| 17 | #define M_CLASS(x...) x |
| 18 | #else |
| 19 | #define AR_CLASS(x...) x |
| 20 | #define M_CLASS(x...) |
| 21 | #endif |
| 22 | |
| 23 | #ifdef CONFIG_THUMB2_KERNEL |
| 24 | |
| 25 | #if __GNUC__ < 4 |
| 26 | #error Thumb-2 kernel requires gcc >= 4 |
| 27 | #endif |
| 28 | |
| 29 | /* The CPSR bit describing the instruction set (Thumb) */ |
| 30 | #define PSR_ISETSTATE PSR_T_BIT |
| 31 | |
| 32 | #define ARM(x...) |
| 33 | #define THUMB(x...) x |
| 34 | #ifdef __ASSEMBLY__ |
| 35 | #define W(instr) instr.w |
| 36 | #else |
| 37 | #define WASM(instr) #instr ".w" |
| 38 | #endif |
| 39 | |
| 40 | #else /* !CONFIG_THUMB2_KERNEL */ |
| 41 | |
| 42 | /* The CPSR bit describing the instruction set (ARM) */ |
| 43 | #define PSR_ISETSTATE 0 |
| 44 | |
| 45 | #define ARM(x...) x |
| 46 | #define THUMB(x...) |
| 47 | #ifdef __ASSEMBLY__ |
| 48 | #define W(instr) instr |
| 49 | #else |
| 50 | #define WASM(instr) #instr |
| 51 | #endif |
| 52 | |
| 53 | #endif /* CONFIG_THUMB2_KERNEL */ |
| 54 | |
| 55 | #ifndef CONFIG_ARM_ASM_UNIFIED |
| 56 | |
| 57 | /* |
| 58 | * If the unified assembly syntax isn't used (in ARM mode), these |
| 59 | * macros expand to an empty string |
| 60 | */ |
| 61 | #ifdef __ASSEMBLY__ |
| 62 | .macro it, cond |
| 63 | .endm |
| 64 | .macro itt, cond |
| 65 | .endm |
| 66 | .macro ite, cond |
| 67 | .endm |
| 68 | .macro ittt, cond |
| 69 | .endm |
| 70 | .macro itte, cond |
| 71 | .endm |
| 72 | .macro itet, cond |
| 73 | .endm |
| 74 | .macro itee, cond |
| 75 | .endm |
| 76 | .macro itttt, cond |
| 77 | .endm |
| 78 | .macro ittte, cond |
| 79 | .endm |
| 80 | .macro ittet, cond |
| 81 | .endm |
| 82 | .macro ittee, cond |
| 83 | .endm |
| 84 | .macro itett, cond |
| 85 | .endm |
| 86 | .macro itete, cond |
| 87 | .endm |
| 88 | .macro iteet, cond |
| 89 | .endm |
| 90 | .macro iteee, cond |
| 91 | .endm |
| 92 | #else /* !__ASSEMBLY__ */ |
| 93 | __asm__( |
| 94 | " .macro it, cond\n" |
| 95 | " .endm\n" |
| 96 | " .macro itt, cond\n" |
| 97 | " .endm\n" |
| 98 | " .macro ite, cond\n" |
| 99 | " .endm\n" |
| 100 | " .macro ittt, cond\n" |
| 101 | " .endm\n" |
| 102 | " .macro itte, cond\n" |
| 103 | " .endm\n" |
| 104 | " .macro itet, cond\n" |
| 105 | " .endm\n" |
| 106 | " .macro itee, cond\n" |
| 107 | " .endm\n" |
| 108 | " .macro itttt, cond\n" |
| 109 | " .endm\n" |
| 110 | " .macro ittte, cond\n" |
| 111 | " .endm\n" |
| 112 | " .macro ittet, cond\n" |
| 113 | " .endm\n" |
| 114 | " .macro ittee, cond\n" |
| 115 | " .endm\n" |
| 116 | " .macro itett, cond\n" |
| 117 | " .endm\n" |
| 118 | " .macro itete, cond\n" |
| 119 | " .endm\n" |
| 120 | " .macro iteet, cond\n" |
| 121 | " .endm\n" |
| 122 | " .macro iteee, cond\n" |
| 123 | " .endm\n"); |
| 124 | #endif /* __ASSEMBLY__ */ |
| 125 | |
| 126 | #endif /* CONFIG_ARM_ASM_UNIFIED */ |
| 127 | |
| 128 | #endif /* !__ASM_UNIFIED_H */ |