blob: be17aad29ee6009e9bcf4eacf9881b850ce3790e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chandan Nath98b036e2011-10-14 02:58:24 +00002/*
3 * sys_proto.h
4 *
5 * System information header
6 *
7 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
Chandan Nath98b036e2011-10-14 02:58:24 +00008 */
9
10#ifndef _SYS_PROTO_H_
11#define _SYS_PROTO_H_
pekon gupta5bbb0992013-11-22 16:53:29 +053012#include <linux/mtd/omap_gpmc.h>
Tom Rini52437072013-08-30 16:28:46 -040013#include <asm/arch/cpu.h>
Chandan Nath98b036e2011-10-14 02:58:24 +000014
Chandan Nath98b036e2011-10-14 02:58:24 +000015u32 get_cpu_rev(void);
16u32 get_sysboot_value(void);
17
Satyanarayana, Sandhya11784752012-08-09 18:29:57 +000018extern struct ctrl_stat *cstat;
Chandan Nath98b036e2011-10-14 02:58:24 +000019u32 get_device_type(void);
Tom Rini51df26c2013-05-31 12:31:59 -040020void save_omap_boot_params(void);
Lokesh Vutlad33266b2016-10-14 10:35:24 +053021void setup_early_clocks(void);
Chandan Nath77a73fe2012-01-09 20:38:59 +000022void setup_clocks_for_console(void);
Heiko Schocher0ef08172013-06-04 11:01:06 +020023void mpu_pll_config_val(int mpull_m);
Tom Rini034aba72012-07-03 09:20:06 -070024void ddr_pll_config(unsigned int ddrpll_M);
Tom Rini7a247722012-07-31 10:50:01 -070025
Ilya Yanok2ebbb862012-11-06 13:06:30 +000026void sdelay(unsigned long);
Tom Rini8eb48ff2013-03-14 11:15:25 +000027
Ilya Yanok2ebbb862012-11-06 13:06:30 +000028void gpmc_init(void);
Ladislav Michld5b1c272016-07-12 20:28:16 +020029void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs, u32 base,
Mark Jackson7808e1e2013-02-18 01:26:29 +000030 u32 size);
Ladislav Michld3bc9852017-03-06 13:54:30 +010031int omap_nand_switch_ecc(uint32_t, uint32_t);
Heiko Schocher8aa1da92013-06-05 07:47:56 +020032
Heiko Schocherb21f2ac2013-07-30 10:48:54 +053033void set_uart_mux_conf(void);
34void set_mux_conf_regs(void);
35void sdram_init(void);
Lokesh Vutla89a83bf2013-07-30 10:48:52 +053036u32 wait_on_value(u32, u32, void *, u32);
Heiko Schocherb21f2ac2013-07-30 10:48:54 +053037#ifdef CONFIG_NOR_BOOT
38void enable_norboot_pin_mux(void);
39#endif
Tom Riniac8fdf92013-08-30 16:28:44 -040040void am33xx_spl_board_init(void);
Tom Rini52437072013-08-30 16:28:46 -040041int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev);
Felix Brack17705ac2017-10-11 18:42:23 +020042int am335x_get_mpu_vdd(int sil_rev, int frequency);
Tom Rini52437072013-08-30 16:28:46 -040043int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency);
Chandan Nath98b036e2011-10-14 02:58:24 +000044#endif
Kishon Vijay Abraham I3dacf662015-08-19 16:16:26 +053045
46void enable_usb_clocks(int index);
47void disable_usb_clocks(int index);
Lokesh Vutla93e0f5b2016-10-14 10:35:25 +053048void do_board_detect(void);
Lokesh Vutla6302e532017-05-05 12:59:10 +053049u32 get_sys_clk_index(void);