| Michal Simek | 8aad25c | 2018-03-28 15:09:32 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ZYNQMP=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x8000000 |
| 4 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| 5 | # CONFIG_SPL_LIBDISK_SUPPORT is not set |
| 6 | CONFIG_SPL=y |
| 7 | CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1254 revA" |
| 8 | # CONFIG_SPL_FAT_SUPPORT is not set |
| 9 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1254-revA" |
| 10 | CONFIG_DEBUG_UART=y |
| 11 | CONFIG_DISTRO_DEFAULTS=y |
| 12 | CONFIG_FIT=y |
| 13 | CONFIG_FIT_VERBOSE=y |
| 14 | CONFIG_SPL_LOAD_FIT=y |
| 15 | # CONFIG_DISPLAY_CPUINFO is not set |
| 16 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 17 | CONFIG_SPL_OS_BOOT=y |
| 18 | CONFIG_SPL_RAM_SUPPORT=y |
| 19 | CONFIG_SPL_RAM_DEVICE=y |
| 20 | CONFIG_SPL_ATF=y |
| 21 | CONFIG_SYS_PROMPT="ZynqMP> " |
| 22 | CONFIG_CMD_MEMTEST=y |
| 23 | CONFIG_CMD_CLK=y |
| 24 | # CONFIG_CMD_FLASH is not set |
| 25 | CONFIG_CMD_FPGA_LOADBP=y |
| 26 | CONFIG_CMD_FPGA_LOADP=y |
| 27 | # CONFIG_CMD_NET is not set |
| Michal Simek | 8aad25c | 2018-03-28 15:09:32 +0200 | [diff] [blame] | 28 | CONFIG_CMD_TIME=y |
| 29 | CONFIG_CMD_TIMER=y |
| 30 | CONFIG_SPL_OF_CONTROL=y |
| 31 | CONFIG_OF_EMBED=y |
| 32 | CONFIG_SPL_DM=y |
| 33 | # CONFIG_BLK is not set |
| 34 | CONFIG_CLK_ZYNQMP=y |
| 35 | CONFIG_FPGA_XILINX=y |
| 36 | CONFIG_FPGA_ZYNQMPPL=y |
| 37 | CONFIG_MISC=y |
| 38 | CONFIG_DM_MMC=y |
| 39 | CONFIG_SPI_FLASH=y |
| 40 | CONFIG_SPI_FLASH_BAR=y |
| 41 | CONFIG_SF_DUAL_FLASH=y |
| 42 | CONFIG_SPI_FLASH_MACRONIX=y |
| 43 | CONFIG_SPI_FLASH_SPANSION=y |
| 44 | CONFIG_SPI_FLASH_STMICRO=y |
| 45 | CONFIG_SPI_FLASH_WINBOND=y |
| 46 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| 47 | CONFIG_DEBUG_UART_ZYNQ=y |
| 48 | CONFIG_DEBUG_UART_BASE=0xff000000 |
| 49 | CONFIG_DEBUG_UART_CLOCK=100000000 |
| 50 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 51 | CONFIG_ZYNQ_SERIAL=y |
| 52 | CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |