blob: d778b8d8d056386cf3b70de068f4b2ee10bafaa8 [file] [log] [blame]
Patrice Chotardca7289e2023-10-27 16:43:03 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
2/*
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4 */
5
6#include "stm32mp25-u-boot.dtsi"
7
Patrice Chotardf67606c2025-04-01 15:14:12 +02008/ {
Patrice Chotard46da95f2025-04-23 09:45:02 +02009 config {
Patrick Delaunay3a4fa452022-07-26 19:26:16 +020010 u-boot,boot-led = "led-blue";
Patrice Chotard46da95f2025-04-23 09:45:02 +020011 u-boot,mmc-env-partition = "u-boot-env";
12 };
13
Patrice Chotardf67606c2025-04-01 15:14:12 +020014 clocks {
15 ck_flexgen_08: ck-flexgen-08 {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
18 clock-frequency = <64000000>;
19 };
20
Patrice Chotardcaf39382025-04-04 18:20:32 +020021 ck_flexgen_51: ck-flexgen-51 {
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <200000000>;
25 };
26
Patrice Chotardf67606c2025-04-01 15:14:12 +020027 ck_icn_ls_mcu: ck-icn-ls-mcu {
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <200000000>;
31 };
32 };
33};
34
35&gpioa {
36 clocks = <&ck_icn_ls_mcu>;
37};
38
39&gpiob {
40 clocks = <&ck_icn_ls_mcu>;
41};
42
43&gpioc {
44 clocks = <&ck_icn_ls_mcu>;
45};
46
47&gpiod {
48 clocks = <&ck_icn_ls_mcu>;
49};
50
51&gpioe {
52 clocks = <&ck_icn_ls_mcu>;
53};
54
55&gpiof {
56 clocks = <&ck_icn_ls_mcu>;
57};
58
59&gpiog {
60 clocks = <&ck_icn_ls_mcu>;
61};
62
63&gpioh {
64 clocks = <&ck_icn_ls_mcu>;
65};
66
67&gpioi {
68 clocks = <&ck_icn_ls_mcu>;
69};
70
71&gpioj {
72 clocks = <&ck_icn_ls_mcu>;
73};
74
75&gpiok {
76 clocks = <&ck_icn_ls_mcu>;
77};
78
79&gpioz {
80 clocks = <&ck_icn_ls_mcu>;
81};
82
Patrice Chotardcaf39382025-04-04 18:20:32 +020083&sdmmc1 {
84 clocks = <&ck_flexgen_51>;
85 /delete-property/resets;
86};
87
Patrice Chotardca7289e2023-10-27 16:43:03 +020088&usart2 {
89 bootph-all;
Patrice Chotardf67606c2025-04-01 15:14:12 +020090 clocks = <&ck_flexgen_08>;
Patrice Chotardca7289e2023-10-27 16:43:03 +020091};
92
93&usart2_pins_a {
94 bootph-all;
95 pins1 {
96 bootph-all;
97 };
98 pins2 {
99 bootph-all;
100 };
101};