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git01.mediatek.com / filogic / uboot / cad18b87ed93cddacd9976ed9c60cda1475bcea7 / . / arch / arm / dts / tegra20-medcom-wide.dts
blob: b6b57abdef94f9b2f79a7a44c860bab3919c8e3e [file] [log] [blame]
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrene41e11b2013-02-21 12:31:28 +0000[diff] [blame]3#include "tegra20-tamonten.dtsi"
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]4
5/ {
6 model = "Avionic Design Medcom-Wide";
Thierry Reding98a2a7a2012-09-19 00:37:21 +0000[diff] [blame]7 compatible = "ad,medcom-wide", "nvidia,tegra20";
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uartd;
11 };
12
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]13 aliases {
14 usb0 = "/usb@c5008000";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]15 sdhci0 = "/sdhci@c8000600";
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]16 };
17
18 memory {
19 reg = <0x00000000 0x20000000>;
20 };
21
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]22 host1x {
23 status = "okay";
24
25 dc@54200000 {
26 status = "okay";
27
28 rgb {
29 nvidia,panel = <&lcd_panel>;
30 status = "okay";
31 };
32 };
33 };
34
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]35 serial@70006300 {
36 clock-frequency = <216000000>;
37 };
38
39 i2c@7000c000 {
40 status = "disabled";
41 };
42
43 i2c@7000c400 {
44 status = "disabled";
45 };
46
47 i2c@7000c500 {
48 status = "disabled";
49 };
50
51 i2c@7000d000 {
52 status = "disabled";
53 };
54
55 usb@c5000000 {
56 status = "disabled";
57 };
58
59 usb@c5004000 {
60 status = "disabled";
61 };
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]62
63 lcd_panel: panel {
64 clock = <61715000>;
65 xres = <1366>;
66 yres = <768>;
67 left-margin = <2>;
68 right-margin = <47>;
69 hsync-len = <136>;
70 lower-margin = <21>;
71 upper-margin = <11>;
72 vsync-len = <4>;
73
74 nvidia,bits-per-pixel = <16>;
75 nvidia,pwm = <&pwm 0 500000>;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]76 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
77 GPIO_ACTIVE_HIGH>;
78 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
79 GPIO_ACTIVE_HIGH>;
80 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
81 GPIO_ACTIVE_HIGH>;
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]82 nvidia,panel-timings = <0 0 0 0>;
83 };
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]84};