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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn <gj@denx.de>
4 *
5 * Configuation settings for the TRAB board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * If we are developing, we might want to start armboot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
32 */
33#define CONFIG_INIT_CRITICAL /* undef for developing */
34
35/*
36 * High Level Configuration Options
37 * (easy to change)
38 */
39#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
wdenkca9bc762003-07-15 07:45:49 +000040#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
41#define CONFIG_TRAB 1 /* on a TRAB Board */
42#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
wdenkc6097192002-11-03 00:24:07 +000043
44/* input clock of PLL */
wdenk1272e232002-11-10 22:06:23 +000045#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
wdenkc6097192002-11-03 00:24:07 +000046
47#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
48
49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
wdenkca9bc762003-07-15 07:45:49 +000053
54/***********************************************************
55 * I2C stuff:
56 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
57 * address 0x54 with 8bit addressing
58 ***********************************************************/
59#define CONFIG_HARD_I2C /* I2C with hardware support */
60#define CFG_I2C_SPEED 100000 /* I2C speed */
61#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
62
63#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
64#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
65
66#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
67#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
68#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
69
wdenkc6097192002-11-03 00:24:07 +000070/*
71 * Size of malloc() pool
72 */
wdenk699b13a2002-11-03 18:03:52 +000073#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenkc6097192002-11-03 00:24:07 +000074
75/*
76 * Hardware drivers
77 */
78#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
79#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
80#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
81
wdenkca9bc762003-07-15 07:45:49 +000082#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
83
wdenkc6097192002-11-03 00:24:07 +000084#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
85#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
86
87/*
88 * select serial console configuration
89 */
wdenkca9bc762003-07-15 07:45:49 +000090#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
wdenkc6097192002-11-03 00:24:07 +000091
92#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
93
94#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
95
96#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
97
98/*
99 * The following enables modem debugging stuff. The dbg() and
100 * 'char screen[1024]' are used for debug printfs. Unfortunately,
101 * it is usable only from BDI
102 */
103#undef CONFIG_MODEM_SUPPORT_DEBUG
104
105/* allow to overwrite serial and ethaddr */
106#define CONFIG_ENV_OVERWRITE
107
108#define CONFIG_BAUDRATE 115200
109
110#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
111
wdenk7539dea2003-06-19 23:01:32 +0000112/* Use s3c2400's RTC */
113#define CONFIG_RTC_S3C24X0 1
114
wdenkc6097192002-11-03 00:24:07 +0000115#ifdef CONFIG_HWFLOW
116#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
117#else
118#define CONFIG_COMMANDS_ADD_HWFLOW 0
119#endif
120
121#ifdef CONFIG_VFD
122#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
123#else
124#define CONFIG_COMMANDS_ADD_VFD 0
125#endif
126
wdenkca9bc762003-07-15 07:45:49 +0000127#ifdef CONFIG_DRIVER_S3C24X0_I2C
128#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
129#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
130#else
131#define CONFIG_COMMANDS_ADD_EEPROM 0
132#define CONFIG_COMMANDS_I2C 0
133#endif
134
wdenkc6097192002-11-03 00:24:07 +0000135#ifndef USE_920T_MMU
136#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
137 CFG_CMD_BSP | \
wdenk7539dea2003-06-19 23:01:32 +0000138 CFG_CMD_DATE | \
wdenkc6097192002-11-03 00:24:07 +0000139 CONFIG_COMMANDS_ADD_HWFLOW | \
wdenkca9bc762003-07-15 07:45:49 +0000140 CONFIG_COMMANDS_ADD_VFD | \
141 CONFIG_COMMANDS_ADD_EEPROM | \
142 CONFIG_COMMANDS_I2C )
wdenkc6097192002-11-03 00:24:07 +0000143#else
144#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
145 CFG_CMD_BSP | \
wdenk7539dea2003-06-19 23:01:32 +0000146 CFG_CMD_DATE | \
wdenkc6097192002-11-03 00:24:07 +0000147 CONFIG_COMMANDS_ADD_HWFLOW | \
wdenkca9bc762003-07-15 07:45:49 +0000148 CONFIG_COMMANDS_ADD_VFD | \
149 CONFIG_COMMANDS_ADD_EEPROM | \
150 CONFIG_COMMANDS_I2C )
wdenkc6097192002-11-03 00:24:07 +0000151#endif
152
153/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
154#include <cmd_confdefs.h>
155
wdenkc6097192002-11-03 00:24:07 +0000156#define CONFIG_BOOTDELAY 5
wdenk6bd7b5d2003-05-21 20:26:20 +0000157#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
wdenkc6097192002-11-03 00:24:07 +0000158#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
wdenkca9bc762003-07-15 07:45:49 +0000159#define CONFIG_BOOTARGS "console=ttyS0"
160#define CONFIG_NETMASK 255.255.0.0
wdenk4fc95692003-02-28 00:49:47 +0000161#define CONFIG_IPADDR 192.168.3.68
wdenk4a5c8a72003-03-06 00:02:04 +0000162#define CONFIG_HOSTNAME trab
wdenkc6097192002-11-03 00:24:07 +0000163#define CONFIG_SERVERIP 192.168.3.1
164#define CONFIG_BOOTCOMMAND "run flash_nfs"
wdenkcc1e2562003-03-06 13:39:27 +0000165
166#ifndef CONFIG_BIG_FLASH
wdenkc6097192002-11-03 00:24:07 +0000167#define CONFIG_EXTRA_ENV_SETTINGS \
168 "nfs_args=setenv bootargs root=/dev/nfs rw " \
169 "nfsroot=$(serverip):$(rootpath)\0" \
170 "rootpath=/opt/eldk/arm_920TDI\0" \
171 "ram_args=setenv bootargs root=/dev/ram rw\0" \
172 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
173 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
174 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
175 "load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
wdenke95b61c2002-11-04 16:02:40 +0000176 "update=protect off 1:0-8;era 1:0-8;cp.b 0xc100000 0 $(filesize);" \
wdenkc6097192002-11-03 00:24:07 +0000177 "setenv filesize;saveenv\0" \
wdenkcc1e2562003-03-06 13:39:27 +0000178 "loadfile=/tftpboot/TRAB/uImage\0" \
wdenkc6097192002-11-03 00:24:07 +0000179 "loadaddr=c400000\0" \
180 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
181 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
182 "kernel_addr=00040000\0" \
183 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
184 "mdm_init1=ATZ\0" \
185 "mdm_init2=ATS0=1\0" \
186 "mdm_flow_control=rts/cts\0"
wdenkcc1e2562003-03-06 13:39:27 +0000187#else /* CONFIG_BIG_FLASH */
188#define CONFIG_EXTRA_ENV_SETTINGS \
189 "nfs_args=setenv bootargs root=/dev/nfs rw " \
190 "nfsroot=$(serverip):$(rootpath)\0" \
191 "rootpath=/opt/eldk/arm_920TDI\0" \
192 "ram_args=setenv bootargs root=/dev/ram rw\0" \
193 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
194 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
195 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
196 "load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
197 "update=protect off 1:0;era 1:0;cp.b 0xc100000 0 $(filesize)\0" \
198 "loadfile=/tftpboot/TRAB/uImage\0" \
199 "loadaddr=c400000\0" \
200 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
201 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
202 "kernel_addr=00040000\0" \
203 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
204 "mdm_init1=ATZ\0" \
205 "mdm_init2=ATS0=1\0" \
206 "mdm_flow_control=rts/cts\0"
207#endif /* CONFIG_BIG_FLASH */
wdenkc6097192002-11-03 00:24:07 +0000208
209#if 0 /* disabled for development */
210#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
211#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
212#define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
213#endif
214
215#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
216#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
217/* what's this ? it's not used anywhere */
218#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
219#endif
220
221/*
222 * Miscellaneous configurable options
223 */
224#define CFG_LONGHELP /* undef to save memory */
225#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
wdenkca9bc762003-07-15 07:45:49 +0000226/* #define CFG_HUSH_PARSER 1 */ /* use "hush" command parser */
227#ifdef CFG_HUSH_PARSER
228#define CFG_PROMPT_HUSH_PS2 "> "
229#endif
230
wdenkc6097192002-11-03 00:24:07 +0000231#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
232#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
233#define CFG_MAXARGS 16 /* max number of command args */
234#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
235
236#define CFG_MEMTEST_START 0x0c000000 /* memtest works on */
237#define CFG_MEMTEST_END 0x0d000000 /* 16 MB in DRAM */
238
wdenkca9bc762003-07-15 07:45:49 +0000239#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
wdenkc6097192002-11-03 00:24:07 +0000240
241#define CFG_LOAD_ADDR 0x0cf00000 /* default load address */
242
243#ifdef CONFIG_TRAB_50MHZ
244/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
245/* it to wrap 100 times (total 1562500) to get 1 sec. */
246/* this should _really_ be calculated !! */
247#define CFG_HZ 1562500
248#else
249/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
250/* it to wrap 100 times (total 1039000) to get 1 sec. */
251/* this should _really_ be calculated !! */
252#define CFG_HZ 1039000
253#endif
254
255/* valid baudrates */
256#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
257
258#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
259
260/*-----------------------------------------------------------------------
261 * Stack sizes
262 *
263 * The stack sizes are set up in start.S using the settings below
264 */
265#define CONFIG_STACKSIZE (128*1024) /* regular stack */
266#ifdef CONFIG_USE_IRQ
267#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
268#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
269#endif
270
271/*-----------------------------------------------------------------------
272 * Physical Memory Map
273 */
wdenkca9bc762003-07-15 07:45:49 +0000274#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
275#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
276#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
wdenkc6097192002-11-03 00:24:07 +0000277
wdenkca9bc762003-07-15 07:45:49 +0000278#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
wdenkc6097192002-11-03 00:24:07 +0000279
280/* The following #defines are needed to get flash environment right */
wdenk4fc95692003-02-28 00:49:47 +0000281#define CFG_MONITOR_BASE CFG_FLASH_BASE
wdenkcc1e2562003-03-06 13:39:27 +0000282#ifndef CONFIG_BIG_FLASH
wdenkc6097192002-11-03 00:24:07 +0000283#define CFG_MONITOR_LEN (256 << 10)
wdenkcc1e2562003-03-06 13:39:27 +0000284#else
285#define CFG_MONITOR_LEN (128 << 10)
286#endif
wdenkc6097192002-11-03 00:24:07 +0000287
wdenkc6097192002-11-03 00:24:07 +0000288/*-----------------------------------------------------------------------
289 * FLASH and environment organization
290 */
291#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenk4a5c8a72003-03-06 00:02:04 +0000292#ifndef CONFIG_BIG_FLASH
293#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
294#else
wdenk4fc95692003-02-28 00:49:47 +0000295#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenk4a5c8a72003-03-06 00:02:04 +0000296#endif
wdenkc6097192002-11-03 00:24:07 +0000297
298/* timeout values are in ticks */
299#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
300#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
301
302#define CFG_ENV_IS_IN_FLASH 1
303
304/* Address and size of Primary Environment Sector */
wdenk4a5c8a72003-03-06 00:02:04 +0000305#ifndef CONFIG_BIG_FLASH
wdenk4fc95692003-02-28 00:49:47 +0000306#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
wdenkc6097192002-11-03 00:24:07 +0000307#define CFG_ENV_SIZE 0x4000
wdenk4a5c8a72003-03-06 00:02:04 +0000308#define CFG_ENV_SECT_SIZE 0x4000
309#else
wdenkcc1e2562003-03-06 13:39:27 +0000310#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000)
wdenk4a5c8a72003-03-06 00:02:04 +0000311#define CFG_ENV_SIZE 0x4000
312#define CFG_ENV_SECT_SIZE 0x20000
313#endif
wdenkc6097192002-11-03 00:24:07 +0000314
315/* Address and size of Redundant Environment Sector */
wdenk4a5c8a72003-03-06 00:02:04 +0000316#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
wdenkc6097192002-11-03 00:24:07 +0000317#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
318
wdenk1fe2c702003-03-06 21:55:29 +0000319/* Initial value of the on-board touch screen brightness */
320#define CFG_BRIGHTNESS 0x20
321
wdenkc6097192002-11-03 00:24:07 +0000322#endif /* __CONFIG_H */