Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 2 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 3 | CONFIG_ARCH_ROCKCHIP=y |
Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 4 | CONFIG_SYS_TEXT_BASE=0x00100000 |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 5 | CONFIG_ROCKCHIP_RK3288=y |
Tom Rini | 9834b90 | 2017-03-13 13:48:42 -0400 | [diff] [blame] | 6 | # CONFIG_SPL_MMC_SUPPORT is not set |
Tom Rini | c9285bf | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 7 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
Tom Rini | fdc7e36 | 2019-11-11 20:04:24 -0500 | [diff] [blame] | 8 | CONFIG_NR_DRAM_BANKS=1 |
Tom Rini | e0056d7 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 9 | CONFIG_DEBUG_UART_BASE=0xff690000 |
10 | CONFIG_DEBUG_UART_CLOCK=24000000 | ||||
Simon Glass | 219d612 | 2016-09-12 23:18:57 -0600 | [diff] [blame] | 11 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
Simon Glass | b24fdca | 2016-09-12 23:18:58 -0600 | [diff] [blame] | 12 | CONFIG_SPL_SPI_SUPPORT=y |
Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 13 | CONFIG_DEBUG_UART=y |
Tom Rini | 527ded8 | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 14 | CONFIG_SPL_TEXT_BASE=0xff704000 |
Simon Glass | 4be229d | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 15 | CONFIG_USE_PREBOOT=y |
Simon Glass | 4458d3b | 2016-10-17 20:12:35 -0600 | [diff] [blame] | 16 | CONFIG_SILENT_CONSOLE=y |
Simon Glass | b7e0e85 | 2018-12-27 20:15:23 -0700 | [diff] [blame] | 17 | CONFIG_LOG=y |
Klaus Goger | 2b6b4f2 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 18 | CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" |
Simon Glass | 9fd2a02 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 19 | # CONFIG_DISPLAY_CPUINFO is not set |
Mario Six | f705544 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 20 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Simon Glass | e608ced | 2017-05-31 17:57:33 -0600 | [diff] [blame] | 21 | CONFIG_BOARD_EARLY_INIT_F=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 22 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 23 | CONFIG_SPL_STACK_R=y |
Simon Glass | 3b4057b | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 24 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 25 | # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set |
26 | # CONFIG_SPL_CRC32_SUPPORT is not set | ||||
27 | CONFIG_SPL_PAYLOAD="u-boot.img" | ||||
Marek Vasut | e254225 | 2018-04-07 16:05:27 +0200 | [diff] [blame] | 28 | CONFIG_SPL_SPI_LOAD=y |
Hannes Schmelzer | 38df997 | 2019-08-22 15:41:46 +0200 | [diff] [blame] | 29 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 30 | CONFIG_CMD_GPIO=y |
Patrick Delaunay | 7328709 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 31 | CONFIG_CMD_GPT=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 32 | CONFIG_CMD_I2C=y |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 33 | CONFIG_CMD_MMC=y |
Simon Glass | 86b1b65 | 2017-08-04 16:34:46 -0600 | [diff] [blame] | 34 | CONFIG_CMD_SF_TEST=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 35 | CONFIG_CMD_SPI=y |
Eddie Cai | b3501fe | 2017-12-15 08:17:13 +0800 | [diff] [blame] | 36 | CONFIG_CMD_USB=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 37 | # CONFIG_CMD_SETEXPR is not set |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 38 | CONFIG_CMD_CACHE=y |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 39 | CONFIG_CMD_TIME=y |
Simon Glass | b7e0e85 | 2018-12-27 20:15:23 -0700 | [diff] [blame] | 40 | CONFIG_CMD_SOUND=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 41 | CONFIG_CMD_PMIC=y |
42 | CONFIG_CMD_REGULATOR=y | ||||
Patrick Delaunay | f7e0772 | 2017-01-27 11:00:37 +0100 | [diff] [blame] | 43 | # CONFIG_SPL_DOS_PARTITION is not set |
Patrick Delaunay | 8a4f2bd | 2017-01-27 11:00:41 +0100 | [diff] [blame] | 44 | # CONFIG_SPL_EFI_PARTITION is not set |
Patrick Delaunay | 7328709 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 45 | CONFIG_SPL_PARTITION_UUIDS=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 46 | CONFIG_SPL_OF_CONTROL=y |
Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 47 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" |
Simon Glass | 9599461 | 2016-11-13 14:22:09 -0700 | [diff] [blame] | 48 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 49 | CONFIG_SPL_OF_PLATDATA=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame^] | 50 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 51 | CONFIG_REGMAP=y |
huang lin | dd8515e | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 52 | CONFIG_SPL_REGMAP=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 53 | CONFIG_SYSCON=y |
Simon Glass | 3b4057b | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 54 | CONFIG_SPL_SYSCON=y |
Simon Glass | 70bad91 | 2016-01-21 19:43:49 -0700 | [diff] [blame] | 55 | # CONFIG_SPL_SIMPLE_BUS is not set |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 56 | # CONFIG_SPL_BLK is not set |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 57 | CONFIG_CLK=y |
58 | CONFIG_SPL_CLK=y | ||||
59 | CONFIG_ROCKCHIP_GPIO=y | ||||
Simon Glass | cf88b7c | 2016-01-21 19:44:13 -0700 | [diff] [blame] | 60 | CONFIG_I2C_CROS_EC_TUNNEL=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 61 | CONFIG_SYS_I2C_ROCKCHIP=y |
Simon Glass | cf88b7c | 2016-01-21 19:44:13 -0700 | [diff] [blame] | 62 | CONFIG_I2C_MUX=y |
Simon Glass | 9fd2a02 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 63 | CONFIG_DM_KEYBOARD=y |
Simon Glass | cf88b7c | 2016-01-21 19:44:13 -0700 | [diff] [blame] | 64 | CONFIG_CROS_EC_KEYB=y |
Simon Glass | cf88b7c | 2016-01-21 19:44:13 -0700 | [diff] [blame] | 65 | CONFIG_CROS_EC=y |
66 | CONFIG_CROS_EC_SPI=y | ||||
Simon Glass | af0b744 | 2016-01-21 19:43:36 -0700 | [diff] [blame] | 67 | CONFIG_PWRSEQ=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 68 | # CONFIG_SPL_DM_MMC is not set |
Masahiro Yamada | 7942e91 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 69 | CONFIG_MMC_DW=y |
Masahiro Yamada | dc607f8 | 2017-01-10 13:32:03 +0900 | [diff] [blame] | 70 | CONFIG_MMC_DW_ROCKCHIP=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 71 | CONFIG_SF_DEFAULT_BUS=2 |
Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 72 | CONFIG_SF_DEFAULT_SPEED=20000000 |
Urja Rannikko | 7a19eec | 2019-05-13 13:51:03 +0000 | [diff] [blame] | 73 | CONFIG_SPI_FLASH_GIGADEVICE=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 74 | CONFIG_PINCTRL=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 75 | CONFIG_PINCONF=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 76 | CONFIG_SPL_PINCTRL=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 77 | # CONFIG_SPL_PINMUX is not set |
78 | CONFIG_SPL_PINCONF=y | ||||
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 79 | CONFIG_DM_PMIC=y |
Simon Glass | cf88b7c | 2016-01-21 19:44:13 -0700 | [diff] [blame] | 80 | # CONFIG_SPL_PMIC_CHILDREN is not set |
Jacob Chen | 614704b | 2017-05-02 14:54:52 +0800 | [diff] [blame] | 81 | CONFIG_PMIC_RK8XX=y |
Simon Glass | abd2c15 | 2016-01-21 19:45:19 -0700 | [diff] [blame] | 82 | CONFIG_DM_REGULATOR_FIXED=y |
Jacob Chen | 614704b | 2017-05-02 14:54:52 +0800 | [diff] [blame] | 83 | CONFIG_REGULATOR_RK8XX=y |
Simon Glass | abd2c15 | 2016-01-21 19:45:19 -0700 | [diff] [blame] | 84 | CONFIG_PWM_ROCKCHIP=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 85 | CONFIG_RAM=y |
86 | CONFIG_SPL_RAM=y | ||||
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 87 | CONFIG_DEBUG_UART_SHIFT=2 |
Simon Glass | b7e0e85 | 2018-12-27 20:15:23 -0700 | [diff] [blame] | 88 | CONFIG_SOUND=y |
89 | CONFIG_I2S=y | ||||
90 | CONFIG_I2S_ROCKCHIP=y | ||||
Simon Glass | 3b4057b | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 91 | CONFIG_ROCKCHIP_SPI=y |
Tom Rini | afea41d | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 92 | CONFIG_SYSRESET=y |
Tom Rini | 504997e | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 93 | CONFIG_USB=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 94 | # CONFIG_SPL_DM_USB is not set |
95 | CONFIG_USB_DWC2=y | ||||
Adam Ford | d4183d6 | 2018-01-02 10:39:52 -0600 | [diff] [blame] | 96 | CONFIG_ROCKCHIP_USB2_PHY=y |
Simon Glass | abd2c15 | 2016-01-21 19:45:19 -0700 | [diff] [blame] | 97 | CONFIG_DM_VIDEO=y |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 98 | # CONFIG_VIDEO_BPP8 is not set |
Simon Glass | d56d6eb | 2018-12-27 15:25:19 -0700 | [diff] [blame] | 99 | CONFIG_CONSOLE_TRUETYPE=y |
Anatolij Gustschin | 4601eb4 | 2016-01-25 17:17:22 +0100 | [diff] [blame] | 100 | CONFIG_DISPLAY=y |
Simon Glass | abd2c15 | 2016-01-21 19:45:19 -0700 | [diff] [blame] | 101 | CONFIG_VIDEO_ROCKCHIP=y |
eric.gao@rock-chips.com | 735ddea | 2017-04-17 22:24:23 +0800 | [diff] [blame] | 102 | CONFIG_DISPLAY_ROCKCHIP_EDP=y |
103 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | ||||
Simon Glass | d56d6eb | 2018-12-27 15:25:19 -0700 | [diff] [blame] | 104 | # CONFIG_USE_PRIVATE_LIBGCC is not set |
Urja Rannikko | 35bd7c6 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 105 | CONFIG_SPL_TINY_MEMSET=y |
Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 106 | CONFIG_CMD_DHRYSTONE=y |
107 | CONFIG_ERRNO_STR=y |