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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00002/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk38635852002-08-27 05:55:31 +00005 */
6
7/*
8 * Cache support: switch on or off, get status
9 */
wdenk38635852002-08-27 05:55:31 +000010#include <command.h>
Simon Glass1d91ba72019-11-14 12:57:37 -070011#include <cpu_func.h>
Matthew McClintocka14695e2011-05-24 10:09:05 +000012#include <linux/compiler.h>
Tom Rinica140792025-05-14 12:15:31 -060013#include <linux/string.h>
wdenk38635852002-08-27 05:55:31 +000014
Matthew McClintocka14695e2011-05-24 10:09:05 +000015static int parse_argv(const char *);
16
Simon Glassed38aef2020-05-10 11:40:03 -060017static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc,
18 char *const argv[])
wdenk38635852002-08-27 05:55:31 +000019{
20 switch (argc) {
Eric Perie86b7ba52019-07-13 14:54:58 -040021 case 2: /* on / off / flush */
Matthew McClintocka14695e2011-05-24 10:09:05 +000022 switch (parse_argv(argv[1])) {
Joe Hershberger3745b8c2012-10-03 10:56:16 +000023 case 0:
24 icache_disable();
wdenk38635852002-08-27 05:55:31 +000025 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000026 case 1:
27 icache_enable();
wdenk38635852002-08-27 05:55:31 +000028 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000029 case 2:
30 invalidate_icache_all();
Matthew McClintocka14695e2011-05-24 10:09:05 +000031 break;
Eric Perie86b7ba52019-07-13 14:54:58 -040032 default:
33 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000034 }
Joe Hershberger8cab1562012-10-03 10:56:17 +000035 break;
wdenk38635852002-08-27 05:55:31 +000036 case 1: /* get status */
Joe Hershberger3745b8c2012-10-03 10:56:16 +000037 printf("Instruction Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000038 icache_status() ? "ON" : "OFF");
39 return 0;
40 default:
Simon Glassa06dfc72011-12-10 08:44:01 +000041 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000042 }
43 return 0;
44}
45
Simon Glassed38aef2020-05-10 11:40:03 -060046static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc,
47 char *const argv[])
wdenk38635852002-08-27 05:55:31 +000048{
49 switch (argc) {
Eric Perie86b7ba52019-07-13 14:54:58 -040050 case 2: /* on / off / flush */
Matthew McClintocka14695e2011-05-24 10:09:05 +000051 switch (parse_argv(argv[1])) {
Joe Hershberger3745b8c2012-10-03 10:56:16 +000052 case 0:
53 dcache_disable();
wdenk38635852002-08-27 05:55:31 +000054 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000055 case 1:
56 dcache_enable();
Tom Rinif7732322024-06-19 15:27:59 -060057#ifdef CONFIG_SYS_NONCACHED_MEMORY
Patrice Chotarde2eb7212020-04-28 11:38:03 +020058 noncached_set_region();
Tom Rinif7732322024-06-19 15:27:59 -060059#endif
wdenk38635852002-08-27 05:55:31 +000060 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000061 case 2:
62 flush_dcache_all();
Matthew McClintocka14695e2011-05-24 10:09:05 +000063 break;
Eric Perie86b7ba52019-07-13 14:54:58 -040064 default:
65 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000066 }
Joe Hershberger3745b8c2012-10-03 10:56:16 +000067 break;
wdenk38635852002-08-27 05:55:31 +000068 case 1: /* get status */
Joe Hershberger3745b8c2012-10-03 10:56:16 +000069 printf("Data (writethrough) Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000070 dcache_status() ? "ON" : "OFF");
71 return 0;
72 default:
Simon Glassa06dfc72011-12-10 08:44:01 +000073 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000074 }
75 return 0;
wdenk38635852002-08-27 05:55:31 +000076}
77
Matthew McClintocka14695e2011-05-24 10:09:05 +000078static int parse_argv(const char *s)
wdenk38635852002-08-27 05:55:31 +000079{
Joe Hershberger3745b8c2012-10-03 10:56:16 +000080 if (strcmp(s, "flush") == 0)
81 return 2;
82 else if (strcmp(s, "on") == 0)
83 return 1;
84 else if (strcmp(s, "off") == 0)
85 return 0;
86
87 return -1;
wdenk38635852002-08-27 05:55:31 +000088}
89
wdenkf287a242003-07-01 21:06:45 +000090U_BOOT_CMD(
91 icache, 2, 1, do_icache,
Peter Tyserdfb72b82009-01-27 18:03:12 -060092 "enable or disable instruction cache",
Matthew McClintocka14695e2011-05-24 10:09:05 +000093 "[on, off, flush]\n"
94 " - enable, disable, or flush instruction cache"
wdenk57b2d802003-06-27 21:31:46 +000095);
96
wdenkf287a242003-07-01 21:06:45 +000097U_BOOT_CMD(
98 dcache, 2, 1, do_dcache,
Peter Tyserdfb72b82009-01-27 18:03:12 -060099 "enable or disable data cache",
Matthew McClintocka14695e2011-05-24 10:09:05 +0000100 "[on, off, flush]\n"
101 " - enable, disable, or flush data (writethrough) cache"
wdenk57b2d802003-06-27 21:31:46 +0000102);