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git01.mediatek.com / filogic / uboot / ca012b9b0c8611bbc1df999a95a4fd2ab3e4f03a / . / arch / arm / dts / k3-am62-verdin.dtsi
blob: 40992e7e4c3084cca1226d32c5fe8ea0a66ec949 [file] [log] [blame]
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2023 Toradex
4 *
5 * Common dtsi for Verdin AM62 SoM
6 *
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
8 */
9
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/net/ti-dp83867.h>
15
16/ {
17 chosen {
18 stdout-path = "serial2:115200n8";
19 };
20
21 aliases {
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]22 can0 = &main_mcan0;
23 can1 = &mcu_mcan0;
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]24 ethernet0 = &cpsw_port1;
25 ethernet1 = &cpsw_port2;
26 i2c0 = &main_i2c0;
27 i2c1 = &main_i2c1;
28 i2c2 = &main_i2c2;
29 i2c3 = &mcu_i2c0;
30 i2c4 = &main_i2c3;
31 mmc0 = &sdhci0;
32 mmc1 = &sdhci1;
33 mmc2 = &sdhci2;
34 rtc0 = &rtc_i2c;
35 rtc1 = &wkup_rtc0;
36 serial0 = &main_uart1;
37 serial1 = &wkup_uart0;
38 serial2 = &main_uart0;
39 serial3 = &mcu_uart0;
40 serial4 = &main_uart5;
41 usb0 = &usb0;
42 usb1 = &usb1;
43 };
44
45 verdin_gpio_keys: gpio-keys {
46 compatible = "gpio-keys";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_ctrl_wake1_mico>;
49 status = "disabled";
50
51 verdin_key_wakeup: key-wakeup {
52 debounce-interval = <10>;
53 /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
54 gpios = <&main_gpio0 32 GPIO_ACTIVE_LOW>;
55 label = "Wake-Up";
56 linux,code = <KEY_WAKEUP>;
57 wakeup-source;
58 };
59 };
60
61 memory@80000000 {
62 device_type = "memory";
63 reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */
64 };
65
66 opp-table {
67 /* Add 1.4GHz OPP. Requires VDD_CORE to be at 0.85V */
68 opp-1400000000 {
69 opp-hz = /bits/ 64 <1400000000>;
70 opp-supported-hw = <0x01 0x0004>;
71 clock-latency-ns = <6000000>;
72 };
73 };
74
75 /* Module Power Supply */
76 reg_vsodimm: regulator-vsodimm {
77 compatible = "regulator-fixed";
78 regulator-name = "+V_SODIMM";
79 };
80
81 /* Non PMIC On-module Supplies */
82 reg_3v3: regulator-3v3 {
83 compatible = "regulator-fixed";
84 regulator-max-microvolt = <3300000>;
85 regulator-min-microvolt = <3300000>;
86 regulator-name = "On-module +V3.3";
87 vin-supply = <&reg_vsodimm>;
88 };
89
90 reg_1v2_dsi: regulator-1v2-dsi {
91 compatible = "regulator-fixed";
92 regulator-max-microvolt = <1200000>;
93 regulator-min-microvolt = <1200000>;
94 regulator-name = "On-module +V1.2_DSI";
95 vin-supply = <&reg_1v8>;
96 };
97
98 /* Enabled by +V1.2_DSI */
99 reg_1v8_dsi: regulator-1v8-dsi {
100 compatible = "regulator-fixed";
101 regulator-max-microvolt = <1800000>;
102 regulator-min-microvolt = <1800000>;
103 regulator-name = "On-module +V1.8_DSI";
104 vin-supply = <&reg_1v8>;
105 };
106
107 /* Enabled by +V2.5_ETH */
108 reg_1v0_eth: regulator-1v0-eth {
109 compatible = "regulator-fixed";
110 regulator-max-microvolt = <1000000>;
111 regulator-min-microvolt = <1000000>;
112 regulator-name = "On-module +V1.0_ETH";
113 vin-supply = <&reg_1v8>;
114 };
115
116 /* Enabled by +V2.5_ETH */
117 reg_1v8_eth: regulator-1v8-eth {
118 compatible = "regulator-fixed";
119 regulator-max-microvolt = <1800000>;
120 regulator-min-microvolt = <1800000>;
121 regulator-name = "On-module +V1.8_ETH";
122 vin-supply = <&reg_1v8>;
123 };
124
125 /* Verdin SD_1 Power Supply */
126 reg_sdhc1_vmmc: regulator-sdhci1 {
127 compatible = "regulator-fixed";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_sd1_pwr_en>;
130 enable-active-high;
131 /* Verdin SD_1_PWR_EN (SODIMM 76) */
132 gpio = <&main_gpio0 29 GPIO_ACTIVE_HIGH>;
133 off-on-delay-us = <100000>;
134 regulator-max-microvolt = <3300000>;
135 regulator-min-microvolt = <3300000>;
136 regulator-name = "+V3.3_SD";
137 startup-delay-us = <2000>;
138 };
139
140 reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {
141 compatible = "regulator-gpio";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_vsel_sd>;
144 /* PMIC_VSEL_SD */
145 gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
146 regulator-name = "LDO1-VSEL-SD (PMIC)";
147 regulator-min-microvolt = <1800000>;
148 regulator-max-microvolt = <3300000>;
149 states = <1800000 0x0>,
150 <3300000 0x1>;
151 vin-supply = <&reg_sd_3v3_1v8>;
152 };
153
154 reserved-memory {
155 #address-cells = <2>;
156 #size-cells = <2>;
157 ranges;
158
159 secure_tfa_ddr: tfa@9e780000 {
160 reg = <0x00 0x9e780000 0x00 0x80000>;
161 alignment = <0x1000>;
162 no-map;
163 };
164
165 secure_ddr: optee@9e800000 {
166 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
167 alignment = <0x1000>;
168 no-map;
169 };
170
171 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
172 compatible = "shared-dma-pool";
173 reg = <0x00 0x9db00000 0x00 0xc00000>;
174 no-map;
175 };
176 };
177};
178
179&main_pmx0 {
180 /* Verdin PWM_1 */
181 pinctrl_epwm0_a: main-epwm0a-default-pins {
182 pinctrl-single,pins = <
183 AM62X_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (A13) SPI0_CS0.EHRPWM0_A */ /* SODIMM 15 */
184 >;
185 };
186
187 /* Verdin PWM_2 */
188 pinctrl_epwm0_b: main-epwm0b-default-pins {
189 pinctrl-single,pins = <
190 AM62X_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */ /* SODIMM 16 */
191 >;
192 };
193
194 /* Verdin PWM_3_DSI */
195 pinctrl_epwm1_a: main-epwm1a-default-pins {
196 pinctrl-single,pins = <
197 AM62X_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (A14) SPI0_CLK.EHRPWM1_A */ /* SODIMM 19 */
198 >;
199 };
200
201 /* Verdin QSPI_1_CLK as GPIO (conflict with Verdin QSPI_1 interface) */
202 pinctrl_qspi1_clk_gpio: main-gpio0-0-default-pins {
203 pinctrl-single,pins = <
204 AM62X_IOPAD(0x0000, PIN_INPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */ /* SODIMM 52 */
205 >;
206 };
207
208 /* Verdin QSPI_1_IO0 as GPIO (conflict with Verdin QSPI_1 interface) */
209 pinctrl_qspi1_io0_gpio: main-gpio0-3-default-pins {
210 pinctrl-single,pins = <
211 AM62X_IOPAD(0x000c, PIN_INPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */ /* SODIMM 56 */
212 >;
213 };
214
215 /* Verdin QSPI_1_IO1 as GPIO (conflict with Verdin QSPI_1 interface) */
216 pinctrl_qspi1_io1_gpio: main-gpio0-4-default-pins {
217 pinctrl-single,pins = <
218 AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */ /* SODIMM 58 */
219 >;
220 };
221
222 /* Verdin QSPI_1_IO2 as GPIO (conflict with Verdin QSPI_1 interface) */
223 pinctrl_qspi1_io2_gpio: main-gpio0-5-default-pins {
224 pinctrl-single,pins = <
225 AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */ /* SODIMM 60 */
226 >;
227 };
228
229 /* Verdin QSPI_1_IO3 as GPIO (conflict with Verdin QSPI_1 interface) */
230 pinctrl_qspi1_io3_gpio: main-gpio0-6-default-pins {
231 pinctrl-single,pins = <
232 AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */ /* SODIMM 62 */
233 >;
234 };
235
236 /* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */
237 pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins {
238 pinctrl-single,pins = <
239 AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */
240 >;
241 };
242
243 /* Verdin QSPI_1_CS2# as GPIO (conflict with Verdin QSPI_1 interface) */
244 pinctrl_qspi1_cs2_gpio: main-gpio0-12-default-pins {
245 pinctrl-single,pins = <
246 AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */ /* SODIMM 64 */
247 >;
248 };
249
250 /* WiFi_W_WKUP_HOST# */
251 pinctrl_wifi_w_wkup_host: main-gpio0-15-default-pins {
252 pinctrl-single,pins = <
253 AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ /* SODIMM 174 */
254 >;
255 };
256
257 /* WiFi_BT_WKUP_HOST# */
258 pinctrl_bt_wkup_host: main-gpio0-16-default-pins {
259 pinctrl-single,pins = <
260 AM62X_IOPAD(0x0040, PIN_INPUT, 7) /* (N23) GPMC0_AD1.GPIO0_16 */ /* SODIMM 172 */
261 >;
262 };
263
264 /* PMIC_ETH_RESET# */
265 pinctrl_eth_reset: main-gpio0-17-default-pins {
266 pinctrl-single,pins = <
267 AM62X_IOPAD(0x0044, PIN_INPUT, 7) /* (N24) GPMC0_AD2.GPIO0_17 */
268 >;
269 };
270
271 /* PMIC_BRIDGE_RESET# */
272 pinctrl_bridge_reset: main-gpio0-20-default-pins {
273 pinctrl-single,pins = <
274 AM62X_IOPAD(0x0050, PIN_INPUT, 7) /* (P22) GPMC0_AD5.GPIO0_20 */
275 >;
276 };
277
278 /* PMIC_VSEL_SD */
279 pinctrl_vsel_sd: main-gpio0-21-default-pins {
280 pinctrl-single,pins = <
281 AM62X_IOPAD(0x0054, PIN_INPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
282 >;
283 };
284
285 /* PMIC_EN_WIFI */
286 pinctrl_wifi_en: main-gpio0-22-default-pins {
287 pinctrl-single,pins = <
288 AM62X_IOPAD(0x0058, PIN_INPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */
289 >;
290 };
291
292 /* PMIC_ETH_INT# */
293 pinctrl_eth_int: main-gpio0-25-default-pins {
294 pinctrl-single,pins = <
295 AM62X_IOPAD(0x0064, PIN_INPUT_PULLUP, 7) /* (T25) GPMC0_AD10.GPIO0_25 */
296 >;
297 };
298
299 /* WiFi_WKUP_BT# */
300 pinctrl_wifi_wkup_bt: main-gpio0-26-default-pins {
301 pinctrl-single,pins = <
302 AM62X_IOPAD(0x0068, PIN_INPUT, 7) /* (R21) GPMC0_AD11.GPIO0_26 */
303 >;
304 };
305
306 /* WiFi_WKUP_WLAN# */
307 pinctrl_wifi_wkup_wlan: main-gpio0-27-default-pins {
308 pinctrl-single,pins = <
309 AM62X_IOPAD(0x006c, PIN_INPUT, 7) /* (T22) GPMC0_AD12.GPIO0_27 */
310 >;
311 };
312
313 /* Verdin SD_1_PWR_EN */
314 pinctrl_sd1_pwr_en: main-gpio0-29-default-pins {
315 pinctrl-single,pins = <
316 AM62X_IOPAD(0x0074, PIN_INPUT, 7) /* (U25) GPMC0_AD14.GPIO0_29 */ /* SODIMM 76 */
317 >;
318 };
319
320 /* Verdin DSI_1_BKL_EN */
321 pinctrl_dsi1_bkl_en: main-gpio0-30-default-pins {
322 pinctrl-single,pins = <
323 AM62X_IOPAD(0x0078, PIN_INPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ /* SODIMM 21 */
324 >;
325 };
326
327 /* Verdin CTRL_SLEEP_MOCI# */
328 pinctrl_ctrl_sleep_moci: main-gpio0-31-default-pins {
329 pinctrl-single,pins = <
330 AM62X_IOPAD(0x007c, PIN_INPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ /* SODIMM 256 */
331 >;
332 };
333
334 /* Verdin CTRL_WAKE1_MICO# */
335 pinctrl_ctrl_wake1_mico: main-gpio0-32-default-pins {
336 pinctrl-single,pins = <
337 AM62X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */ /* SODIMM 252 */
338 >;
339 };
340
341 /* Verdin I2S_2_D_OUT as GPIO (conflict with Verdin I2S_2 interface) */
342 pinctrl_i2s_2_d_out_gpio: main-gpio0-34-default-pins {
343 pinctrl-single,pins = <
344 AM62X_IOPAD(0x008c, PIN_INPUT, 7) /* (L25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */
345 >;
346 };
347
348 /* Verdin I2S_2_BCLK as GPIO (conflict with Verdin I2S_2 interface) */
349 pinctrl_i2s_2_bclk_gpio: main-gpio0-35-default-pins {
350 pinctrl-single,pins = <
351 AM62X_IOPAD(0x0090, PIN_INPUT, 7) /* (M24) GPMC0_BE0n_CLE.GPIO0_35 */ /* SODIMM 42 */
352 >;
353 };
354
355 /* Verdin GPIO_6 */
356 pinctrl_gpio_6: main-gpio0-36-default-pins {
357 pinctrl-single,pins = <
358 AM62X_IOPAD(0x0094, PIN_INPUT, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */ /* SODIMM 218 */
359 >;
360 };
361
362 /* Verdin ETH_2_RGMII_INT# */
363 pinctrl_eth2_rgmii_int: main-gpio0-38-default-pins {
364 pinctrl-single,pins = <
365 AM62X_IOPAD(0x009c, PIN_INPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */ /* SODIMM 189 */
366 >;
367 };
368
369 /* Verdin GPIO_5 */
370 pinctrl_gpio_5: main-gpio0-40-default-pins {
371 pinctrl-single,pins = <
372 AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */ /* SODIMM 216 */
373 >;
374 };
375
376 /* Verdin GPIO_7 */
377 pinctrl_gpio_7: main-gpio0-41-default-pins {
378 pinctrl-single,pins = <
379 AM62X_IOPAD(0x00a8, PIN_INPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */ /* SODIMM 220 */
380 >;
381 };
382
383 /* Verdin GPIO_8 */
384 pinctrl_gpio_8: main-gpio0-42-default-pins {
385 pinctrl-single,pins = <
386 AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */ /* SODIMM 222 */
387 >;
388 };
389
390 /* Verdin USB_1_OC# */
391 pinctrl_usb1_oc: main-gpio0-71-default-pins {
392 pinctrl-single,pins = <
393 AM62X_IOPAD(0x0124, PIN_INPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */ /* SODIMM 157 */
394 >;
395 };
396
397 /* Verdin USB_2_OC# */
398 pinctrl_usb2_oc: main-gpio0-72-default-pins {
399 pinctrl-single,pins = <
400 AM62X_IOPAD(0x0128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ /* SODIMM 187 */
401 >;
402 };
403
404 /* Verdin PWM_3_DSI as GPIO */
405 pinctrl_pwm3_dsi_gpio: main-gpio1-17-default-pins {
406 pinctrl-single,pins = <
407 AM62X_IOPAD(0x01bc, PIN_INPUT, 7) /* (A14) SPI0_CLK.GPIO1_17 */ /* SODIMM 19 */
408 >;
409 };
410
411 /* Verdin QSPI_1_DQS as GPIO */
412 pinctrl_qspi1_dqs_gpio: main-gpio1-18-default-pins {
413 pinctrl-single,pins = <
414 AM62X_IOPAD(0x01c0, PIN_INPUT, 7) /* (B13) SPI0_D0.GPIO1_18 */ /* SODIMM 66 */
415 >;
416 };
417
418 /* Verdin USB_1_ID */
419 pinctrl_usb0_id: main-gpio1-19-default-pins {
420 pinctrl-single,pins = <
421 AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1.GPIO1_19 */ /* SODIMM 161 */
422 >;
423 };
424
425 /* Verdin DSI_1_INT# (pulled-up as active-low) */
426 pinctrl_dsi1_int: main-gpio1-49-default-pins {
427 pinctrl-single,pins = <
428 AM62X_IOPAD(0x0244, PIN_INPUT_PULLUP, 7) /* (C17) MMC1_SDWP.GPIO1_49 */ /* SODIMM 17 */
429 >;
430 };
431
432 /* On-module I2C - PMIC_I2C */
433 pinctrl_i2c0: main-i2c0-default-pins {
434 pinctrl-single,pins = <
435 AM62X_IOPAD(0x01e0, PIN_INPUT, 0) /* (B16) I2C0_SCL */ /* PMIC_I2C_SCL */
436 AM62X_IOPAD(0x01e4, PIN_INPUT, 0) /* (A16) I2C0_SDA */ /* PMIC_I2C_SDA */
437 >;
438 };
439
440 /* Verdin I2C_1 */
441 pinctrl_i2c1: main-i2c1-default-pins {
442 pinctrl-single,pins = <
443 AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ /* SODIMM 14 */
444 AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ /* SODIMM 12 */
445 >;
446 };
447
448 /* Verdin I2C_2_DSI */
449 pinctrl_i2c2: main-i2c2-default-pins {
450 pinctrl-single,pins = <
451 AM62X_IOPAD(0x00b0, PIN_INPUT, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */
452 AM62X_IOPAD(0x00b4, PIN_INPUT, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */
453 >;
454 };
455
456 /* Verdin I2C_4_CSI */
457 pinctrl_i2c3: main-i2c3-default-pins {
458 pinctrl-single,pins = <
459 AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */
460 AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */
461 >;
462 };
463
464 /* I2S_1_MCLK */
465 pinctrl_i2s1_mclk: main-system-audio-ext-reflock1-default-pins {
466 pinctrl-single,pins = <
467 AM62X_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ /* SODIMM 38 */
468 >;
469 };
470
471 /* Verdin I2S_1 */
472 pinctrl_mcasp0: main-mcasp0-default-pins {
473 pinctrl-single,pins = <
474 AM62X_IOPAD(0x01a4, PIN_INPUT, 0) /* (B20) MCASP0_ACLKX */ /* SODIMM 30 */
475 AM62X_IOPAD(0x01a8, PIN_INPUT, 0) /* (D20) MCASP0_AFSX */ /* SODIMM 32 */
476 AM62X_IOPAD(0x01a0, PIN_OUTPUT, 0) /* (E18) MCASP0_AXR0 */ /* SODIMM 34 */
477 AM62X_IOPAD(0x019c, PIN_INPUT, 0) /* (B18) MCASP0_AXR1 */ /* SODIMM 36 */
478 >;
479 };
480
481 /* Verdin I2S_2 */
482 pinctrl_mcasp1: main-mcasp1-default-pins {
483 pinctrl-single,pins = <
484 AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ /* SODIMM 42 */
485 AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ /* SODIMM 44 */
486 AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEn.MCASP1_AXR0 */ /* SODIMM 46 */
487 AM62X_IOPAD(0x0088, PIN_INPUT, 2) /* (L24) GPMC0_OEn_REn.MCASP1_AXR1 */ /* SODIMM 48 */
488 >;
489 };
490
491 /* Verdin CAN_1 */
492 pinctrl_mcan0: main-mcan0-default-pins {
493 pinctrl-single,pins = <
494 AM62X_IOPAD(0x01dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ /* SODIMM 22 */
495 AM62X_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ /* SODIMM 20 */
496 >;
497 };
498
499 /* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
500 pinctrl_mdio: main-mdio1-default-pins {
501 pinctrl-single,pins = <
502 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ /* ETH_1_MDC, SODIMM 193 */
503 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM 191 */
504 >;
505 };
506
507 /* On-module eMMC */
508 pinctrl_sdhci0: main-mmc0-default-pins {
509 pinctrl-single,pins = <
510 AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
511 AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
512 AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
513 AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
514 AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
515 AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
516 AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
517 AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
518 AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
519 AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
520 >;
521 };
522
523 /* Verdin SD_1 */
524 pinctrl_sdhci1: main-mmc1-default-pins {
525 pinctrl-single,pins = <
526 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */
527 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
528 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */
529 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */
530 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */
531 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */
532 AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */
533 >;
534 };
535
536 /* On-module Wi-Fi on WB SKUs, module-specific SDIO otherwise */
537 pinctrl_sdhci2: main-mmc2-default-pins {
538 pinctrl-single,pins = <
539 AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ /* WiFi_SDIO_CMD */
540 AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
541 AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ /* WiFi_SDIO_DATA0 */
542 AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ /* WiFi_SDIO_DATA1 */
543 AM62X_IOPAD(0x10c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */ /* WiFi_SDIO_DATA2 */
544 AM62X_IOPAD(0x108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */ /* WiFi_SDIO_DATA3 */
545 AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */
546 >;
547 };
548
549 /* Verdin QSPI_1 */
550 pinctrl_ospi0: main-ospi0-default-pins {
551 pinctrl-single,pins = <
552 AM62X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ /* SODIMM 52 */
553 AM62X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ /* SODIMM 54 */
554 AM62X_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G21) OSPI0_CSn1 */ /* SODIMM 64 */
555 AM62X_IOPAD(0x000c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ /* SODIMM 56 */
556 AM62X_IOPAD(0x0010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ /* SODIMM 58 */
557 AM62X_IOPAD(0x0014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ /* SODIMM 60 */
558 AM62X_IOPAD(0x0018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ /* SODIMM 62 */
559 >;
560 };
561
562 /* Verdin ETH_1 RGMII (On-module PHY) */
563 pinctrl_rgmii1: main-rgmii1-default-pins {
564 pinctrl-single,pins = <
565 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
566 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
567 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
568 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
569 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
570 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
571 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
572 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
573 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
574 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
575 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
576 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
577 >;
578 };
579
580 /* Verdin ETH_2 RGMII */
581 pinctrl_rgmii2: main-rgmii2-default-pins {
582 pinctrl-single,pins = <
583 AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ /* SODIMM 201 */
584 AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ /* SODIMM 203 */
585 AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ /* SODIMM 205 */
586 AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ /* SODIMM 207 */
587 AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ /* SODIMM 197 */
588 AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ /* SODIMM 199 */
589 AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ /* SODIMM 221 */
590 AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ /* SODIMM 219 */
591 AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ /* SODIMM 217 */
592 AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ /* SODIMM 215 */
593 AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ /* SODIMM 213 */
594 AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ /* SODIMM 211 */
595 >;
596 };
597
598 /* Verdin SPI_1 */
599 pinctrl_spi1: main-spi1-default-pins {
600 pinctrl-single,pins = <
601 AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */
602 AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
603 AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0 */ /* SODIMM 200 */
604 AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1 */ /* SODIMM 198 */
605 >;
606 };
607
608 /* ETH_25MHz_CLK */
609 pinctrl_eth_clock: main-system-clkout0-default-pins {
610 pinctrl-single,pins = <
611 AM62X_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
612 >;
613 };
614
615 /* PMIC_EXTINT# */
616 pinctrl_pmic_extint: main-system-extint-default-pins {
617 pinctrl-single,pins = <
618 AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
619 >;
620 };
621
622 /* Verdin UART_3, used as the Linux console */
623 pinctrl_uart0: main-uart0-default-pins {
624 pinctrl-single,pins = <
625 AM62X_IOPAD(0x1c8, PIN_INPUT_PULLUP, 0) /* (D14) UART0_RXD */ /* SODIMM 147 */
626 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ /* SODIMM 149 */
627 >;
628 };
629
630 /* Verdin UART_1 */
631 pinctrl_uart1: main-uart1-default-pins {
632 pinctrl-single,pins = <
633 AM62X_IOPAD(0x0194, PIN_INPUT_PULLUP, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ /* SODIMM 135 */
634 AM62X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ /* SODIMM 133 */
635 AM62X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ /* SODIMM 129 */
636 AM62X_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ /* SODIMM 131 */
637 >;
638 };
639
640 /* Bluetooth on WB SKUs, module-specific UART otherwise */
641 pinctrl_uart5: main-uart5-default-pins {
642 pinctrl-single,pins = <
643 AM62X_IOPAD(0x0008, PIN_INPUT_PULLUP, 5) /* (J24) OSPI0_DQS.UART5_CTSn */ /* WiFi_UART_CTS */
644 AM62X_IOPAD(0x0004, PIN_OUTPUT, 5) /* (G25) OSPI0_LBCLKO.UART5_RTSn */ /* WiFi_UART_RTS */
645 AM62X_IOPAD(0x0034, PIN_INPUT_PULLUP, 5) /* (H21) OSPI0_CSn2.UART5_RXD */ /* WiFi_UART_RXD */
646 AM62X_IOPAD(0x0038, PIN_OUTPUT, 5) /* (E24) OSPI0_CSn3.UART5_TXD */ /* WiFi_UART_TXD */
647 >;
648 };
649
650 /* Verdin USB_1 */
651 pinctrl_usb0: main-usb0-default-pins {
652 pinctrl-single,pins = <
653 AM62X_IOPAD(0x0254, PIN_OUTPUT, 0) /* (C20) USB0_DRVVBUS */ /* SODIMM 155 */
654 >;
655 };
656
657 /* Verdin USB_2 */
658 pinctrl_usb1: main-usb1-default-pins {
659 pinctrl-single,pins = <
660 AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ /* SODIMM 185 */
661 >;
662 };
663
664 /* DSS VOUT0 RGB */
665 pinctrl_parallel_rgb: main-vout-default-pins {
666 pinctrl-single,pins = <
667 AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
668 AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
669 AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
670 AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
671 AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
672 AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
673 AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
674 AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
675 AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
676 AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
677 AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
678 AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
679 AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
680 AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
681 AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
682 AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
683 AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
684 AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
685 AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
686 AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
687 AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
688 AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
689 >;
690 };
691};
692
693&mcu_pmx0 {
694 /* Verdin PCIE_1_RESET# */
695 pinctrl_pcie_1_reset: mcu-gpio0-0-default-pins {
696 pinctrl-single,pins = <
697 AM62X_MCU_IOPAD(0x0000, PIN_INPUT, 7) /* (E8) MCU_SPI0_CS0.MCU_GPIO0_0 */ /* SODIMM 244 */
698 >;
699 };
700
701 /* Verdin GPIO_1 */
702 pinctrl_gpio_1: mcu-gpio0-1-default-pins {
703 pinctrl-single,pins = <
704 AM62X_MCU_IOPAD(0x0004, PIN_INPUT, 7) /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 */ /* SODIMM 206 */
705 >;
706 };
707
708 /* Verdin GPIO_2 */
709 pinctrl_gpio_2: mcu-gpio0-2-default-pins {
710 pinctrl-single,pins = <
711 AM62X_MCU_IOPAD(0x0008, PIN_INPUT, 7) /* (A7) MCU_SPI0_CLK.MCU_GPIO0_2 */ /* SODIMM 208 */
712 >;
713 };
714
715 /* Verdin GPIO_3 */
716 pinctrl_gpio_3: mcu-gpio0-3-default-pins {
717 pinctrl-single,pins = <
718 AM62X_MCU_IOPAD(0x000c, PIN_INPUT, 7) /* (D9) MCU_SPI0_D0.MCU_GPIO0_3 */ /* SODIMM 210 */
719 >;
720 };
721
722 /* Verdin GPIO_4 */
723 pinctrl_gpio_4: mcu-gpio0-4-default-pins {
724 pinctrl-single,pins = <
725 AM62X_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (C9) MCU_SPI0_D1.MCU_GPIO0_4 */ /* SODIMM 212 */
726 >;
727 };
728
729 /* Verdin I2C_3_HDMI */
730 pinctrl_mcu_i2c0: mcu-i2c0-default-pins {
731 pinctrl-single,pins = <
732 AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */ /* SODIMM 59 */
733 AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
734 >;
735 };
736
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]737 /* Verdin CAN_2 */
738 pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
739 pinctrl-single,pins = <
740 AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
741 AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
742 >;
743 };
744
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]745 /* Verdin UART_4 - Reserved to Cortex-M4 */
746 pinctrl_mcu_uart0: mcu-uart0-default-pins {
747 pinctrl-single,pins = <
748 AM62X_MCU_IOPAD(0x0014, PIN_INPUT_PULLUP, 0) /* (B5) MCU_UART0_RXD */ /* SODIMM 151 */
749 AM62X_MCU_IOPAD(0x0018, PIN_OUTPUT, 0) /* (A5) MCU_UART0_TXD */ /* SODIMM 153 */
750 >;
751 };
752
753 /* Verdin CSI_1_MCLK */
754 pinctrl_csi1_mclk: wkup-clkout0-default-pins {
755 pinctrl-single,pins = <
756 AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (A12) WKUP_CLKOUT0 */ /* SODIMM 91 */
757 >;
758 };
759
760 /* Verdin UART_2 */
761 pinctrl_wkup_uart0: wkup-uart0-default-pins {
762 pinctrl-single,pins = <
763 AM62X_MCU_IOPAD(0x002c, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */
764 AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */
765 AM62X_MCU_IOPAD(0x0024, PIN_INPUT_PULLUP, 0) /* (B4) WKUP_UART0_RXD */ /* SODIMM 137 */
766 AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ /* SODIMM 139 */
767 >;
768 };
769};
770
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]771/* VERDIN I2S_1_MCLK */
772&audio_refclk1 {
773 assigned-clock-rates = <25000000>;
774};
775
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]776&cpsw3g {
777 pinctrl-names = "default";
778 pinctrl-0 = <&pinctrl_rgmii1>;
779 status = "disabled";
780};
781
782/* Verdin ETH_1 (On-module PHY) */
783&cpsw_port1 {
784 phy-handle = <&cpsw3g_phy0>;
785 phy-mode = "rgmii-rxid";
786 status = "disabled";
787};
788
789/* Verdin ETH_2_RGMII */
790&cpsw_port2 {
791 status = "disabled";
792};
793
794/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
795&cpsw3g_mdio {
796 assigned-clocks = <&k3_clks 157 20>;
797 assigned-clock-parents = <&k3_clks 157 22>;
798 assigned-clock-rates = <25000000>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&pinctrl_eth_clock>, <&pinctrl_mdio>;
801 status = "disabled";
802
803 cpsw3g_phy0: ethernet-phy@0 {
804 compatible = "ethernet-phy-id2000.a231";
805 reg = <0>;
806 interrupt-parent = <&main_gpio0>;
807 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
808 pinctrl-names = "default";
809 pinctrl-0 = <&pinctrl_eth_int>, <&pinctrl_eth_reset>;
810 reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_LOW>;
811 reset-assert-us = <10>;
812 reset-deassert-us = <1000>;
813 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
814 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
815 };
816};
817
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]818&dss {
819 pinctrl-names = "default";
820 pinctrl-0 = <&pinctrl_parallel_rgb>;
821 status = "disabled";
822};
823
824&dss_ports {
825 #address-cells = <1>;
826 #size-cells = <0>;
827
828 /* VP2: DPI Output */
829 port@1 {
830 reg = <1>;
831
832 dpi_out: endpoint {
833 remote-endpoint = <&rgb_in>;
834 };
835 };
836};
837
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]838/* Verdin PWM_1, PWM_2 */
839&epwm0 {
840 pinctrl-names = "default";
841 pinctrl-0 = <&pinctrl_epwm0_a>, <&pinctrl_epwm0_b>;
842 status = "disabled";
843};
844
845/* Verdin PWM_3_DSI */
846&epwm1 {
847 pinctrl-names = "default";
848 pinctrl-0 = <&pinctrl_epwm1_a>;
849 status = "disabled";
850};
851
852&main_gpio0 {
853 gpio-line-names =
854 "SODIMM_52", /* 0 */
855 "",
856 "",
857 "SODIMM_56",
858 "SODIMM_58",
859 "SODIMM_60",
860 "SODIMM_62",
861 "",
862 "",
863 "",
864 "", /* 10 */
865 "SODIMM_54",
866 "SODIMM_64",
867 "",
868 "",
869 "SODIMM_174",
870 "SODIMM_172",
871 "",
872 "",
873 "",
874 "", /* 20 */
875 "",
876 "",
877 "",
878 "",
879 "",
880 "",
881 "",
882 "",
883 "SODIMM_76",
884 "SODIMM_21", /* 30 */
885 "SODIMM_256",
886 "SODIMM_252",
887 "",
888 "SODIMM_46",
889 "SODIMM_42",
890 "SODIMM_218",
891 "",
892 "SODIMM_189",
893 "",
894 "SODIMM_216", /* 40 */
895 "SODIMM_220",
896 "SODIMM_222",
897 "",
898 "",
899 "",
900 "",
901 "",
902 "",
903 "",
904 "", /* 50 */
905 "",
906 "",
907 "",
908 "",
909 "",
910 "",
911 "",
912 "",
913 "",
914 "", /* 60 */
915 "",
916 "",
917 "",
918 "",
919 "",
920 "",
921 "",
922 "",
923 "",
924 "", /* 70 */
925 "SODIMM_157",
926 "SODIMM_187",
927 "",
928 "",
929 "",
930 "",
931 "",
932 "",
933 "",
934 "", /* 80 */
935 "",
936 "",
937 "",
938 "",
939 "",
940 "";
941
942 verdin_ctrl_sleep_moci: ctrl-sleep-moci-hog {
943 gpio-hog;
944 /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
945 gpios = <31 GPIO_ACTIVE_HIGH>;
946 line-name = "CTRL_SLEEP_MOCI#";
947 output-high;
948 };
949};
950
951&main_gpio1 {
952 gpio-line-names =
953 "", /* 0 */
954 "",
955 "",
956 "",
957 "",
958 "",
959 "",
960 "",
961 "",
962 "",
963 "", /* 10 */
964 "",
965 "",
966 "",
967 "",
968 "SODIMM_15",
969 "SODIMM_16",
970 "SODIMM_19",
971 "SODIMM_66",
972 "SODIMM_161",
973 "", /* 20 */
974 "",
975 "",
976 "",
977 "",
978 "",
979 "",
980 "",
981 "",
982 "",
983 "", /* 30 */
984 "",
985 "",
986 "",
987 "",
988 "",
989 "",
990 "",
991 "",
992 "",
993 "", /* 40 */
994 "",
995 "",
996 "",
997 "",
998 "",
999 "",
1000 "",
1001 "",
1002 "SODIMM_17",
1003 "", /* 50 */
1004 "",
1005 "",
1006 "",
1007 "",
1008 "",
1009 "",
1010 "",
1011 "",
1012 "",
1013 "", /* 60 */
1014 "",
1015 "",
1016 "",
1017 "",
1018 "",
1019 "",
1020 "",
1021 "",
1022 "",
1023 "", /* 70 */
1024 "",
1025 "",
1026 "",
1027 "",
1028 "",
1029 "",
1030 "",
1031 "",
1032 "",
1033 "", /* 80 */
1034 "",
1035 "",
1036 "",
1037 "",
1038 "",
1039 "",
1040 "";
1041};
1042
1043/* On-module I2C - PMIC_I2C */
1044&main_i2c0 {
1045 pinctrl-names = "default";
1046 pinctrl-0 = <&pinctrl_i2c0>;
1047 clock-frequency = <400000>;
1048 status = "okay";
1049
1050 dsi_bridge: dsi@e {
1051 compatible = "toshiba,tc358778";
1052 reg = <0xe>;
1053 assigned-clocks = <&k3_clks 157 20>;
1054 assigned-clock-parents = <&k3_clks 157 22>;
1055 assigned-clock-rates = <25000000>;
1056 pinctrl-names = "default";
1057 pinctrl-0 = <&pinctrl_bridge_reset>;
1058 clocks = <&k3_clks 157 20>;
1059 clock-names = "refclk";
1060 reset-gpios = <&main_gpio0 20 GPIO_ACTIVE_LOW>;
1061 vddc-supply = <&reg_1v2_dsi>;
1062 vddmipi-supply = <&reg_1v2_dsi>;
1063 vddio-supply = <&reg_1v8_dsi>;
1064
1065 dsi_bridge_ports: ports {
1066 #address-cells = <1>;
1067 #size-cells = <0>;
1068
1069 port@0 {
1070 reg = <0>;
1071
1072 rgb_in: endpoint {
1073 data-lines = <18>;
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]1074 remote-endpoint = <&dpi_out>;
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]1075 };
1076 };
1077
1078 port@1 {
1079 reg = <1>;
1080 };
1081 };
1082 };
1083
1084 pmic@30 {
1085 compatible = "ti,tps65219";
1086 reg = <0x30>;
1087 pinctrl-names = "default";
1088 pinctrl-0 = <&pinctrl_pmic_extint>;
1089 interrupt-parent = <&gic500>;
1090 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1091
1092 buck1-supply = <&reg_vsodimm>;
1093 buck2-supply = <&reg_vsodimm>;
1094 buck3-supply = <&reg_vsodimm>;
1095 ldo1-supply = <&reg_3v3>;
1096 ldo2-supply = <&reg_1v8>;
1097 ldo3-supply = <&reg_3v3>;
1098 ldo4-supply = <&reg_3v3>;
1099 system-power-controller;
1100 ti,power-button;
1101
1102 regulators {
1103 reg_vdd_core: buck1 {
1104 regulator-always-on;
1105 regulator-boot-on;
1106 regulator-max-microvolt = <850000>;
1107 regulator-min-microvolt = <850000>;
1108 regulator-name = "+VDD_CORE (PMIC BUCK1)";
1109 };
1110
1111 reg_1v8: buck2 {
1112 regulator-always-on;
1113 regulator-boot-on;
1114 regulator-max-microvolt = <1800000>;
1115 regulator-min-microvolt = <1800000>;
1116 regulator-name = "+V1.8 (PMIC BUCK2)"; /* On-module and SODIMM 214 */
1117 };
1118
1119 reg_vdd_ddr: buck3 {
1120 regulator-always-on;
1121 regulator-boot-on;
1122 regulator-max-microvolt = <1100000>;
1123 regulator-min-microvolt = <1100000>;
1124 regulator-name = "+VDD_DDR (PMIC BUCK3)";
1125 };
1126
1127 reg_sd_3v3_1v8: ldo1 {
1128 regulator-allow-bypass;
1129 regulator-always-on;
1130 regulator-boot-on;
1131 regulator-max-microvolt = <3300000>;
1132 regulator-min-microvolt = <3300000>;
1133 regulator-name = "+V3.3_1.8_SD (PMIC LDO1)";
1134 };
1135
1136 reg_vddr_core: ldo2 {
1137 regulator-always-on;
1138 regulator-boot-on;
1139 regulator-max-microvolt = <850000>;
1140 regulator-min-microvolt = <850000>;
1141 regulator-name = "+VDDR_CORE (PMIC LDO2)";
1142 };
1143
1144 reg_1v8a: ldo3 {
1145 regulator-always-on;
1146 regulator-boot-on;
1147 regulator-max-microvolt = <1800000>;
1148 regulator-min-microvolt = <1800000>;
1149 regulator-name = "+V1.8A (PMIC LDO3)";
1150 };
1151
1152 reg_eth_2v5: ldo4 {
1153 regulator-always-on;
1154 regulator-boot-on;
1155 regulator-max-microvolt = <2500000>;
1156 regulator-min-microvolt = <2500000>;
1157 regulator-name = "+V2.5_ETH (PMIC LDO4)";
1158 };
1159 };
1160 };
1161
1162 rtc_i2c: rtc@32 {
1163 compatible = "epson,rx8130";
1164 reg = <0x32>;
1165 };
1166
1167 sensor@48 {
1168 compatible = "ti,tmp1075";
1169 reg = <0x48>;
1170 };
1171
1172 adc@49 {
1173 compatible = "ti,ads1015";
1174 reg = <0x49>;
1175 #address-cells = <1>;
1176 #size-cells = <0>;
1177
1178 /* Verdin PMIC_I2C (ADC_4 - ADC_3) */
1179 channel@0 {
1180 reg = <0>;
1181 ti,datarate = <4>;
1182 ti,gain = <2>;
1183 };
1184
1185 /* Verdin PMIC_I2C (ADC_4 - ADC_1) */
1186 channel@1 {
1187 reg = <1>;
1188 ti,datarate = <4>;
1189 ti,gain = <2>;
1190 };
1191
1192 /* Verdin PMIC_I2C (ADC_3 - ADC_1) */
1193 channel@2 {
1194 reg = <2>;
1195 ti,datarate = <4>;
1196 ti,gain = <2>;
1197 };
1198
1199 /* Verdin PMIC_I2C (ADC_2 - ADC_1) */
1200 channel@3 {
1201 reg = <3>;
1202 ti,datarate = <4>;
1203 ti,gain = <2>;
1204 };
1205
1206 /* Verdin PMIC_I2C ADC_4 */
1207 channel@4 {
1208 reg = <4>;
1209 ti,datarate = <4>;
1210 ti,gain = <2>;
1211 };
1212
1213 /* Verdin PMIC_I2C ADC_3 */
1214 channel@5 {
1215 reg = <5>;
1216 ti,datarate = <4>;
1217 ti,gain = <2>;
1218 };
1219
1220 /* Verdin PMIC_I2C ADC_2 */
1221 channel@6 {
1222 reg = <6>;
1223 ti,datarate = <4>;
1224 ti,gain = <2>;
1225 };
1226
1227 /* Verdin PMIC_I2C ADC_1 */
1228 channel@7 {
1229 reg = <7>;
1230 ti,datarate = <4>;
1231 ti,gain = <2>;
1232 };
1233 };
1234
1235 eeprom@50 {
1236 compatible = "st,24c02", "atmel,24c02";
1237 pagesize = <16>;
1238 reg = <0x50>;
1239 };
1240};
1241
1242/* Verdin I2C_1 */
1243&main_i2c1 {
1244 pinctrl-names = "default";
1245 pinctrl-0 = <&pinctrl_i2c1>;
1246 status = "disabled";
1247};
1248
1249/* Verdin I2C_2_DSI */
1250&main_i2c2 {
1251 pinctrl-names = "default";
1252 pinctrl-0 = <&pinctrl_i2c2>;
1253 status = "disabled";
1254};
1255
1256/* Verdin I2C_4_CSI */
1257&main_i2c3 {
1258 pinctrl-names = "default";
1259 pinctrl-0 = <&pinctrl_i2c3>;
1260 status = "disabled";
1261};
1262
1263&mailbox0_cluster0 {
1264 mbox_m4_0: mbox-m4-0 {
1265 ti,mbox-rx = <0 0 0>;
1266 ti,mbox-tx = <1 0 0>;
1267 };
1268};
1269
1270/* Verdin CAN_1 */
1271&main_mcan0 {
1272 pinctrl-names = "default";
1273 pinctrl-0 = <&pinctrl_mcan0>;
1274 status = "disabled";
1275};
1276
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]1277/* Verdin SPI_1 */
1278&main_spi1 {
1279 pinctrl-names = "default";
1280 pinctrl-0 = <&pinctrl_spi1>;
1281 ti,pindir-d0-out-d1-in;
1282 status = "disabled";
1283};
1284
1285/* Verdin UART_3, used as the Linux console */
1286&main_uart0 {
1287 pinctrl-names = "default";
1288 pinctrl-0 = <&pinctrl_uart0>;
1289 status = "disabled";
1290};
1291
1292/* Verdin UART_1 */
1293&main_uart1 {
1294 pinctrl-names = "default";
1295 pinctrl-0 = <&pinctrl_uart1>;
1296 status = "disabled";
1297};
1298
1299/* Verdin I2S_1 */
1300&mcasp0 {
1301 pinctrl-names = "default";
1302 pinctrl-0 = <&pinctrl_mcasp0>;
1303 op-mode = <0>; /* I2S mode */
1304 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1305 1 2 0 0
1306 0 0 0 0
1307 0 0 0 0
1308 0 0 0 0
1309 >;
1310 tdm-slots = <2>;
1311 rx-num-evt = <32>;
1312 tx-num-evt = <32>;
1313 #sound-dai-cells = <0>;
1314 status = "disabled";
1315};
1316
1317/* Verdin I2S_2 */
1318&mcasp1 {
1319 pinctrl-names = "default";
1320 pinctrl-0 = <&pinctrl_mcasp1>;
1321 op-mode = <0>; /* I2S mode */
1322 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1323 1 2 0 0
1324 0 0 0 0
1325 0 0 0 0
1326 0 0 0 0
1327 >;
1328 tdm-slots = <2>;
1329 rx-num-evt = <32>;
1330 tx-num-evt = <32>;
1331 #sound-dai-cells = <0>;
1332 status = "disabled";
1333};
1334
1335/* Verdin I2C_3_HDMI */
1336&mcu_i2c0 {
1337 pinctrl-names = "default";
1338 pinctrl-0 = <&pinctrl_mcu_i2c0>;
1339 status = "disabled";
1340};
1341
1342&mcu_gpio0 {
1343 gpio-line-names =
1344 "SODIMM_244",
1345 "SODIMM_206",
1346 "SODIMM_208",
1347 "SODIMM_210",
1348 "SODIMM_212",
1349 "",
1350 "",
1351 "",
1352 "",
1353 "",
1354 "",
1355 "",
1356 "",
1357 "",
1358 "",
1359 "",
1360 "",
1361 "",
1362 "",
1363 "",
1364 "",
1365 "",
1366 "",
1367 "";
1368};
1369
Nishanth Menon96934b02023-09-11 09:02:56 -0500[diff] [blame]1370/* Verdin CAN_2 */
1371&mcu_mcan0 {
1372 pinctrl-names = "default";
1373 pinctrl-0 = <&pinctrl_mcu_mcan0>;
1374 status = "disabled";
1375};
1376
Marcel Ziswiler315deb32023-08-04 12:08:08 +0200[diff] [blame]1377/* Verdin UART_4 - Cortex-M4 UART */
1378&mcu_uart0 {
1379 pinctrl-names = "default";
1380 pinctrl-0 = <&pinctrl_mcu_uart0>;
1381 status = "disabled";
1382};
1383
1384/* Verdin QSPI_1 */
1385&ospi0 {
1386 pinctrl-names = "default";
1387 pinctrl-0 = <&pinctrl_ospi0>;
1388 status = "disabled";
1389};
1390
1391/* On-module eMMC */
1392&sdhci0 {
1393 pinctrl-names = "default";
1394 pinctrl-0 = <&pinctrl_sdhci0>;
1395 non-removable;
1396 ti,driver-strength-ohm = <50>;
1397 status = "okay";
1398};
1399
1400/* Verdin SD_1 */
1401&sdhci1 {
1402 pinctrl-names = "default";
1403 pinctrl-0 = <&pinctrl_sdhci1>;
1404 disable-wp;
1405 ti,driver-strength-ohm = <50>;
1406 vmmc-supply = <&reg_sdhc1_vmmc>;
1407 vqmmc-supply = <&reg_sdhc1_vqmmc>;
1408 status = "disabled";
1409};
1410
1411/* Verdin USB_1 */
1412&usbss0 {
1413 ti,vbus-divider;
1414 status = "disabled";
1415};
1416
1417/* TODO: role swich using ID pin */
1418&usb0 {
1419 pinctrl-names = "default";
1420 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb0_id>;
1421 status = "disabled";
1422};
1423
1424/* Verdin USB_2 */
1425&usbss1 {
1426 ti,vbus-divider;
1427 status = "disabled";
1428};
1429
1430&usb1 {
1431 pinctrl-names = "default";
1432 pinctrl-0 = <&pinctrl_usb1>;
1433 dr_mode = "host";
1434 status = "disabled";
1435};
1436
1437/* Verdin UART_2 */
1438&wkup_uart0 {
1439 pinctrl-names = "default";
1440 pinctrl-0 = <&pinctrl_wkup_uart0>;
1441 status = "disabled";
1442};