blob: e870492a690ccb83ea38f7b606d68dfa9add2e38 [file] [log] [blame]
Dave Gerlach278e7ac2021-04-23 11:27:46 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-am642.dtsi"
Dave Gerlach3daecde2021-05-04 18:00:52 -05009#include "k3-am64-evm-ddr4-1600MTs.dtsi"
10#include "k3-am64-ddr.dtsi"
Dave Gerlach278e7ac2021-04-23 11:27:46 -050011
12/ {
13 chosen {
14 stdout-path = "serial2:115200n8";
15 tick-timer = &timer1;
16 };
17
18 aliases {
19 remoteproc0 = &sysctrler;
20 remoteproc1 = &a53_0;
21 };
22
23 memory@80000000 {
24 device_type = "memory";
25 /* 2G RAM */
26 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
27
Simon Glassd3a98cb2023-02-13 08:56:33 -070028 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -050029 };
30
31 a53_0: a53@0 {
32 compatible = "ti,am654-rproc";
33 reg = <0x00 0x00a90000 0x00 0x10>;
34 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
Manorit Chawdhry99aceb82023-04-14 09:47:57 +053035 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
36 <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
Dave Gerlach278e7ac2021-04-23 11:27:46 -050037 resets = <&k3_reset 135 0>;
38 clocks = <&k3_clks 61 0>;
39 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
40 assigned-clock-parents = <&k3_clks 61 2>;
41 assigned-clock-rates = <200000000>, <1000000000>;
42 ti,sci = <&dmsc>;
43 ti,sci-proc-id = <32>;
44 ti,sci-host-id = <10>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070045 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -050046 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 secure_ddr: optee@9e800000 {
54 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
55 alignment = <0x1000>;
56 no-map;
57 };
58 };
59
60 clk_200mhz: dummy-clock-200mhz {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <200000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070064 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -050065 };
Nishanth Menond6a453c2021-05-04 18:00:55 -050066
67 vtt_supply: vtt-supply {
68 compatible = "regulator-gpio";
69 regulator-name = "vtt";
70 regulator-min-microvolt = <0>;
71 regulator-max-microvolt = <3300000>;
72 gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
73 states = <0 0x0 3300000 0x1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070074 bootph-pre-ram;
Nishanth Menond6a453c2021-05-04 18:00:55 -050075 };
Dave Gerlach278e7ac2021-04-23 11:27:46 -050076};
77
78&cbass_main {
79 sysctrler: sysctrler {
80 compatible = "ti,am654-system-controller";
81 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
82 mbox-names = "tx", "rx";
Simon Glassd3a98cb2023-02-13 08:56:33 -070083 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -050084 };
85};
86
Hari Nagalla789225e2022-03-09 14:42:29 -060087&cbass_main {
88 main_esm: esm@420000 {
89 compatible = "ti,j721e-esm";
90 reg = <0x0 0x420000 0x0 0x1000>;
91 ti,esm-pins = <160>, <161>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070092 bootph-pre-ram;
Hari Nagalla789225e2022-03-09 14:42:29 -060093 };
94};
95
96&cbass_mcu {
Simon Glassd3a98cb2023-02-13 08:56:33 -070097 bootph-pre-ram;
Hari Nagalla789225e2022-03-09 14:42:29 -060098 mcu_esm: esm@4100000 {
99 compatible = "ti,j721e-esm";
100 reg = <0x0 0x4100000 0x0 0x1000>;
101 ti,esm-pins = <0>, <1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700102 bootph-pre-ram;
Hari Nagalla789225e2022-03-09 14:42:29 -0600103 };
104};
105
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500106&main_pmx0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700107 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500108 main_uart0_pins_default: main-uart0-pins-default {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700109 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500110 pinctrl-single,pins = <
111 AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
112 AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
113 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
114 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
115 >;
116 };
117
118 main_uart1_pins_default: main-uart1-pins-default {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700119 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500120 pinctrl-single,pins = <
121 AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
122 AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
123 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
124 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
125 >;
126 };
127
128 main_mmc0_pins_default: main-mmc0-pins-default {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700129 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500130 pinctrl-single,pins = <
131 AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
132 AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
133 AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
134 AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
135 AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
136 AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
137 AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
138 AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
139 AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
140 AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
141 AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
142 >;
143 };
144
145 main_mmc1_pins_default: main-mmc1-pins-default {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700146 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500147 pinctrl-single,pins = <
148 AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
149 AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
150 AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
151 AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
152 AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
153 AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
154 AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
155 AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
156 >;
157 };
Nishanth Menond6a453c2021-05-04 18:00:55 -0500158
159 ddr_vtt_pins_default: ddr-vtt-pins-default {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700160 bootph-pre-ram;
Nishanth Menond6a453c2021-05-04 18:00:55 -0500161 pinctrl-single,pins = <
162 AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
163 >;
164 };
Aswath Govindraju0b2481e2021-06-04 22:00:36 +0530165
166 main_usb0_pins_default: main-usb0-pins-default {
167 pinctrl-single,pins = <
168 AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
169 >;
170 };
Roger Quadros7350eb22023-01-24 11:43:27 +0200171
172 mdio1_pins_default: mdio1-pins-default {
173 pinctrl-single,pins = <
174 AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
175 AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
176 >;
177 };
178
179 rgmii1_pins_default: rgmii1-pins-default {
180 pinctrl-single,pins = <
181 AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
182 AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
183 AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
184 AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
185 AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
186 AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
187 AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
188 AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
189 AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
190 AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
191 AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
192 AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
193 >;
194 };
195
196 rgmii2_pins_default: rgmii2-pins-default {
197 pinctrl-single,pins = <
198 AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
199 AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
200 AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
201 AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
202 AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
203 AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
204 AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
205 AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
206 AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
207 AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
208 AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
209 AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
210 >;
211 };
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500212};
213
214&dmsc {
215 mboxes= <&secure_proxy_main 0>,
216 <&secure_proxy_main 1>,
217 <&secure_proxy_main 0>;
218 mbox-names = "rx", "tx", "notify";
219 ti,host-id = <35>;
220 ti,secure-host;
221};
222
223&main_uart0 {
224 /delete-property/ power-domains;
225 /delete-property/ clocks;
226 /delete-property/ clock-names;
227 pinctrl-names = "default";
228 pinctrl-0 = <&main_uart0_pins_default>;
229 status = "okay";
230};
231
232&main_uart1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700233 bootph-pre-ram;
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500234 pinctrl-names = "default";
235 pinctrl-0 = <&main_uart1_pins_default>;
236};
237
Nishanth Menond6a453c2021-05-04 18:00:55 -0500238&memorycontroller {
239 vtt-supply = <&vtt_supply>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&ddr_vtt_pins_default>;
242};
243
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500244&sdhci0 {
245 /delete-property/ power-domains;
246 clocks = <&clk_200mhz>;
247 clock-names = "clk_xin";
248 ti,driver-strength-ohm = <50>;
249 disable-wp;
250 pinctrl-0 = <&main_mmc0_pins_default>;
251};
252
253&sdhci1 {
254 /delete-property/ power-domains;
255 clocks = <&clk_200mhz>;
256 clock-names = "clk_xin";
257 ti,driver-strength-ohm = <50>;
258 disable-wp;
259 pinctrl-0 = <&main_mmc1_pins_default>;
260};
261
Nishanth Menond6a453c2021-05-04 18:00:55 -0500262&main_gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700263 bootph-pre-ram;
Nishanth Menond6a453c2021-05-04 18:00:55 -0500264 /delete-property/ power-domains;
265};
266
Lokesh Vutlae1c5a5d2021-05-06 16:44:57 +0530267/* EEPROM might be read before SYSFW is available */
268&main_i2c0 {
269 /delete-property/ power-domains;
270};
271
Aswath Govindraju0b2481e2021-06-04 22:00:36 +0530272&usbss0 {
273 ti,vbus-divider;
274 ti,usb2-only;
275};
276
277&usb0 {
278 dr_mode = "otg";
279 maximum-speed = "high-speed";
280 pinctrl-names = "default";
281 pinctrl-0 = <&main_usb0_pins_default>;
282};
283
Dave Gerlach278e7ac2021-04-23 11:27:46 -0500284#include "k3-am642-evm-u-boot.dtsi"