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Michal Simek71d84b42018-03-27 13:43:05 +02001// SPDX-License-Identifier: GPL-2.0+
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +05302/*
Michal Simeke2612e12015-07-22 11:12:10 +02003 * Copyright (C) 2011 - 2015 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +05305 */
6/dts-v1/;
7#include "zynq-7000.dtsi"
8
9/ {
Luis Aranedaac891162018-07-12 00:10:20 -040010 model = "Xilinx ZC702 board";
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +053011 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
Masahiro Yamadad6367a22014-05-15 20:37:54 +090012
Masahiro Yamada87f645e2014-05-15 20:37:55 +090013 aliases {
Michal Simeke2612e12015-07-22 11:12:10 +020014 ethernet0 = &gem0;
15 i2c0 = &i2c0;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090016 serial0 = &uart1;
Jagan Teki0ac0ffb2015-08-15 23:15:21 +053017 spi0 = &qspi;
Michal Simek9ecd2682015-11-30 16:13:03 +010018 mmc0 = &sdhci0;
Vipul Kumardd3f8dc2018-08-07 16:30:04 +053019 usb0 = &usb0;
Michal Simek865bb3b2022-09-27 09:55:12 +020020 nvmem0 = &eeprom;
Michal Simeke42a0392022-09-27 13:50:26 +020021 rtc0 = &rtc;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090022 };
23
Michal Simekb3585f42016-11-11 13:11:37 +010024 memory@0 {
Masahiro Yamadad6367a22014-05-15 20:37:54 +090025 device_type = "memory";
Michal Simeke2612e12015-07-22 11:12:10 +020026 reg = <0x0 0x40000000>;
Masahiro Yamadad6367a22014-05-15 20:37:54 +090027 };
Michal Simeke2612e12015-07-22 11:12:10 +020028
29 chosen {
Michal Simek8073b862016-04-07 11:15:00 +020030 bootargs = "";
Michal Simeke2612e12015-07-22 11:12:10 +020031 stdout-path = "serial0:115200n8";
32 };
33
Michal Simek064be102015-07-22 11:41:11 +020034 gpio-keys {
35 compatible = "gpio-keys";
Michal Simek064be102015-07-22 11:41:11 +020036 autorepeat;
37 sw14 {
38 label = "sw14";
39 gpios = <&gpio0 12 0>;
40 linux,code = <108>; /* down */
Sudeep Holla46521572015-10-21 11:10:16 +010041 wakeup-source;
Michal Simek064be102015-07-22 11:41:11 +020042 autorepeat;
43 };
44 sw13 {
45 label = "sw13";
46 gpios = <&gpio0 14 0>;
47 linux,code = <103>; /* up */
Sudeep Holla46521572015-10-21 11:10:16 +010048 wakeup-source;
Michal Simek064be102015-07-22 11:41:11 +020049 autorepeat;
50 };
51 };
52
Michal Simeke2612e12015-07-22 11:12:10 +020053 leds {
54 compatible = "gpio-leds";
55
Michal Simek958c0e92020-11-26 14:25:02 +010056 led-ds23 {
Michal Simeke2612e12015-07-22 11:12:10 +020057 label = "ds23";
58 gpios = <&gpio0 10 0>;
59 linux,default-trigger = "heartbeat";
60 };
61 };
62
63 usb_phy0: phy0 {
64 compatible = "usb-nop-xceiv";
65 #phy-cells = <0>;
66 };
67};
68
Michal Simeke2612e12015-07-22 11:12:10 +020069&can0 {
70 status = "okay";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_can0_default>;
73};
74
75&clkc {
76 ps-clk-frequency = <33333333>;
77};
78
79&gem0 {
80 status = "okay";
81 phy-mode = "rgmii-id";
82 phy-handle = <&ethernet_phy>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_gem0_default>;
Punnaiah Choudary Kallurib3d15312016-02-03 15:27:18 +053085 phy-reset-gpio = <&gpio0 11 0>;
86 phy-reset-active-low;
Michal Simeke2612e12015-07-22 11:12:10 +020087
88 ethernet_phy: ethernet-phy@7 {
89 reg = <7>;
Sai Pavan Boddub2ed84b2017-03-06 18:17:19 +053090 device_type = "ethernet-phy";
Michal Simeke2612e12015-07-22 11:12:10 +020091 };
92};
93
94&gpio0 {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_gpio0_default>;
97};
98
99&i2c0 {
100 status = "okay";
101 clock-frequency = <400000>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530102 pinctrl-names = "default", "gpio";
Michal Simeke2612e12015-07-22 11:12:10 +0200103 pinctrl-0 = <&pinctrl_i2c0_default>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530104 pinctrl-1 = <&pinctrl_i2c0_gpio>;
105 scl-gpios = <&gpio0 50 0>;
106 sda-gpios = <&gpio0 51 0>;
Michal Simeke2612e12015-07-22 11:12:10 +0200107
Michal Simekf6fd3f22018-02-06 14:00:30 +0100108 i2c-mux@74 {
Michal Simeke2612e12015-07-22 11:12:10 +0200109 compatible = "nxp,pca9548";
110 #address-cells = <1>;
111 #size-cells = <0>;
112 reg = <0x74>;
113
114 i2c@0 {
115 #address-cells = <1>;
116 #size-cells = <0>;
117 reg = <0>;
118 si570: clock-generator@5d {
119 #clock-cells = <0>;
120 compatible = "silabs,si570";
121 temperature-stability = <50>;
122 reg = <0x5d>;
123 factory-fout = <156250000>;
124 clock-frequency = <148500000>;
125 };
126 };
127
Christian Kohn9d979ac2015-11-12 15:53:35 -0800128 i2c@1 {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 reg = <1>;
132 adv7511: hdmi-tx@39 {
133 compatible = "adi,adv7511";
134 reg = <0x39>;
135 adi,input-depth = <8>;
136 adi,input-colorspace = "yuv422";
137 adi,input-clock = "1x";
138 adi,input-style = <3>;
139 adi,input-justification = "right";
140 };
141 };
142
Michal Simeke2612e12015-07-22 11:12:10 +0200143 i2c@2 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 reg = <2>;
Michal Simek865bb3b2022-09-27 09:55:12 +0200147 eeprom: eeprom@54 {
Javier Martinez Canillasa2ce2722017-06-15 20:54:12 +0200148 compatible = "atmel,24c08";
Michal Simeke2612e12015-07-22 11:12:10 +0200149 reg = <0x54>;
150 };
151 };
152
153 i2c@3 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 reg = <3>;
157 gpio@21 {
158 compatible = "ti,tca6416";
159 reg = <0x21>;
160 gpio-controller;
161 #gpio-cells = <2>;
162 };
163 };
164
165 i2c@4 {
166 #address-cells = <1>;
167 #size-cells = <0>;
168 reg = <4>;
Michal Simeke42a0392022-09-27 13:50:26 +0200169 rtc: rtc@51 {
Michal Simeke2612e12015-07-22 11:12:10 +0200170 compatible = "nxp,pcf8563";
171 reg = <0x51>;
172 };
173 };
174
175 i2c@7 {
176 #address-cells = <1>;
177 #size-cells = <0>;
178 reg = <7>;
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800179 hwmon@34 {
Michal Simeke2612e12015-07-22 11:12:10 +0200180 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800181 reg = <0x34>;
Michal Simeke2612e12015-07-22 11:12:10 +0200182 };
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800183 hwmon@35 {
Michal Simeke2612e12015-07-22 11:12:10 +0200184 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800185 reg = <0x35>;
Michal Simeke2612e12015-07-22 11:12:10 +0200186 };
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800187 hwmon@36 {
Michal Simeke2612e12015-07-22 11:12:10 +0200188 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800189 reg = <0x36>;
Michal Simeke2612e12015-07-22 11:12:10 +0200190 };
191 };
192 };
193};
194
195&pinctrl0 {
196 pinctrl_can0_default: can0-default {
197 mux {
198 function = "can0";
199 groups = "can0_9_grp";
200 };
201
202 conf {
203 groups = "can0_9_grp";
204 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600205 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200206 };
207
208 conf-rx {
209 pins = "MIO46";
210 bias-high-impedance;
211 };
212
213 conf-tx {
214 pins = "MIO47";
215 bias-disable;
216 };
217 };
218
219 pinctrl_gem0_default: gem0-default {
220 mux {
221 function = "ethernet0";
222 groups = "ethernet0_0_grp";
223 };
224
225 conf {
226 groups = "ethernet0_0_grp";
227 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600228 power-source = <4>;
Michal Simeke2612e12015-07-22 11:12:10 +0200229 };
230
231 conf-rx {
232 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
233 bias-high-impedance;
234 low-power-disable;
235 };
236
237 conf-tx {
238 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
239 bias-disable;
240 low-power-enable;
241 };
242
243 mux-mdio {
244 function = "mdio0";
245 groups = "mdio0_0_grp";
246 };
247
248 conf-mdio {
249 groups = "mdio0_0_grp";
250 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600251 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200252 bias-disable;
253 };
254 };
255
256 pinctrl_gpio0_default: gpio0-default {
257 mux {
258 function = "gpio0";
259 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
260 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
261 "gpio0_13_grp", "gpio0_14_grp";
262 };
263
264 conf {
265 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
266 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
267 "gpio0_13_grp", "gpio0_14_grp";
268 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600269 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200270 };
271
272 conf-pull-up {
273 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
274 bias-pull-up;
275 };
276
277 conf-pull-none {
278 pins = "MIO7", "MIO8";
279 bias-disable;
280 };
281 };
282
283 pinctrl_i2c0_default: i2c0-default {
284 mux {
285 groups = "i2c0_10_grp";
286 function = "i2c0";
287 };
288
289 conf {
290 groups = "i2c0_10_grp";
291 bias-pull-up;
292 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600293 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200294 };
295 };
296
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530297 pinctrl_i2c0_gpio: i2c0-gpio {
298 mux {
299 groups = "gpio0_50_grp", "gpio0_51_grp";
300 function = "gpio0";
301 };
302
303 conf {
304 groups = "gpio0_50_grp", "gpio0_51_grp";
305 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600306 power-source = <1>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530307 };
308 };
309
Michal Simeke2612e12015-07-22 11:12:10 +0200310 pinctrl_sdhci0_default: sdhci0-default {
311 mux {
312 groups = "sdio0_2_grp";
313 function = "sdio0";
314 };
315
316 conf {
317 groups = "sdio0_2_grp";
318 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600319 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200320 bias-disable;
321 };
322
323 mux-cd {
324 groups = "gpio0_0_grp";
325 function = "sdio0_cd";
326 };
327
328 conf-cd {
329 groups = "gpio0_0_grp";
330 bias-high-impedance;
331 bias-pull-up;
332 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600333 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200334 };
335
336 mux-wp {
337 groups = "gpio0_15_grp";
338 function = "sdio0_wp";
339 };
340
341 conf-wp {
342 groups = "gpio0_15_grp";
343 bias-high-impedance;
344 bias-pull-up;
345 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600346 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200347 };
348 };
349
350 pinctrl_uart1_default: uart1-default {
351 mux {
352 groups = "uart1_10_grp";
353 function = "uart1";
354 };
355
356 conf {
357 groups = "uart1_10_grp";
358 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600359 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200360 };
361
362 conf-rx {
363 pins = "MIO49";
364 bias-high-impedance;
365 };
366
367 conf-tx {
368 pins = "MIO48";
369 bias-disable;
370 };
371 };
372
373 pinctrl_usb0_default: usb0-default {
374 mux {
375 groups = "usb0_0_grp";
376 function = "usb0";
377 };
378
379 conf {
380 groups = "usb0_0_grp";
381 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600382 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200383 };
384
385 conf-rx {
386 pins = "MIO29", "MIO31", "MIO36";
387 bias-high-impedance;
388 };
389
390 conf-tx {
391 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
392 "MIO35", "MIO37", "MIO38", "MIO39";
393 bias-disable;
394 };
395 };
396};
397
Michal Simek6603e1c2016-04-07 13:04:15 +0200398&qspi {
399 u-boot,dm-pre-reloc;
400 status = "okay";
Michal Simekeacca2f2021-08-06 13:30:19 +0200401 num-cs = <1>;
402 flash@0 {
403 compatible = "n25q128a11", "jedec,spi-nor";
404 reg = <0x0>;
405 spi-tx-bus-width = <1>;
406 spi-rx-bus-width = <4>;
407 spi-max-frequency = <50000000>;
408 };
Michal Simek6603e1c2016-04-07 13:04:15 +0200409};
410
Michal Simeke2612e12015-07-22 11:12:10 +0200411&sdhci0 {
Michal Simek9ecd2682015-11-30 16:13:03 +0100412 u-boot,dm-pre-reloc;
Michal Simeke2612e12015-07-22 11:12:10 +0200413 status = "okay";
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_sdhci0_default>;
416};
417
418&uart1 {
Simon Glass8c7323a2015-10-17 19:41:24 -0600419 u-boot,dm-pre-reloc;
Michal Simeke2612e12015-07-22 11:12:10 +0200420 status = "okay";
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_uart1_default>;
423};
424
425&usb0 {
426 status = "okay";
427 dr_mode = "host";
428 usb-phy = <&usb_phy0>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_usb0_default>;
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +0530431};