blob: 9c9016de1bc60dc7208799f31c4fd0e581e12037 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kever Yangb8482a62018-04-18 11:13:44 +08002/*
3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
Kever Yangb8482a62018-04-18 11:13:44 +08004 */
5
Jagan Teki8184a7a2020-01-10 00:16:20 +05306#include "rk3188-u-boot.dtsi"
7
Johan Jonker4a4834b12021-06-25 15:26:33 +02008/ {
9 chosen {
10/* stdout-path = &uart2; */
11 stdout-path = "serial2:115200n8";
12 };
13
14 config {
15 u-boot,boot-led = "rock:red:power";
16 u-boot,dm-pre-reloc;
17 };
18};
19
Kever Yangb8482a62018-04-18 11:13:44 +080020&cru {
21 u-boot,dm-spl;
22};
23
Johan Jonker4a4834b12021-06-25 15:26:33 +020024&dmc {
25 rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
26 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
27 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
28 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
29 0x4 0x0>;
30 rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
31 0x220 0x40 0x0 0x0>;
32 rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
Kever Yangb8482a62018-04-18 11:13:44 +080033};
34
Johan Jonker4a4834b12021-06-25 15:26:33 +020035&emmc {
Heiko Stuebner99a8f742018-09-21 10:59:47 +020036 fifo-mode;
37 max-frequency = <16000000>;
38};
39
Johan Jonker4a4834b12021-06-25 15:26:33 +020040&mmc0 {
Heiko Stuebner99a8f742018-09-21 10:59:47 +020041 fifo-mode;
42 max-frequency = <16000000>;
43};
44
Johan Jonker4a4834b12021-06-25 15:26:33 +020045&mmc1 {
Heiko Stuebner99a8f742018-09-21 10:59:47 +020046 fifo-mode;
47 max-frequency = <16000000>;
48};
49
Johan Jonker4a4834b12021-06-25 15:26:33 +020050&pinctrl {
Kever Yangb8482a62018-04-18 11:13:44 +080051 u-boot,dm-spl;
52};
Kever Yangeca183c2018-04-18 11:13:45 +080053
54&timer3 {
55 compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
Kever Yangeca183c2018-04-18 11:13:45 +080056 clock-frequency = <24000000>;
Johan Jonker4a4834b12021-06-25 15:26:33 +020057 u-boot,dm-spl;
58};
59
60&uart2 {
61 u-boot,dm-spl;
Kever Yangeca183c2018-04-18 11:13:45 +080062};