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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay85b53972018-03-12 10:46:10 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay85b53972018-03-12 10:46:10 +01004 */
5
Patrick Delaunayba779402020-11-06 19:01:29 +01006#define LOG_CATEGORY LOGC_ARCH
7
Patrick Delaunay85b53972018-03-12 10:46:10 +01008#include <common.h>
9#include <dm.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060010#include <image.h>
11#include <init.h>
Patrick Delaunayd1633b32020-03-18 09:22:48 +010012#include <lmb.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Patrick Delaunay85b53972018-03-12 10:46:10 +010014#include <ram.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060015#include <asm/global_data.h>
Patrick Delaunayc9b0dc32021-02-05 13:53:32 +010016#include <asm/system.h>
Patrick Delaunay85b53972018-03-12 10:46:10 +010017
18DECLARE_GLOBAL_DATA_PTR;
19
20int dram_init(void)
21{
22 struct ram_info ram;
23 struct udevice *dev;
24 int ret;
25
26 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
27 if (ret) {
Patrick Delaunayba779402020-11-06 19:01:29 +010028 log_debug("RAM init failed: %d\n", ret);
Patrick Delaunay85b53972018-03-12 10:46:10 +010029 return ret;
30 }
31 ret = ram_get_info(dev, &ram);
32 if (ret) {
Patrick Delaunayba779402020-11-06 19:01:29 +010033 log_debug("Cannot get RAM size: %d\n", ret);
Patrick Delaunay85b53972018-03-12 10:46:10 +010034 return ret;
35 }
Patrick Delaunayba779402020-11-06 19:01:29 +010036 log_debug("RAM init base=%lx, size=%x\n", ram.base, ram.size);
Patrick Delaunay85b53972018-03-12 10:46:10 +010037
38 gd->ram_size = ram.size;
39
40 return 0;
41}
Patrick Delaunayd1633b32020-03-18 09:22:48 +010042
43ulong board_get_usable_ram_top(ulong total_size)
44{
Patrick Delaunayc9b0dc32021-02-05 13:53:32 +010045 phys_size_t size;
Patrick Delaunayd1633b32020-03-18 09:22:48 +010046 phys_addr_t reg;
47 struct lmb lmb;
48
49 /* found enough not-reserved memory to relocated U-Boot */
50 lmb_init(&lmb);
51 lmb_add(&lmb, gd->ram_base, gd->ram_size);
52 boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
Patrick Delaunayc9b0dc32021-02-05 13:53:32 +010053 size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
54 reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
Patrick Delaunayd1633b32020-03-18 09:22:48 +010055
Patrick Delaunayc9b0dc32021-02-05 13:53:32 +010056 if (!reg)
57 reg = gd->ram_top - size;
58
59 mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
Patrick Delaunayd1633b32020-03-18 09:22:48 +010060
Patrick Delaunayc9b0dc32021-02-05 13:53:32 +010061 return reg + size;
Patrick Delaunayd1633b32020-03-18 09:22:48 +010062}