blob: b19a4a6521bbe88f5206e1c0de187566b6a0fc2a [file] [log] [blame]
Marcel Ziswiler90392d02016-11-14 21:40:26 +01001/*
2 * Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __SERIAL_PXA_H
8#define __SERIAL_PXA_H
9
10/*
11 * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
12 * easily handle enabling of clock.
13 */
14#ifdef CONFIG_CPU_MONAHANS
15#define UART_CLK_BASE CKENA_21_BTUART
16#define UART_CLK_REG CKENA
17#define BTUART_INDEX 0
18#define FFUART_INDEX 1
19#define STUART_INDEX 2
20#elif CONFIG_CPU_PXA25X
21#define UART_CLK_BASE (1 << 4) /* HWUART */
22#define UART_CLK_REG CKEN
23#define HWUART_INDEX 0
24#define STUART_INDEX 1
25#define FFUART_INDEX 2
26#define BTUART_INDEX 3
27#else /* PXA27x */
28#define UART_CLK_BASE CKEN5_STUART
29#define UART_CLK_REG CKEN
30#define STUART_INDEX 0
31#define FFUART_INDEX 1
32#define BTUART_INDEX 2
33#endif
34
35/*
36 * Only PXA250 has HWUART, to avoid poluting the code with more macros,
37 * artificially introduce this.
38 */
39#ifndef CONFIG_CPU_PXA25X
40#define HWUART_INDEX 0xff
41#endif
42
43/*
44 * struct pxa_serial_platdata - information about a PXA port
45 *
46 * @base: Uart port base register address
47 * @port: Uart port index, for cpu with pinmux for uart / gpio
48 * baudrtatre: Uart port baudrate
49 */
50struct pxa_serial_platdata {
51 struct pxa_uart_regs *base;
52 int port;
53 int baudrate;
54};
55
56#endif /* __SERIAL_PXA_H */