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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Phil Sutterd76eba62015-12-25 14:41:25 +01002/*
Tony Dinhd937ac82024-07-07 21:39:03 -07003 * Copyright (C) 2024 Tony Dinh <mibodhi@gmail.com>
Phil Sutterd76eba62015-12-25 14:41:25 +01004 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Phil Sutterd76eba62015-12-25 14:41:25 +01005 */
6
7#ifndef _CONFIG_SYNOLOGY_DS414_H
8#define _CONFIG_SYNOLOGY_DS414_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Phil Sutterd76eba62015-12-25 14:41:25 +010013
14/*
15 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
16 * for DDR ECC byte filling in the SPL before loading the main
17 * U-Boot into it.
18 */
Phil Sutterd76eba62015-12-25 14:41:25 +010019
Tom Rinic188ed42022-12-04 10:04:09 -050020#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
Phil Sutterd76eba62015-12-25 14:41:25 +010021
Phil Sutterd76eba62015-12-25 14:41:25 +010022/*
Phil Sutterd76eba62015-12-25 14:41:25 +010023 * Memory layout while starting into the bin_hdr via the
24 * BootROM:
25 *
26 * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
27 * 0x4000.4030 bin_hdr start address
28 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
29 * 0x4007.fffc BootROM stack top
30 *
31 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
32 * L2 cache thus cannot be used.
33 */
34
Tony Dinhd937ac82024-07-07 21:39:03 -070035/* Keep device tree and initrd in lower memory so the kernel can access them */
36#define RELOCATION_LIMITS_ENV_SETTINGS \
37 "fdt_high=0x10000000\0" \
38 "initrd_high=0x10000000\0"
Phil Sutterd76eba62015-12-25 14:41:25 +010039
Tony Dinhd937ac82024-07-07 21:39:03 -070040/*
41 * mv-common.h should be defined after CMD configs since it used them
42 * to enable certain macros
43 */
44#include "mv-common.h"
45
Simon Glass209ae762024-09-29 19:49:49 -060046#ifndef CONFIG_XPL_BUILD
Phil Sutteref534b22021-03-07 22:22:27 +010047
Tony Dinhd937ac82024-07-07 21:39:03 -070048#define KERNEL_ADDR_R __stringify(0x1000000)
49#define FDT_ADDR_R __stringify(0x2000000)
50#define RAMDISK_ADDR_R __stringify(0x2200000)
51#define SCRIPT_ADDR_R __stringify(0x1800000)
52#define PXEFILE_ADDR_R __stringify(0x1900000)
53
54#define EXTRA_ENV_SETTINGS_LEGACY \
55 "bootargs_legacy=console=ttyS0,115200 ip=off initrd=0x8000040,8M " \
56 "root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 " \
57 "flash_size=8 SataLedSpecial=1 HddHotplug=1\0" \
58 "bootcmd_legacy=sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; " \
59 "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
60 "setenv bootargs $bootargs_legacy; " \
61 "bootm ${loadaddr} ${ramdisk_addr_r}\0" \
62 "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
63 "ethmtu=1500\0eth1mtu=1500\0" \
64 "update_uboot=sf probe; dhcp; " \
65 "mw.b ${loadaddr} 0x0 0xd0000; " \
66 "tftpboot ${loadaddr} u-boot-with-spl.kwb; " \
Phil Sutter6d1bcbf2021-03-05 21:05:45 +010067 "sf update ${loadaddr} 0x0 0xd0000\0"
68
Tony Dinhd937ac82024-07-07 21:39:03 -070069#define LOAD_ADDRESS_ENV_SETTINGS \
70 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
71 "fdt_addr_r=" FDT_ADDR_R "\0" \
72 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
73 "scriptaddr=" SCRIPT_ADDR_R "\0" \
74 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
75
76#define CFG_EXTRA_ENV_SETTINGS \
77 RELOCATION_LIMITS_ENV_SETTINGS \
78 LOAD_ADDRESS_ENV_SETTINGS \
79 EXTRA_ENV_SETTINGS_LEGACY \
80 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
81 "console=ttyS0,115200\0"
82
Simon Glass209ae762024-09-29 19:49:49 -060083#endif /* CONFIG_XPL_BUILD */
Phil Sutter246a61f2021-01-03 23:06:44 +010084
Phil Sutterd76eba62015-12-25 14:41:25 +010085#endif /* _CONFIG_SYNOLOGY_DS414_H */