wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000-2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This file contains all the macros and symbols which define |
| 10 | * a PowerPC assembly language environment. |
| 11 | */ |
| 12 | #ifndef __PPC_ASM_TMPL__ |
| 13 | #define __PPC_ASM_TMPL__ |
| 14 | |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 15 | #include <config.h> |
| 16 | |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 17 | /*************************************************************************** |
| 18 | * |
| 19 | * These definitions simplify the ugly declarations necessary for GOT |
| 20 | * definitions. |
| 21 | * |
| 22 | * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es |
| 23 | * |
Heiko Schocher | bb4bd67 | 2010-06-17 07:01:40 +0200 | [diff] [blame] | 24 | * Uses r12 to access the GOT |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 25 | */ |
| 26 | |
| 27 | #define START_GOT \ |
| 28 | .section ".got2","aw"; \ |
| 29 | .LCTOC1 = .+32768 |
| 30 | |
| 31 | #define END_GOT \ |
| 32 | .text |
| 33 | |
| 34 | #define GET_GOT \ |
| 35 | bl 1f ; \ |
| 36 | .text 2 ; \ |
| 37 | 0: .long .LCTOC1-1f ; \ |
| 38 | .text ; \ |
Joakim Tjernlund | 3fbaa4d | 2010-01-19 14:41:56 +0100 | [diff] [blame] | 39 | 1: mflr r12 ; \ |
| 40 | lwz r0,0b-1b(r12) ; \ |
| 41 | add r12,r0,r12 ; |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 42 | |
| 43 | #define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME |
| 44 | |
Joakim Tjernlund | 3fbaa4d | 2010-01-19 14:41:56 +0100 | [diff] [blame] | 45 | #define GOT(NAME) .L_ ## NAME (r12) |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 46 | |
| 47 | |
| 48 | /*************************************************************************** |
| 49 | * Register names |
| 50 | */ |
| 51 | #define r0 0 |
| 52 | #define r1 1 |
| 53 | #define r2 2 |
| 54 | #define r3 3 |
| 55 | #define r4 4 |
| 56 | #define r5 5 |
| 57 | #define r6 6 |
| 58 | #define r7 7 |
| 59 | #define r8 8 |
| 60 | #define r9 9 |
| 61 | #define r10 10 |
| 62 | #define r11 11 |
| 63 | #define r12 12 |
| 64 | #define r13 13 |
| 65 | #define r14 14 |
| 66 | #define r15 15 |
| 67 | #define r16 16 |
| 68 | #define r17 17 |
| 69 | #define r18 18 |
| 70 | #define r19 19 |
| 71 | #define r20 20 |
| 72 | #define r21 21 |
| 73 | #define r22 22 |
| 74 | #define r23 23 |
| 75 | #define r24 24 |
| 76 | #define r25 25 |
| 77 | #define r26 26 |
| 78 | #define r27 27 |
| 79 | #define r28 28 |
| 80 | #define r29 29 |
| 81 | #define r30 30 |
| 82 | #define r31 31 |
| 83 | |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 84 | #if defined(CONFIG_8xx) |
| 85 | |
| 86 | /* Some special registers */ |
| 87 | |
| 88 | #define ICR 148 /* Interrupt Cause Register (37-44) */ |
| 89 | #define DER 149 |
| 90 | #define COUNTA 150 /* Breakpoint Counter (37-44) */ |
| 91 | #define COUNTB 151 /* Breakpoint Counter (37-44) */ |
| 92 | #define LCTRL1 156 /* Load/Store Support (37-40) */ |
| 93 | #define LCTRL2 157 /* Load/Store Support (37-41) */ |
| 94 | #define ICTRL 158 |
| 95 | |
| 96 | #endif /* CONFIG_8xx */ |
| 97 | |
| 98 | |
| 99 | #if defined(CONFIG_8xx) |
| 100 | |
| 101 | /* Registers in the processor's internal memory map that we use. |
| 102 | */ |
| 103 | #define SYPCR 0x00000004 |
| 104 | #define BR0 0x00000100 |
| 105 | #define OR0 0x00000104 |
| 106 | #define BR1 0x00000108 |
| 107 | #define OR1 0x0000010c |
| 108 | #define BR2 0x00000110 |
| 109 | #define OR2 0x00000114 |
| 110 | #define BR3 0x00000118 |
| 111 | #define OR3 0x0000011c |
| 112 | #define BR4 0x00000120 |
| 113 | #define OR4 0x00000124 |
| 114 | |
| 115 | #define MAR 0x00000164 |
| 116 | #define MCR 0x00000168 |
| 117 | #define MAMR 0x00000170 |
| 118 | #define MBMR 0x00000174 |
| 119 | #define MSTAT 0x00000178 |
| 120 | #define MPTPR 0x0000017a |
| 121 | #define MDR 0x0000017c |
| 122 | |
| 123 | #define TBSCR 0x00000200 |
| 124 | #define TBREFF0 0x00000204 |
| 125 | |
| 126 | #define PLPRCR 0x00000284 |
| 127 | |
| 128 | #endif |
| 129 | |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 130 | #define curptr r2 |
| 131 | |
| 132 | #define SYNC \ |
| 133 | sync; \ |
| 134 | isync |
| 135 | |
| 136 | /* |
| 137 | * Macros for storing registers into and loading registers from |
| 138 | * exception frames. |
| 139 | */ |
| 140 | #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) |
| 141 | #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) |
| 142 | #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) |
| 143 | #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) |
| 144 | #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) |
| 145 | #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) |
| 146 | #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) |
| 147 | #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) |
| 148 | #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) |
| 149 | #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) |
| 150 | |
| 151 | /* |
| 152 | * GCC sometimes accesses words at negative offsets from the stack |
| 153 | * pointer, although the SysV ABI says it shouldn't. To cope with |
| 154 | * this, we leave this much untouched space on the stack on exception |
| 155 | * entry. |
| 156 | */ |
| 157 | #define STACK_UNDERHEAD 64 |
| 158 | |
| 159 | /* |
| 160 | * Exception entry code. This code runs with address translation |
| 161 | * turned off, i.e. using physical addresses. |
| 162 | * We assume sprg3 has the physical address of the current |
| 163 | * task's thread_struct. |
| 164 | */ |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 165 | #define EXCEPTION_PROLOG(reg1, reg2) \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 166 | mtspr SPRG0,r20; \ |
| 167 | mtspr SPRG1,r21; \ |
| 168 | mfcr r20; \ |
| 169 | subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\ |
| 170 | stw r20,_CCR(r21); /* save registers */ \ |
| 171 | stw r22,GPR22(r21); \ |
| 172 | stw r23,GPR23(r21); \ |
| 173 | mfspr r20,SPRG0; \ |
| 174 | stw r20,GPR20(r21); \ |
| 175 | mfspr r22,SPRG1; \ |
| 176 | stw r22,GPR21(r21); \ |
| 177 | mflr r20; \ |
| 178 | stw r20,_LINK(r21); \ |
| 179 | mfctr r22; \ |
| 180 | stw r22,_CTR(r21); \ |
| 181 | mfspr r20,XER; \ |
| 182 | stw r20,_XER(r21); \ |
Rafal Jaworowski | d6520bc | 2007-07-19 17:12:28 +0200 | [diff] [blame] | 183 | mfspr r20, DAR_DEAR; \ |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 184 | stw r20,_DAR(r21); \ |
| 185 | mfspr r22,reg1; \ |
| 186 | mfspr r23,reg2; \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 187 | stw r0,GPR0(r21); \ |
| 188 | stw r1,GPR1(r21); \ |
| 189 | stw r2,GPR2(r21); \ |
| 190 | stw r1,0(r21); \ |
| 191 | mr r1,r21; /* set new kernel sp */ \ |
| 192 | SAVE_4GPRS(3, r21); |
| 193 | /* |
| 194 | * Note: code which follows this uses cr0.eq (set if from kernel), |
| 195 | * r21, r22 (SRR0), and r23 (SRR1). |
| 196 | */ |
| 197 | |
| 198 | /* |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 199 | * Exception vectors. |
| 200 | * |
| 201 | * The data words for `hdlr' and `int_return' are initialized with |
| 202 | * OFFSET values only; they must be relocated first before they can |
| 203 | * be used! |
| 204 | */ |
Joakim Tjernlund | 4ff6bc0 | 2010-01-19 14:41:55 +0100 | [diff] [blame] | 205 | #define COPY_EE(d, s) rlwimi d,s,0,16,16 |
| 206 | #define NOCOPY(d, s) |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 207 | |
| 208 | #ifdef CONFIG_E500 |
| 209 | #define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \ |
| 210 | stw r22,_NIP(r21); \ |
| 211 | stw r23,_MSR(r21); \ |
| 212 | li r23,n; \ |
| 213 | stw r23,TRAP(r21); \ |
| 214 | li r20,msr; \ |
| 215 | copyee(r20,r23); \ |
| 216 | rlwimi r20,r23,0,25,25; \ |
| 217 | mtmsr r20; \ |
| 218 | bl 1f; \ |
| 219 | 1: mflr r23; \ |
| 220 | addis r23,r23,(hdlr - 1b)@ha; \ |
| 221 | addi r23,r23,(hdlr - 1b)@l; \ |
| 222 | b transfer_to_handler |
| 223 | |
| 224 | #define STD_EXCEPTION(n, label, hdlr) \ |
mario.six@gdsys.cc | d5928cd | 2016-04-05 15:05:37 +0200 | [diff] [blame] | 225 | .align 4; \ |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 226 | label: \ |
| 227 | EXCEPTION_PROLOG(SRR0, SRR1); \ |
| 228 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 229 | EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \ |
| 230 | |
| 231 | #define CRIT_EXCEPTION(n, label, hdlr) \ |
mario.six@gdsys.cc | d5928cd | 2016-04-05 15:05:37 +0200 | [diff] [blame] | 232 | .align 4; \ |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 233 | label: \ |
| 234 | EXCEPTION_PROLOG(CSRR0, CSRR1); \ |
| 235 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 236 | EXC_XFER_TEMPLATE(n, label, hdlr, \ |
| 237 | MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ |
| 238 | |
| 239 | #define MCK_EXCEPTION(n, label, hdlr) \ |
mario.six@gdsys.cc | d5928cd | 2016-04-05 15:05:37 +0200 | [diff] [blame] | 240 | .align 4; \ |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 241 | label: \ |
| 242 | EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ |
| 243 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 244 | EXC_XFER_TEMPLATE(n, label, hdlr, \ |
| 245 | MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ |
| 246 | |
| 247 | #else /* !E500 */ |
| 248 | |
Joakim Tjernlund | 4ff6bc0 | 2010-01-19 14:41:55 +0100 | [diff] [blame] | 249 | #define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \ |
| 250 | bl 1f; \ |
| 251 | 1: mflr r20; \ |
| 252 | lwz r20,(.L_ ## label)-1b+8(r20); \ |
| 253 | mtlr r20; \ |
| 254 | li r20,msr; \ |
| 255 | copyee(r20,r23); \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 256 | rlwimi r20,r23,0,25,25; \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 257 | blrl; \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 258 | .L_ ## label : \ |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 259 | .long hdlr - _start + _START_OFFSET; \ |
Joakim Tjernlund | 4ff6bc0 | 2010-01-19 14:41:55 +0100 | [diff] [blame] | 260 | .long int_return - _start + _START_OFFSET; \ |
| 261 | .long transfer_to_handler - _start + _START_OFFSET |
| 262 | |
| 263 | #define STD_EXCEPTION(n, label, hdlr) \ |
| 264 | . = n; \ |
| 265 | label: \ |
| 266 | EXCEPTION_PROLOG(SRR0, SRR1); \ |
| 267 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 268 | EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 269 | |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 270 | #define CRIT_EXCEPTION(n, label, hdlr) \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 271 | . = n; \ |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 272 | label: \ |
Rafal Jaworowski | 06244e4 | 2007-06-22 14:58:04 +0200 | [diff] [blame] | 273 | EXCEPTION_PROLOG(CSRR0, CSRR1); \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 274 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
Joakim Tjernlund | 4ff6bc0 | 2010-01-19 14:41:55 +0100 | [diff] [blame] | 275 | EXC_XFER_TEMPLATE(label, hdlr, \ |
| 276 | MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 277 | |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 278 | #define MCK_EXCEPTION(n, label, hdlr) \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 279 | . = n; \ |
Grzegorz Bernacki | 837bc5b | 2007-06-15 11:19:28 +0200 | [diff] [blame] | 280 | label: \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 281 | EXCEPTION_PROLOG(MCSRR0, MCSRR1); \ |
Wolfgang Denk | 09675ef | 2007-06-20 18:14:24 +0200 | [diff] [blame] | 282 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
Joakim Tjernlund | 4ff6bc0 | 2010-01-19 14:41:55 +0100 | [diff] [blame] | 283 | EXC_XFER_TEMPLATE(label, hdlr, \ |
| 284 | MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 285 | |
Scott Wood | f21e758 | 2015-04-07 20:20:00 -0500 | [diff] [blame] | 286 | #endif /* !E500 */ |
wdenk | d62589d | 2002-08-20 21:10:12 +0000 | [diff] [blame] | 287 | #endif /* __PPC_ASM_TMPL__ */ |