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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Peng Fanc81c41f2016-10-11 14:29:15 +08002/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
Peng Fanc81c41f2016-10-11 14:29:15 +08004 */
5
6#include <config.h>
7
8/* DDR script */
9.macro imx6ull_ddr3_evk_setting
10 ldr r0, =IOMUXC_BASE_ADDR
11 ldr r1, =0x000C0000
12 str r1, [r0, #0x4B4]
13 ldr r1, =0x00000000
14 str r1, [r0, #0x4AC]
15 ldr r1, =0x00000030
16 str r1, [r0, #0x27C]
17 ldr r1, =0x00000030
18 str r1, [r0, #0x250]
19 str r1, [r0, #0x24C]
20 str r1, [r0, #0x490]
21 ldr r1, =0x000C0030
22 str r1, [r0, #0x288]
23
24 ldr r1, =0x00000000
25 str r1, [r0, #0x270]
26
27 ldr r1, =0x00000030
28 str r1, [r0, #0x260]
29 str r1, [r0, #0x264]
30 str r1, [r0, #0x4A0]
31
32 ldr r1, =0x00020000
33 str r1, [r0, #0x494]
34
35 ldr r1, =0x00000030
36 str r1, [r0, #0x280]
37 ldr r1, =0x00000030
38 str r1, [r0, #0x284]
39
40 ldr r1, =0x00020000
41 str r1, [r0, #0x4B0]
42
43 ldr r1, =0x00000030
44 str r1, [r0, #0x498]
45 str r1, [r0, #0x4A4]
46 str r1, [r0, #0x244]
47 str r1, [r0, #0x248]
48
49 ldr r0, =MMDC_P0_BASE_ADDR
50 ldr r1, =0x00008000
51 str r1, [r0, #0x1C]
52 ldr r1, =0xA1390003
53 str r1, [r0, #0x800]
54 ldr r1, =0x00000004
55 str r1, [r0, #0x80C]
56 ldr r1, =0x41640158
57 str r1, [r0, #0x83C]
58 ldr r1, =0x40403237
59 str r1, [r0, #0x848]
60 ldr r1, =0x40403C33
61 str r1, [r0, #0x850]
62 ldr r1, =0x33333333
63 str r1, [r0, #0x81C]
64 str r1, [r0, #0x820]
65 ldr r1, =0xF3333333
66 str r1, [r0, #0x82C]
67 str r1, [r0, #0x830]
68 ldr r1, =0x00944009
69 str r1, [r0, #0x8C0]
70 ldr r1, =0x00000800
71 str r1, [r0, #0x8B8]
72 ldr r1, =0x0002002D
73 str r1, [r0, #0x004]
74 ldr r1, =0x1B333030
75 str r1, [r0, #0x008]
76 ldr r1, =0x676B52F3
77 str r1, [r0, #0x00C]
78 ldr r1, =0xB66D0B63
79 str r1, [r0, #0x010]
80 ldr r1, =0x01FF00DB
81 str r1, [r0, #0x014]
82 ldr r1, =0x00201740
83 str r1, [r0, #0x018]
84 ldr r1, =0x00008000
85 str r1, [r0, #0x01C]
86 ldr r1, =0x000026D2
87 str r1, [r0, #0x02C]
88 ldr r1, =0x006B1023
89 str r1, [r0, #0x030]
90 ldr r1, =0x0000004F
91 str r1, [r0, #0x040]
92 ldr r1, =0x84180000
93 str r1, [r0, #0x000]
94 ldr r1, =0x00400000
95 str r1, [r0, #0x890]
96 ldr r1, =0x02008032
97 str r1, [r0, #0x01C]
98 ldr r1, =0x00008033
99 str r1, [r0, #0x01C]
100 ldr r1, =0x00048031
101 str r1, [r0, #0x01C]
102 ldr r1, =0x15208030
103 str r1, [r0, #0x01C]
104 ldr r1, =0x04008040
105 str r1, [r0, #0x01C]
106 ldr r1, =0x00000800
107 str r1, [r0, #0x020]
108 ldr r1, =0x00000227
109 str r1, [r0, #0x818]
110 ldr r1, =0x0002552D
111 str r1, [r0, #0x004]
112 ldr r1, =0x00011006
113 str r1, [r0, #0x404]
114 ldr r1, =0x00000000
115 str r1, [r0, #0x01C]
116.endm
117
118.macro imx6_clock_gating
119 ldr r0, =CCM_BASE_ADDR
120 ldr r1, =0xFFFFFFFF
121 str r1, [r0, #0x68]
122 str r1, [r0, #0x6C]
123 str r1, [r0, #0x70]
124 str r1, [r0, #0x74]
125 str r1, [r0, #0x78]
126 str r1, [r0, #0x7C]
127 str r1, [r0, #0x80]
128.endm
129
130.macro imx6_qos_setting
131.endm
132
133.macro imx6_ddr_setting
134 imx6ull_ddr3_evk_setting
135.endm
136
137/* include the common plugin code here */
138#include <asm/arch/mx6_plugin.S>